982 resultados para ADAPTIVE RECOVERY CLOCK


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The production of healthy high quality female European eel in recycle systems is proposed as a means to secure sufficient numbers of silver eel for spawning migration in order to meet the requirements of the European Commission’s proposal for a Regulation for the recovery of the stock of the European eel. Main advantages besides checks for parasites and viral diseases and avoidance of elevated levels of specific pollutants are the easily controllable numbers of spawners to be released and a reduction of labour and costs that will occur when acting along the lines of the Commission’s proposal.

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Shortnose sturgeon (Acipenser brevirostrum), an endangered species, has experienced a several-fold increase in abundance in the Hudson River in recent decades. This population growth followed a substantial improvement in water quality during the 1970s to a large portion (c. 40%) of the species' summertime nursery area. Age structure and growth were investigated to evaluate the hypothesis that improvements in water quality stimulated population recovery through increased survival of young of the year juveniles. Specimens were captured using gill nets bi-monthly from November 2003 to November 2004 (n = 596). Annuli in fin spine sections were used to generate estimates of sturgeon age. Based upon a marginal increment analysis, annuli were determined to form at an annual rate. Age determinations yielded a catch composed of age 5-30 years for sizes 49-105cm Total Length (n = 554). Individual growth rate (von Bertalanffy coefficients: TL, = 1045mm, K = 0.07) for the population was similar to previous growth estimates within the Hudson River as well as proximal estuaries. Hindcast year-class strengths, based upon a recent stock assessment (Bain et al. 2000) and corrected for gill net mesh selectivity and cumulative mortality indicated high recruitments (28,000-43,000 yearlings)during 1986-1992, which were preceded and succeeded by c.5-year periods of lower recruitment (5,000-1 5,000 yearlings). Recruitment patterns were corroborated by trends in shortnose sturgeon bycatch from a Hudson utilities-sponsored monitoring program. Results indicated that Hudson River shortnose sturgeon abundance increased due to the formation of several strong year-classes occurring about five years subsequent to improved water quality in important nursery and forage habitats in the upper Hudson River estuary. (PDF contains 108 pages.)

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Presentado en el 13th WSEAS International Conference on Automatic Control, Modelling and Simulation, ACMOS'11

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A quadtree-based adaptive Cartesian grid generator and flow solver were developed. The grid adaptation based on pressure or density gradient was performed and a gridless method based on the least-square fashion was used to treat the wall surface boundary condition, which is generally difficult to be handled for the common Cartesian grid. First, to validate the technique of grid adaptation, the benchmarks over a forward-facing step and double Mach reflection were computed. Second, the flows over the NACA 0012 airfoil and a two-element airfoil were calculated to validate the developed gridless method. The computational results indicate the developed method is reasonable for complex flows.

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Singular Value Decomposition (SVD) is a key linear algebraic operation in many scientific and engineering applications. In particular, many computational intelligence systems rely on machine learning methods involving high dimensionality datasets that have to be fast processed for real-time adaptability. In this paper we describe a practical FPGA (Field Programmable Gate Array) implementation of a SVD processor for accelerating the solution of large LSE problems. The design approach has been comprehensive, from the algorithmic refinement to the numerical analysis to the customization for an efficient hardware realization. The processing scheme rests on an adaptive vector rotation evaluator for error regularization that enhances convergence speed with no penalty on the solution accuracy. The proposed architecture, which follows a data transfer scheme, is scalable and based on the interconnection of simple rotations units, which allows for a trade-off between occupied area and processing acceleration in the final implementation. This permits the SVD processor to be implemented both on low-cost and highend FPGAs, according to the final application requirements.