A scheme for synchronizing clocks connected by a packet communication network

Consider a communication system in which a transmitter equipment sends fixed-size packets of data at a uniform rate to a receiver equipment. Consider also that these equipments are connected by a packet-switched network, which introduces a random delay to each packet. Here we propose an adaptive clock recovery scheme able of synchronizing the frequencies and the phases of these devices, within specified limits of precision. This scheme for achieving frequency and phase synchronization is based on measurements of the packet arrival times at the receiver, which are used to control the dynamics of a digital phase-locked loop. The scheme performance is evaluated via numerical simulations performed by using realistic parameter values. (C) 2011 Elsevier By. All rights reserved.

Design and implementation of a novel multi-constellation FPGA-based dual frequency GNSS receiver for space applications

The PhD activity described in the document is part of the Microsatellite and Microsystem Laboratory of the II Faculty of Engineering, University of Bologna. The main objective is the design and development of a GNSS receiver for the orbit determination of microsatellites in low earth orbit. The development starts from the electronic design and goes up to the implementation of the navigation algorithms, covering all the aspects that are involved in this type of applications. The use of GPS receivers for orbit determination is a consolidated application used in many space missions, but the development of the new GNSS system within few years, such as the European Galileo, the Chinese COMPASS and the Russian modernized GLONASS, proposes new challenges and offers new opportunities to increase the orbit determination performances. The evaluation of improvements coming from the new systems together with the implementation of a receiver that is compatible with at least one of the new systems, are the main activities of the PhD. The activities can be divided in three section: receiver requirements definition and prototype implementation, design and analysis of the GNSS signal tracking algorithms, and design and analysis of the navigation algorithms. The receiver prototype is based on a Virtex FPGA by Xilinx, and includes a PowerPC processor. The architecture follows the software defined radio paradigm, so most of signal processing is performed in software while only what is strictly necessary is done in hardware. The tracking algorithms are implemented as a combination of Phase Locked Loop and Frequency Locked Loop for the carrier, and Delay Locked Loop with variable bandwidth for the code. The navigation algorithm is based on the extended Kalman filter and includes an accurate LEO orbit model.

Simultaneous demultiplexing and clock recovery using a single electroabsorption modulator in a novel bi-directional configuration

A single electroabsorption modulator was used to demultiplex a 10 Gbit/s channel from a 40 Gbit/s OTDM data stream, whilst simultaneously recovering the 10 GHz electrical clock. This was achieved using a new bi-directional operation of the EA modulator, combined with a simple phase-locked loop feedback circuit. Excellent system performance was achieved, indicating that operation up to and beyond 100 Gbit/s is possible using current technology.

Simultaneous demultiplexing and clock recovery using a single electroabsorption modulator in a novel bi-directional configuration

A single electroabsorption modulator was used to demultiplex a 10 Gbit/s channel from a 40 Gbit/s OTDM data stream, whilst simultaneously recovering the 10 GHz electrical clock. This was achieved using a new bi-directional operation of the EA modulator, combined with a simple phase-locked loop feedback circuit. Excellent system performance was achieved, indicating that operation up to and beyond 100 Gbit/s is possible using current technology.

Fopid Controller Design for Robust Performance Using Particle Swarm Optimization

Mathematics Subject Classification: 26A33; 93C15, 93C55, 93B36, 93B35, 93B51; 03B42; 70Q05; 49N05

Fully Connected PLL Networks: How Filter Determines the Number of Nodes

Synchronization plays an important role in telecommunication systems, integrated circuits, and automation systems. Formerly, the masterslave synchronization strategy was used in the great majority of cases due to its reliability and simplicity. Recently, with the wireless networks development, and with the increase of the operation frequency of integrated circuits, the decentralized clock distribution strategies are gaining importance. Consequently, fully connected clock distribution systems with nodes composed of phase-locked loops (PLLs) appear as a convenient engineering solution. In this work, the stability of the synchronous state of these networks is studied in two relevant situations: when the node filters are first-order lag-lead low-pass or when the node filters are second-order low-pass. For first-order filters, the synchronous state of the network shows to be stable for any number of nodes. For second-order filter, there is a superior limit for the number of nodes, depending on the PLL parameters. Copyright (C) 2009 Atila Madureira Bueno et al.

Multiple synchronous states in static delay-free mutually connected PLL networks

In many engineering applications, the time coordination of geographically separated events is of fundamental importance, as in digital telecommunications and integrated digital circuits. Mutually connected (MC) networks are very good candidates for some new types of application, such as wireless sensor networks. This paper presents a study on the behavior of MC networks of digital phase-locked loops (DPLLs). Analytical results are derived showing that, even for static networks without delays, different synchronous states may exist for the network. An upper bound for the number of such states is also presented. Numerical simulations are used to show the following results: (i) the synchronization precision in MC DPLLs networks; (ii) the existence of synchronous states for the network does not guarantee its achievement and (iii) different synchronous states may be achieved for different initial conditions. These results are important in the neural computation context. as in this case, each synchronous state may be associated to a different analog memory information. (C) 2010 Elsevier B.V. All rights reserved.

Architectures, stability and optimization for clock distribution networks

Synchronous telecommunication networks, distributed control systems and integrated circuits have its accuracy of operation dependent on the existence of a reliable time basis signal extracted from the line data stream and acquirable to each node. In this sense, the existence of a sub-network (inside the main network) dedicated to the distribution of the clock signals is crucially important. There are different solutions for the architecture of the time distribution sub-network and choosing one of them depends on cost, precision, reliability and operational security. In this work we expose: (i) the possible time distribution networks and their usual topologies and arrangements. (ii) How parameters of the network nodes can affect the reachability and stability of the synchronous state of a network. (iii) Optimizations methods for synchronous networks which can provide low cost architectures with operational precision, reliability and security. (C) 2011 Elsevier B. V. All rights reserved.

Enabling Blocks for Integrated CMOS UWB Transceivers

The last decades have seen an unrivaled growth and diffusion of mobile telecommunications. Several standards have been developed to this purposes, from GSM mobile phone communications to WLAN IEEE 802.11, providing different services for the the transmission of signals ranging from voice to high data rate digital communications and Digital Video Broadcasting (DVB). In this wide research and market field, this thesis focuses on Ultra Wideband (UWB) communications, an emerging technology for providing very high data rate transmissions over very short distances. In particular the presented research deals with the circuit design of enabling blocks for MB-OFDM UWB CMOS single-chip transceivers, namely the frequency synthesizer and the transmission mixer and power amplifier. First we discuss three different models for the simulation of chargepump phase-locked loops, namely the continuous time s-domain and discrete time z-domain approximations and the exact semi-analytical time-domain model. The limitations of the two approximated models are analyzed in terms of error in the computed settling time as a function of loop parameters, deriving practical conditions under which the different models are reliable for fast settling PLLs up to fourth order. Besides, a phase noise analysis method based upon the time-domain model is introduced and compared to the results obtained by means of the s-domain model. We compare the three models over the simulation of a fast switching PLL to be integrated in a frequency synthesizer for WiMedia MB-OFDM UWB systems. In the second part, the theoretical analysis is applied to the design of a 60mW 3.4 to 9.2GHz 12 Bands frequency synthesizer for MB-OFDM UWB based on two wide-band PLLs. The design is presented and discussed up to layout level. A test chip has been implemented in TSMC CMOS 90nm technology, measured data is provided. The functionality of the circuit is proved and specifications are met with state-of-the-art area occupation and power consumption. The last part of the thesis deals with the design of a transmission mixer and a power amplifier for MB-OFDM UWB band group 1. The design has been carried on up to layout level in ST Microlectronics 65nm CMOS technology. Main characteristics of the systems are the wideband behavior (1.6 GHz of bandwidth) and the constant behavior over process parameters, temperature and supply voltage thanks to the design of dedicated adaptive biasing circuits.

Performance comparison of a VDFLL versus VDLL and scalar GNSS receiver architectures in Harsh scenarios

We analyze the advantages and drawbacks of a vector delay/frequency-locked loop (VDFLL) architecture regarding the conventional scalar and the vector delay-locked loop (VDLL) architectures for GNSS receivers in harsh scenarios that include ionospheric scintillation, multipath, and high dynamics motion. The VDFLL is constituted by a bank of code and frequency discriminators feeding a central extended Kaiman filter (EKF) that estimates the receiver's position, velocity, and clock bias. Both code and frequency loops are closed vectorially through the EKF. The VDLL closes the code loop vectorially and the phase loops through individual PLLs while the scalar receiver closes both loops by means of individual independent PLLs and DLLs.

Towards forecasting and mitigating ionospheric scintillation effects on GNSS

The effect of the ionosphere on the signals of Global Navigation Satellite Systems (GNSS), such as the Global Positionig System (GPS) and the proposed European Galileo, is dependent on the ionospheric electron density, given by its Total Electron Content (TEC). Ionospheric time-varying density irregularities may cause scintillations, which are fluctuations in phase and amplitude of the signals. Scintillations occur more often at equatorial and high latitudes. They can degrade navigation and positioning accuracy and may cause loss of signal tracking, disrupting safety-critical applications, such as marine navigation and civil aviation. This paper addresses the results of initial research carried out on two fronts that are relevant to GNSS users if they are to counter ionospheric scintillations, i.e. forecasting and mitigating their effects. On the forecasting front, the dynamics of scintillation occurrence were analysed during the severe ionospheric storm that took place on the evening of 30 October 2003, using data from a network of GPS Ionospheric Scintillation and TEC Monitor (GISTM) receivers set up in Northern Europe. Previous results [1] indicated that GPS scintillations in that region can originate from ionospheric plasma structures from the American sector. In this paper we describe experiments that enabled confirmation of those findings. On the mitigation front we used the variance of the output error of the GPS receiver DLL (Delay Locked Loop) to modify the least squares stochastic model applied by an ordinary receiver to compute position. This error was modelled according to [2], as a function of the S4 amplitude scintillation index measured by the GISTM receivers. An improvement of up to 21% in relative positioning accuracy was achieved with this technnique.

Decoding temporally encoded sensory input by cortical oscillations and thalamic phase comparators

The temporally encoded information obtained by vibrissal touch could be decoded “passively,” involving only input-driven elements, or “actively,” utilizing intrinsically driven oscillators. A previous study suggested that the trigeminal somatosensory system of rats does not obey the bottom-up order of activation predicted by passive decoding. Thus, we have tested whether this system obeys the predictions of active decoding. We have studied cortical single units in the somatosensory cortices of anesthetized rats and guinea pigs and found that about a quarter of them exhibit clear spontaneous oscillations, many of them around whisking frequencies (≈10 Hz). The frequencies of these oscillations could be controlled locally by glutamate. These oscillations could be forced to track the frequency of induced rhythmic whisker movements at a stable, frequency-dependent, phase difference. During these stimulations, the response intensities of multiunits at the thalamic recipient layers of the cortex decreased, and their latencies increased, with increasing input frequency. These observations are consistent with thalamocortical loops implementing phase-locked loops, circuits that are most efficient in decoding temporally encoded information like that obtained by active vibrissal touch. According to this model, and consistent with our results, populations of thalamic “relay” neurons function as phase “comparators” that compare cortical timing expectations with the actual input timing and represent the difference by their population output rate.

Towards a unified understanding of event-related changes in the EEG:the Firefly model of synchronization through cross-frequency phase modulation

Although event-related potentials (ERPs) are widely used to study sensory, perceptual and cognitive processes, it remains unknown whether they are phase-locked signals superimposed upon the ongoing electroencephalogram (EEG) or result from phase-alignment of the EEG. Previous attempts to discriminate between these hypotheses have been unsuccessful but here a new test is presented based on the prediction that ERPs generated by phase-alignment will be associated with event-related changes in frequency whereas evoked-ERPs will not. Using empirical mode decomposition (EMD), which allows measurement of narrow-band changes in the EEG without predefining frequency bands, evidence was found for transient frequency slowing in recognition memory ERPs but not in simulated data derived from the evoked model. Furthermore, the timing of phase-alignment was frequency dependent with the earliest alignment occurring at high frequencies. Based on these findings, the Firefly model was developed, which proposes that both evoked and induced power changes derive from frequency-dependent phase-alignment of the ongoing EEG. Simulated data derived from the Firefly model provided a close match with empirical data and the model was able to account for i) the shape and timing of ERPs at different scalp sites, ii) the event-related desynchronization in alpha and synchronization in theta, and iii) changes in the power density spectrum from the pre-stimulus baseline to the post-stimulus period. The Firefly Model, therefore, provides not only a unifying account of event-related changes in the EEG but also a possible mechanism for cross-frequency information processing.

Bifurcation study for a vertical channel with constant flux and large aspect ratio

Using suitable coupled Navier-Stokes Equations for an incompressible Newtonian fluid we investigate the linear and non-linear steady state solutions for both a homogeneously and a laterally heated fluid with finite Prandtl Number (Pr=7) in the vertical orientation of the channel. Both models are studied within the Large Aspect Ratio narrow-gap and under constant flux conditions with the channel closed. We use direct numerics to identify the linear stability criterion in parametric terms as a function of Grashof Number (Gr) and streamwise infinitesimal perturbation wavenumber (making use of the generalised Squire’s Theorem). We find higher harmonic solutions at lower wavenumbers with a resonance of 1:3exist, for both of the heating models considered. We proceed to identify 2D secondary steady state solutions, which bifurcate from the laminar state. Our studies show that 2D solutions are found not to exist in certain regions of the pure manifold, where we find that 1:3 resonant mode 2D solutions exist, for low wavenumber perturbations. For the homogeneously heated fluid, we notice a jump phenomenon existing between the pure and resonant mode secondary solutions for very specific wavenumbers .We attempt to verify whether mixed mode solutions are present for this model by considering the laterally heated model with the same geometry. We find mixed mode solutions for the laterally heated model showing that a bridge exists between the pure and 1:3 resonant mode 2D solutions, of which some are stationary and some travelling. Further, we show that for the homogeneously heated fluid that the 2D solutions bifurcate in hopf bifurcations and there exists a manifold where the 2D solutions are stable to Eckhaus criterion, within this manifold we proceed to identify 3D tertiary solutions and find that the stability for said 3D bifurcations is not phase locked to the 2D state. For the homogeneously heated model we identify a closed loop within the neutral stability curve for higher perturbation wavenumubers and analyse the nature of the multiple 2D bifurcations around this loop for identical wavenumber and find that a temperature inversion occurs within this loop. We conclude that for a homogeneously heated fluid it is possible to have abrup ttransitions between the pure and resonant 2D solutions, and that for the laterally heated model there exist a transient bifurcation via mixed mode solutions.

Particle-Image Velocimetry Study of a Pediatric Ventricular Assist Device

Particle-image velocimetry (PIV) was used to visualize the flow within an optically transparent pediatric ventricular assist device (PVAD) under development in our laboratory The device studied is a diaphragm type pulsatile pump with an ejection volume of 30 ml per beating cycle intended for temporary cardiac assistance as a bridge to transplantation or recovery in children. Of particular interest was the identification of flow patterns, including regions of stagnation and/or strong turbulence that often promote thrombus formation and hemolysis, which can degrade the usefulness of such devices. For this purpose, phase-locked PIV measurements were performed in planes parallel to the diaphram that drives the flow in the device. The test fluid was seeded with 10 Am polystyrene spheres, and the motion of these particles was used to determine the instantaneous flow velocity distribution in the illumination plane. These measurements revealed that flow velocities up to 1.0 m/s can occur within the PVAD. Phase-averaged velocity fields revealed the fixed vortices that drive the bulk flow within the device, though significant cycle-to-cycle variability was also quite apparent in the instantaneous velocity distributions, most notably during the filling phase. This cycle-to-cycle variability can generate strong turbulence that may contribute to greater hemolysis. Stagnation regions have also been observed between the input and output branches of the prototype, which can increase the likelihood of thrombus formation. [DOI: 10.1115/1.4001252]