Low power all-optical switch in a passive InGaAsP multiple quantum well waveguide

We demonstrate the use of resonant bandfilling nonlinearity in an InGaAsP/InGaAsP Multiple Quantum Well (MQW) waveguide due to photogenerated carriers to obtain switching at pulse powers, which can readily be obtained from an erbium amplified diode laser source. In order to produce gating a polarisation rotation gate was used, which relies on an asymmetry in the nonlinear refraction on the principle axes of the waveguide.

A new low-power highly linear mixer design using differential derivative superposition

This paper presents the analysis and design of a new low power and highly linear mixer topology based on a newly reported differential derivative superposition method. Volterra series and harmonic balance are employed to investigate its linearisation mechanism and to optimise the design. A prototype mixer has been designed and is being implemented in 0.18μm CMOS technology. Simulation shows this mixer achieves 19.7dBm IIP3 with 10.5dB conversion gain, 13.2dB noise figure at 2.4GHz and only 3.8mW power consumption. This performance is competitive with already reported mixers.

A high temperature and low power SOI CMOS MEMS based thermal conductivity gas sensor

The design, 3D FEM modelling and measurement results of a novel high temperature, low power SOI CMOS MEMS thermal conductivity gas sensor are presented here. The sensor consists of a circular membrane with an embedded tungsten micro-heater. The high sensing capability is based on the temperature sensitivity of the resistive heating element. The sensor was fabricated at a commercial foundry using a 1 μm process and measures only 1×1 mm 2. The circular membrane has a 600 μm diameter while the heating element has a 320 μm diameter. Measurement results show that for a constant power consumption of 75 mW the heater temperature was 562.4°C in air, 565.9°C in N2, 592.5°C for 1 % H2 in Ar and 599.5°C in Ar. © 2013 IEEE.

800V lateral IGBT in bulk Si for low power compact SMPS applications

An 800V rated lateral IGBT for high frequency, low-cost off-line applications has been developed. The LIGBT features a new method of adjusting the bipolar gain, based on a floating N+ stripe in front of the P+ anode/drain region. The floating N+ layer enhances the carrier recombination at the anode/drain side of the drift region resulting in a very significant decrease in the turn-off speed and substantially lower overall losses. Switching speeds as low as 140ns at 25oC and 300ns at 125oC have been achieved with corresponding equivalent Rdson at 125oC below 90mω.cm2. A fully operational AC-DC converter using a controller with an integrated LIGBT+depletion mode MOSFET chip has been designed and qualified in plastic SOP8 packages and used in 5W, 65kHz SMPS applications. The device is fabricated in 0.6μm bulk silicon CMOS technology without any additional masking steps. © 2013 IEEE.

Monolithic MZI-SOA hybrid switch for low-power and low-penalty operation.

We report the first experimental demonstration of a monolithically integrated hybrid dilated 2×2 modular optical switch using Mach-Zehnder modulators as low-loss 1×2 switching elements and short semiconductor optical amplifiers to provide additional extinction and gain. An excellent 40 dB cross-talk/extinction ratio is recorded with data-modulated signal-to-noise ratios of up to 44 dB in a 0.1 nm bandwidth. A switching time of 3 ns is demonstrated. Bit error rate studies show extremely low subsystem penalties of less than 0.1 dB, and studies indicate that, by using this hybrid switch building block, an 8×8 port switch could be achieved with 14 dB input power dynamic range for subsystem penalties of less than 0.5 dB.

An ultra-low power CMOS random number generator

This paper proposes an ultra-low power CMOS random number generator (RING), which is based on an oscillator-sampling architecture. The noisy oscillator consists of a dual-drain MOS transistor, a noise generator and a voltage control oscillator. The dual-drain MOS transistor can bring extra-noise to the drain current or the output voltage so that the jitter of the oscillator is much larger than the normal oscillator. The frequency division ratio of the high-frequency sampling oscillator and the noisy oscillator is small. The RNG has been fabricated in a 0.35 mu m CMOS process. It can produce good quality bit streams without any post-processing. The bit rate of this RNG could be as high as 100 kbps. It has a typical ultra-low power dissipation of 0.91 mu W. This novel circuit is a promising unit for low power system and communication applications. (c) 2007 Elsevier Ltd. All rights reserved.

Thermo-optic variable optical attenuator with low power consumption fabricated on silicon-on-insulator by anisotropic chemical etching

A thermo-optic Mach-Zehnder (MZ) variable optical attenuator based on silicon waveguides with a large cross section was designed and fabricated on silicon-on-insulator (SOI) wafer. Multimode interferometers were used as power splitters and combiners in the MZ structure. In order to achieve a smooth interface, anisotropic chemical etching of silicon was used to fabricate the waveguides. Isolating grooves were introduced to reduce power consumption and device length. The device has a low power consumption of 210 mW and a response time of 50 mus. (C) 2004 Society of Photo-Optical Instrumentation Engineers.

Low power 2 x 2 thermo-optic SOI waveguide switch fabricated by anisotropy chemical etching

A 2 x 2 thermo-optic (TO) Mach-Zehnder (MZ) switch based on silicon waveguides with large cross section was designed and fabricated on silicon-on-insulator (SOI) wafer. The multi-mode interferometers (MMI) were used as power splitter and combiner in MZ structure. In order to get smooth interface, anisotropy chemical wet-etching of silicon was used to fabricate the waveguides instead of dry-etching. Additional grooves were introduced to reduce power consumption. The device has a low switching power of 235 mW and a switching speed of 60 mus. (C) 2004 Elsevier B.V. All rights reserved.

Low power-consumption and high response frequency thermo-optic variable optical Attenuators based on silicon-on-insulator materials

A novel silicon-on-insulator thermo-optic variable optical attenuator with isolated grooves based on a multimode interference coupler principle is fabricated by the inductive coupled plasma etching technology. The maximum fibre-to-fibre insertion loss is lower than 2.2 dB, the dynamic attenuation range is from 0 to 30 dB in the wavelength range 1500-1600 nm, and the maximum power consumption is only 140 mW. The response frequency of the fabricated variable optical attenuator is about 30 kHz. Compared to the variable optical attenuator without isolated grooves, the maximum power consumption decreases more than 220 mW, and the response frequency rises are more than 20 kHz.

Fabrication and analysis of 2x2 thermo-optic SOI waveguide switch with low power consumption and fast response by anisotropy chemical etching

A low power consumption 2 x 2 thermo-optic switch with fast response was fabricated on silicon-on-insulator by anisotropy chemical etching. Blocking trenches were etched on both sides of the phase-shifting arms to shorten device length and reduce power consumption. Thin top cladding layer was grown to reduce power consumption and switching time. The device showed good characteristics, including a low switching power of 145 mW and a fast switching speed of 8 +/- 1 mus, respectively. Two-dimensional finite element method was applied to simulate temperature field in the phase-shifting arm instead of conventional one-dimensional method. According to the simulated result, a new two-dimensional index distribution of phase-shifting arm was determined. Consequently finite-difference beam propagation method was employed to simulate the light propagation in the switch, and calculate the power consumption as well as the switching speed. The experimental results were in good agreement with the theoretical estimations. (C) 2004 Elsevier B.V. All rights reserved.

A novel ultra low power temperature sensor for UHF RFID tag chip

A novel ultra low power temperature sensor for UHF RFID tag chip is presented. The sensor consists of a constant pulse generator, a temperature related oscillator, a counter and a bias. Conversion of temperature to digital output is fulfilled by counting the number of the clocks of the temperature related oscillator in a constant pulse period. The sensor uses time domain comparing, where high power consumption bandgap voltage references and traditional ADCs are not needed. The sensor is realized in a standard 0.18 mu m CMOS process, and the area is only 0.2mm(2). The accuracy of the temperature sensor is +/- 1 degrees C after calibration. The power consumption of the sensor is only 0.9 mu W.

A Low Power Baseband Chain for CMMB Application

This paper presents experimental results of an analog baseband circuit for China Multimedia Mobile Broadcasting (CMMB) direct conversion receiver in 0.35um SiGe BiCMOS process. It is the first baseband of CMMB RFIC reported so far. A 8(th)-order chebyshev low pass filter (LPF) with calibration system is used in the analog baseband circuit, the filter provides 0.5 dB passband ripple and -35 dB attenuation at 6MHz with the cutoff frequency at 4MHz, the calibration of filter is reported to achieve the bandwidth accuracy of 3%. The baseband variable gain amplifier (VGA) achieves more than 40 dB gain tuning with temperature compensation. In addition, A DC offset cancellation circuit is also introduced to remove the offset from layout and self-mixing, and the remaining offset voltage and current consumption are only 6mV and 412uA respectively. Implemented in a 0.35um SiGe technology with 1.1 mm(2) die size, this tuner baseband achieves OIP3 of 25.5 dBm and dissipate 16.4 mA under 2.8-V supply.

Low Power Integrated Circuits for Wireless Neural Recording Applications

A group of prototype integrated circuits are presented for a wireless neural recording micro-system. An inductive link was built for transcutaneous wireless power transfer and data transmission. Power and data were transmitted by a pair of coils on a same carrier frequency. The integrated receiver circuitry was composed of a full-wave bridge rectifier, a voltage regulator, a date recovery circuit, a clock recovery circuit and a power detector. The amplifiers were designed with a limited bandwidth for neural signals acquisition. An integrated FM transmitter was used to transmit the extracted neural signals to external equipments. 16.5 mW power and 50 bps - 2.5 Kbps command data can be received over 1 MHz carrier within 10 mm. The total gain of 60 dB was obtained by the preamplifier and a main amplifier at 0.95Hz - 13.41 KHz with 0.215 mW power dissipation. The power consumption of the 100 MHz ASK transmitter is 0.374 mW. All the integrated circuits operated under a 3.3 V power supply except the voltage regulator.

Design of Low Power Multi-Standard Active-RC Filter for WLAN and DVB-H

In this paper, a low-power, highly linear, integrated, active-RC filter exhibiting a multi-standard (IEEE 802.11a/b/g and DVB-H) application and bandwidth (3MHz, 4MHz, 9.5MHz) is present. The filter exploits digitally-controlled polysilicon resister banks and an accurate automatic tuning scheme to account for process and temperature variations. The automatic frequency calibration scheme provides better than 3% corner frequency accuracy. The Butterworth filter is design for receiver (WLAN and DVB-H mode) and transmitter (WLAN mode). The filter dissipation is 3.4 mA in RX mode and 2.3 mA (only for one path) in TX mode from 2.85-V supply. The dissipation of calibration consumes 2mA. The circuit has been fabricated in a 0.35um 47-GHz SiGe BiCMOS technology, the receiver and transmitter occupy 0.28-mm(2) and 0.16-mm(2) (calibration circuit excluded), respectively.

A Novel Low-Power Digital Baseband Circuit for UHF RFID Tag with Sensors

A novel low-power digital baseband circuit for UHF RFID tag with sensors is presented in this paper. It proposes a novel baseband architecture and a new operating scheme to fulfill the sensor functions and to reduce power consumption. It is also compatible with the EPC C1G2 UHF RFID protocol. It adopts some advanced low power techniques for system design and circuit design: adaptive clock-gating, multi-clock domain and asynchronous circuit. The baseband circuit is implemented in 0.18um 1P3M standard CMOS process. ne chip area is 0.28 mm(2) excluding test pads. Its power consumption is 25uW under 1.1V power supply.