An outline of political economy, designed for seminaries, and intended to explain the principles of this important science, by familiar examples, and to exhibit more particularly the great importance of agriculture, mining industry, manufactures, and internal imporvements to national wealth and prosperity.

Goldsmiths'-Kress no. 25475.11.

The new views of Mr. Owen of Lanark impartially examined : as rational means of ultimately promoting the productive industry, comfort, moral improvement, and happiness of the labouring classes of society, and of the poor : and of training up children in the way in which they should go : also observations on the New Lanark School ... /

Kress Lib.

An address to the public from the Philanthropic Society : instituted in MDCCLXXXVIII, for the promotion of industry, and the reform of the criminal poor : to which are annexed the laws and regulations of the Society, &c.

Cover title.

Pottery, a history of the pottery industry and its evolution as applied to sanitation,

Mode of access: Internet.

Report of the Royal Commission on the Coal Industry (1925) : with Minutes of evidence and Appendices ...

"Presented to Parliament by Command of His Majesty."

International trade and the impact on the U.S. soda ash industry : hearing before the Subcommittee on International Trade of the Committee on Finance, United States Senate, One Hundred Eighth Congress, second session (Rock Springs, WY) April 15, 2004.

Distributed to some depository libraries in microfiche.

National housing act : hearings before the Committee on Banking and Currency, United States Senate, Seventy-third Congress, second session, on S. 3603, a bill to improve nation-wide housing standards, provide employment and stimulate industry ; to improve conditions with respect to home mortgage investment, and to eliminate the necessity for costly second-mortgage financing, by creating a system of mutual mortgage insurance and by making provision for the organization of additional institutions to handle home financing ; to promote thrift and protect savings ; to amend the Federal home loan bank act ; to amend the Federal reserve act ; and for other purposes. May 16-24, 1934.

Duncan U. Fletcher, chairman.

Government control of the meat-packing industry. Hearings before the Committee on Agriculture and Forestry, United States Senate, Sixty-fifth Congress, third session, on S. 5305, a bill to stimulate the production, sale, and distribution of live stock and live-stock products, and for other purposes. Part I-[2]. ... .

Printed for the use of the Committee on Agriculture and Forestry.

Farm products in industry,

"Based on a survey which the author made during the winter of 1927-28 for Hon. W.M. Jardine, United States secretary of agriculture, of research data in Washington and elsewhere which have a bearing on the industrial utilization of farm products."--Pref.

A free farmer in a free state: a study of rural life and industry and agricultural politics in an agricultural country,

Plates, except first, printed on both sides.

A heuristic algorithm to generate test program sequences for moving probe electronic test equipment

The electronics industry, is experiencing two trends one of which is the drive towards miniaturization of electronic products. The in-circuit testing predominantly used for continuity testing of printed circuit boards (PCB) can no longer meet the demands of smaller size circuits. This has lead to the development of moving probe testing equipment. Moving Probe Test opens up the opportunity to test PCBs where the test points are on a small pitch (distance between points). However, since the test uses probes that move sequentially to perform the test, the total test time is much greater than traditional in-circuit test. While significant effort has concentrated on the equipment design and development, little work has examined algorithms for efficient test sequencing. The test sequence has the greatest impact on total test time, which will determine the production cycle time of the product. Minimizing total test time is a NP-hard problem similar to the traveling salesman problem, except with two traveling salesmen that must coordinate their movements. The main goal of this thesis was to develop a heuristic algorithm to minimize the Flying Probe test time and evaluate the algorithm against a "Nearest Neighbor" algorithm. The algorithm was implemented with Visual Basic and MS Access database. The algorithm was evaluated with actual PCB test data taken from Industry. A statistical analysis with 95% C.C. was performed to test the hypothesis that the proposed algorithm finds a sequence which has a total test time less than the total test time found by the "Nearest Neighbor" approach. Findings demonstrated that the proposed heuristic algorithm reduces the total test time of the test and, therefore, production cycle time can be reduced through proper sequencing.

Testing of Interposer-Based 2.5D Integrated Circuits

The unprecedented and relentless growth in the electronics industry is feeding the demand for integrated circuits (ICs) with increasing functionality and performance at minimum cost and power consumption. As predicted by Moore's law, ICs are being aggressively scaled to meet this demand. While the continuous scaling of process technology is reducing gate delays, the performance of ICs is being increasingly dominated by interconnect delays. In an effort to improve submicrometer interconnect performance, to increase packing density, and to reduce chip area and power consumption, the semiconductor industry is focusing on three-dimensional (3D) integration. However, volume production and commercial exploitation of 3D integration are not feasible yet due to significant technical hurdles.

At the present time, interposer-based 2.5D integration is emerging as a precursor to stacked 3D integration. All the dies and the interposer in a 2.5D IC must be adequately tested for product qualification. However, since the structure of 2.5D ICs is different from the traditional 2D ICs, new challenges have emerged: (1) pre-bond interposer testing, (2) lack of test access, (3) limited ability for at-speed testing, (4) high density I/O ports and interconnects, (5) reduced number of test pins, and (6) high power consumption. This research targets the above challenges and effective solutions have been developed to test both dies and the interposer.

The dissertation first introduces the basic concepts of 3D ICs and 2.5D ICs. Prior work on testing of 2.5D ICs is studied. An efficient method is presented to locate defects in a passive interposer before stacking. The proposed test architecture uses e-fuses that can be programmed to connect or disconnect functional paths inside the interposer. The concept of a die footprint is utilized for interconnect testing, and the overall assembly and test flow is described. Moreover, the concept of weighted critical area is defined and utilized to reduce test time. In order to fully determine the location of each e-fuse and the order of functional interconnects in a test path, we also present a test-path design algorithm. The proposed algorithm can generate all test paths for interconnect testing.

In order to test for opens, shorts, and interconnect delay defects in the interposer, a test architecture is proposed that is fully compatible with the IEEE 1149.1 standard and relies on an enhancement of the standard test access port (TAP) controller. To reduce test cost, a test-path design and scheduling technique is also presented that minimizes a composite cost function based on test time and the design-for-test (DfT) overhead in terms of additional through silicon vias (TSVs) and micro-bumps needed for test access. The locations of the dies on the interposer are taken into consideration in order to determine the order of dies in a test path.

To address the scenario of high density of I/O ports and interconnects, an efficient built-in self-test (BIST) technique is presented that targets the dies and the interposer interconnects. The proposed BIST architecture can be enabled by the standard TAP controller in the IEEE 1149.1 standard. The area overhead introduced by this BIST architecture is negligible; it includes two simple BIST controllers, a linear-feedback-shift-register (LFSR), a multiple-input-signature-register (MISR), and some extensions to the boundary-scan cells in the dies on the interposer. With these extensions, all boundary-scan cells can be used for self-configuration and self-diagnosis during interconnect testing. To reduce the overall test cost, a test scheduling and optimization technique under power constraints is described.

In order to accomplish testing with a small number test pins, the dissertation presents two efficient ExTest scheduling strategies that implements interconnect testing between tiles inside an system on chip (SoC) die on the interposer while satisfying the practical constraint that the number of required test pins cannot exceed the number of available pins at the chip level. The tiles in the SoC are divided into groups based on the manner in which they are interconnected. In order to minimize the test time, two optimization solutions are introduced. The first solution minimizes the number of input test pins, and the second solution minimizes the number output test pins. In addition, two subgroup configuration methods are further proposed to generate subgroups inside each test group.

Finally, the dissertation presents a programmable method for shift-clock stagger assignment to reduce power supply noise during SoC die testing in 2.5D ICs. An SoC die in the 2.5D IC is typically composed of several blocks and two neighboring blocks that share the same power rails should not be toggled at the same time during shift. Therefore, the proposed programmable method does not assign the same stagger value to neighboring blocks. The positions of all blocks are first analyzed and the shared boundary length between blocks is then calculated. Based on the position relationships between the blocks, a mathematical model is presented to derive optimal result for small-to-medium sized problems. For larger designs, a heuristic algorithm is proposed and evaluated.

In summary, the dissertation targets important design and optimization problems related to testing of interposer-based 2.5D ICs. The proposed research has led to theoretical insights, experiment results, and a set of test and design-for-test methods to make testing effective and feasible from a cost perspective.

Guiding public protest: assessing the propaganda model of China’s hybrid newspaper industry

This dissertation presents an account and analysis of published mainland Chinese media coverage surrounding three major events of public protest during the Hu-Wen era (2003-2013). The research makes a qualitative analysis of printed material drawn from a range of news outlets, differentiated by their specific political and commercial affiliations. The goal of the research is to better understand the role of mainstream media in social conflict resolution, a hitherto under-studied area, and to identify gradations within the ostensibly monolithic mainland Chinese media on issues of political sensitivity. China’s modern media formation displays certain characteristics of Anglophone media at its hyper-commercialised, populist core. However, the Chinese state retains an explicit, though often ambiguous, remit to engage with news production. Because of this, Chinese newspapers are often assumed to be one-dimensional propaganda ‘tools’ and, accordingly, easily dismissed from analyses of public protest. This research finds that, in an area where political actors have rescinded their monopoly on communicative power, a result of both policy decisions and the rise of Internet-based media platforms, established purveyors of news have acquired greater latitude to report on hitherto sensitive episodes of conflict but do so under the burden of having to correctly guide public opinion. The thesis examines the discursive resources that are deployed in this task, as well as reporting patterns which are suggestive of a new propaganda approach to handling social conflict within public media. Beside the explicitly political nature of coverage of protest events, the study sheds lights on gradations within China’s complex, hybrid media landscape both in terms of institutional purpose and qualitative performance.

High-Performance WSe2 CMOS Technology and Integrated Circuits.

Because of their extraordinary structural and electrical properties, two dimensional materials are currently being pursued for applications such as thin-film transistors and integrated circuit. One of the main challenges that still needs to be overcome for these applications is the fabrication of air-stable transistors with industry-compatible complementary metal oxide semiconductor (CMOS) technology. In this work, we experimentally demonstrate a novel high performance air-stable WSe2 CMOS technology with almost ideal voltage transfer characteristic, full logic swing and high noise margin with different supply voltages. More importantly, the inverter shows large voltage gain (~38) and small static power (Pico-Watts), paving the way for low power electronic system in 2D materials.

Electrical characterization of electronic circuits produced by inkjet printing

Dissertação de Mestrado, Engenharia Electrónica e Telecomunicações, Faculdade de Ciências e Tecnologia, Universidade do Algarve, 2014