Neonatally induced mild diabetes: influence on development, behavior and reproductive function of female Wistar rats

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Internal standard for amorphous pharmaceuticals products quantification and an application of Parametric Rietveld refinement using time, temperature and relative humidity as 'non-crystallographic' parameters

Pós-graduação em Química - IQ

Non-parametric identification of a non-linear buckled beam using discrete-time Volterra Series

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

The effects of high-intensity resistance exercise on the blood lipid profile and liver function in hypercholesterolemic hamsters

It is well established that atherogenic dyslipidemia, characterized by high levels of triglycerides (TG), total cholesterol (TC), and low-density lipoprotein (LDL) cholesterol and low levels of high-density lipoprotein (HDL) cholesterol, constitutes important risk factors for cardiovascular disease. Regular exercise has been associated with a reduced risk for metabolic diseases. However, studies supporting the concept that resistance exercise is a modifier of blood lipid parameters are often contradictory. The aim of this study was to investigate the effects of high-intensity resistance exercise on the serum levels of TG, TC, HDL and non-HDL cholesterol, glucose, and the liver function enzymes alanine aminotransferase (ALT, EC 2.6.1.2) and aspartate aminotransferase (AST, EC 2.6.1.1) in golden Syrian hamsters (Mesocricetus auratus (Waterhouse, 1839)) fed a hypercholesterolemic diet. Sedentary groups (S) and exercise groups (E) were fed a standard diet (SS and ES) or a cholesterol-enriched diet (standard plus 1% cholesterol, SC and EC). Resistance exercise was performed by jumps in the water, carrying a load strapped to the chest, representing 10 maximum repetitions (10 RM, 30 s rest, five days per week for five weeks). Mean blood sample comparisons were made by ANOVA + Tukey or ANOVA + Kruskal-Wallis tests (p < 0.05) to compare parametric and nonparametric samples, respectively. There were no differences in blood lipids between the standard diet groups (SS and ES) (p > 0.05). However, the EC group increased the glucose, non-HDL, and TC levels in comparison with the ES group. Moreover, the EC group increased the TG levels versus the SC group (p < 0.05). In addition, the ALT levels were increased only by diet treatment. These findings indicated that high-intensity resistance exercise contributed to dyslipidemia in hamsters fed a hypercholesterolemic diet, whereas liver function enzymes did not differ in regards to the exercise protocol.

Scalar field description for parametric models of dark energy

We investigate theoretical and observational aspects of a time-dependent parameterization for the dark energy equation of state w(z), which is a well behaved function of the redshift z over the entire cosmological evolution, i.e., z is an element of [-1, infinity). By using a theoretical algorithm of constructing the quintes-sence potential directly from the w(z) function, we derive and discuss the general features of the resulting potential for the cases in which dark energy is separately conserved and when it is coupled to dark matter. Since the parameterization here discussed allows us to divide the parametric plane in defined regions associated to distinct classes of dark energy models, we use some of the most recent observations from type Ia supernovae, baryon acoustic oscillation peak and Cosmic Microwave Background shift parameter to check which class is observationally preferred. We show that the largest portion of the confidence contours lies into the region corresponding to a possible crossing of the so-called phantom divide line at some point of the cosmic evolution.

Neonatally induced mild diabetes: influence on development, behavior and reproductive function of female Wistar rats

Abstract Background Neonatal STZ treatment induces a state of mild hyperglycemia in adult rats that disrupts metabolism and maternal/fetal interactions. The aim of this study was investigate the effect of neonatal STZ treatment on the physical development, behavior, and reproductive function of female Wistar rats from infancy to adulthood. Methods At birth, litters were assigned either to a Control (subcutaneous (s.c.) citrate buffer, n = 10) or STZ group, (streptozotocin (STZ) - 100 mg/kg-sc, n = 6). Blood glucose levels were measured on postnatal days (PND) 35, 84 and 120. In Experiment 1 body weight, length and the appearance of developmental milestones such as eye and vaginal opening were monitored. To assess the relative contribution of the initial and long term effects of STZ treatment this group was subdivided based on blood glucose levels recorded on PND 120: STZ hyperglycemic (between 120 and 300 mg/dl) and STZ normoglycemic (under 120 mg/dl). Behavioral activity was assessed in an open field on PND 21 and 75. In Experiment 2 estrous cyclicity, sexual behavior and circulating gonadotropin, ovarian steroid, and insulin levels were compared between control and STZ-hyperglycemic rats. In all measures the litter was the experimental unit. Parametric data were analyzed using one-way or, where appropriate, two-way ANOVA and significant effects were investigated using Tukey’s post hoc test. Fisher’s exact test was employed when data did not satisfy the assumption of normality e.g. presence of urine and fecal boli on the open field between groups. Statistical significance was set at p < 0.05 for all data. Results As expected neonatal STZ treatment caused hyperglycemia and hypoinsulinemia in adulthood. STZ-treated pups also showed a temporary reduction in growth rate that probably reflected the early loss of circulating insulin. Hyperglycemic rats also exhibited a reduction in locomotor and exploratory behavior in the open field. Mild hyperglycemia did not impair gonadotropin levels or estrous cylicity but ovarian steroid concentrations were altered. Conclusions In female Wistar rats, neonatal STZ treatment impairs growth in infancy and results in mild hyperglycemia/hypoinsulinemia in adulthood that is associated with changes in the response to a novel environment and altered ovarian steroid hormone levels.

Parametric combustion modeling for ethanol-gasoline fuelled spark ignition engines

Ethanol-gasoline fuel blends are increasingly being used in spark ignition (SI) engines due to continued growth in renewable fuels as part of a growing renewable portfolio standard (RPS). This leads to the need for a simple and accurate ethanol-gasoline blends combustion model that is applicable to one-dimensional engine simulation. A parametric combustion model has been developed, integrated into an engine simulation tool, and validated using SI engine experimental data. The parametric combustion model was built inside a user compound in GT-Power. In this model, selected burn durations were computed using correlations as functions of physically based non-dimensional groups that have been developed using the experimental engine database over a wide range of ethanol-gasoline blends, engine geometries, and operating conditions. A coefficient of variance (COV) of gross indicated mean effective pressure (IMEP) correlation was also added to the parametric combustion model. This correlation enables the cycle combustion variation modeling as a function of engine geometry and operating conditions. The computed burn durations were then used to fit single and double Wiebe functions. The single-Wiebe parametric combustion compound used the least squares method to compute the single-Wiebe parameters, while the double-Wiebe parametric combustion compound used an analytical solution to compute the double-Wiebe parameters. These compounds were then integrated into the engine model in GT-Power through the multi-Wiebe combustion template in which the values of Wiebe parameters (single-Wiebe or double-Wiebe) were sensed via RLT-dependence. The parametric combustion models were validated by overlaying the simulated pressure trace from GT-Power on to experimentally measured pressure traces. A thermodynamic engine model was also developed to study the effect of fuel blends, engine geometries and operating conditions on both the burn durations and COV of gross IMEP simulation results.

Analyzing left-truncated right-censored data with uncertain onset time with parametric models

Prevalent sampling is an efficient and focused approach to the study of the natural history of disease. Right-censored time-to-event data observed from prospective prevalent cohort studies are often subject to left-truncated sampling. Left-truncated samples are not randomly selected from the population of interest and have a selection bias. Extensive studies have focused on estimating the unbiased distribution given left-truncated samples. However, in many applications, the exact date of disease onset was not observed. For example, in an HIV infection study, the exact HIV infection time is not observable. However, it is known that the HIV infection date occurred between two observable dates. Meeting these challenges motivated our study. We propose parametric models to estimate the unbiased distribution of left-truncated, right-censored time-to-event data with uncertain onset times. We first consider data from a length-biased sampling, a specific case in left-truncated samplings. Then we extend the proposed method to general left-truncated sampling. With a parametric model, we construct the full likelihood, given a biased sample with unobservable onset of disease. The parameters are estimated through the maximization of the constructed likelihood by adjusting the selection bias and unobservable exact onset. Simulations are conducted to evaluate the finite sample performance of the proposed methods. We apply the proposed method to an HIV infection study, estimating the unbiased survival function and covariance coefficients. ^

Low Work-Function Thermionic Emission and Orbital-Motion-Limited Ion Collection at Bare-Tether Cathodic Contact

Una amarra electrodinámica (electrodynamic tether) opera sobre principios electromagnéticos intercambiando momento con la magnetosfera planetaria e interactuando con su ionosfera. Es un subsistema pasivo fiable para desorbitar etapas de cohetes agotadas y satélites al final de su misión, mitigando el crecimiento de la basura espacial. Una amarra sin aislamiento captura electrones del plasma ambiente a lo largo de su segmento polarizado positivamente, el cual puede alcanzar varios kilómetros de longitud, mientras que emite electrones de vuelta al plasma mediante un contactor de plasma activo de baja impedancia en su extremo catódico, tal como un cátodo hueco (hollow cathode). En ausencia de un contactor catódico activo, la corriente que circula por una amarra desnuda en órbita es nula en ambos extremos de la amarra y se dice que ésta está flotando eléctricamente. Para emisión termoiónica despreciable y captura de corriente en condiciones limitadas por movimiento orbital (orbital-motion-limited, OML), el cociente entre las longitudes de los segmentos anódico y catódico es muy pequeño debido a la disparidad de masas entre iones y electrones. Tal modo de operación resulta en una corriente media y fuerza de Lorentz bajas en la amarra, la cual es poco eficiente como dispositivo para desorbitar. El electride C12A7 : e−, que podría presentar una función de trabajo (work function) tan baja como W = 0.6 eV y un comportamiento estable a temperaturas relativamente altas, ha sido propuesto como recubrimiento para amarras desnudas. La emisión termoiónica a lo largo de un segmento así recubierto y bajo el calentamiento de la operación espacial, puede ser más eficiente que la captura iónica. En el modo más simple de fuerza de frenado, podría eliminar la necesidad de un contactor catódico activo y su correspondientes requisitos de alimentación de gas y subsistema de potencia, lo que resultaría en un sistema real de amarra “sin combustible”. Con este recubrimiento de bajo W, cada segmento elemental del segmento catódico de una amarra desnuda de kilómetros de longitud emitiría corriente como si fuese parte de una sonda cilíndrica, caliente y uniformemente polarizada al potencial local de la amarra. La operación es similar a la de una sonda de Langmuir 2D tanto en los segmentos catódico como anódico. Sin embargo, en presencia de emisión, los electrones emitidos resultan en carga espacial (space charge) negativa, la cual reduce el campo eléctrico que los acelera hacia fuera, o incluso puede desacelerarlos y hacerlos volver a la sonda. Se forma una doble vainas (double sheath) estable con electrones emitidos desde la sonda e iones provenientes del plasma ambiente. La densidad de corriente termoiónica, variando a lo largo del segmento catódico, podría seguir dos leyes distintas bajo diferentes condiciones: (i) la ley de corriente limitada por la carga espacial (space-charge-limited, SCL) o (ii) la ley de Richardson-Dushman (RDS). Se presenta un estudio preliminar sobre la corriente SCL frente a una sonda emisora usando la teoría de vainas (sheath) formada por la captura iónica en condiciones OML, y la corriente electrónica SCL entre los electrodos cilíndricos según Langmuir. El modelo, que incluye efectos óhmicos y el efecto de transición de emisión SCL a emisión RDS, proporciona los perfiles de corriente y potencial a lo largo de la longitud completa de la amarra. El análisis muestra que en el modo más simple de fuerza de frenado, bajo condiciones orbitales y de amarras típicas, la emisión termoiónica proporciona un contacto catódico eficiente y resulta en una sección catódica pequeña. En el análisis anterior, tanto la transición de emisión SCL a RD como la propia ley de emisión SCL consiste en un modelo muy simplificado. Por ello, a continuación se ha estudiado con detalle la solución de vaina estacionaria de una sonda con emisión termoiónica polarizada negativamente respecto a un plasma isotrópico, no colisional y sin campo magnético. La existencia de posibles partículas atrapadas ha sido ignorada y el estudio incluye tanto un estudio semi-analítico mediante técnica asintóticas como soluciones numéricas completas del problema. Bajo las tres condiciones (i) alto potencial, (ii) R = Rmax para la validez de la captura iónica OML, y (iii) potencial monotónico, se desarrolla un análisis asintótico auto-consistente para la estructura de plasma compleja que contiene las tres especies de cargas (electrones e iones del plasma, electrones emitidos), y cuatro regiones espaciales distintas, utilizando teorías de movimiento orbital y modelos cinéticos de las especies. Aunque los electrones emitidos presentan carga espacial despreciable muy lejos de la sonda, su efecto no se puede despreciar en el análisis global de la estructura de la vaina y de dos capas finas entre la vaina y la región cuasi-neutra. El análisis proporciona las condiciones paramétricas para que la corriente sea SCL. También muestra que la emisión termoiónica aumenta el radio máximo de la sonda para operar dentro del régimen OML y que la emisión de electrones es mucho más eficiente que la captura iónica para el segmento catódico de la amarra. En el código numérico, los movimientos orbitales de las tres especies son modelados para potenciales tanto monotónico como no-monotónico, y sonda de radio R arbitrario (dentro o más allá del régimen de OML para la captura iónica). Aprovechando la existencia de dos invariante, el sistema de ecuaciones Poisson-Vlasov se escribe como una ecuación integro-diferencial, la cual se discretiza mediante un método de diferencias finitas. El sistema de ecuaciones algebraicas no lineal resultante se ha resuelto de con un método Newton-Raphson paralelizado. Los resultados, comparados satisfactoriamente con el análisis analítico, proporcionan la emisión de corriente y la estructura del plasma y del potencial electrostático. ABSTRACT An electrodynamic tether operates on electromagnetic principles and exchanges momentum through the planetary magnetosphere, by continuously interacting with the ionosphere. It is a reliable passive subsystem to deorbit spent rocket stages and satellites at its end of mission, mitigating the growth of orbital debris. A tether left bare of insulation collects electrons by its own uninsulated and positively biased segment with kilometer range, while electrons are emitted by a low-impedance active device at the cathodic end, such as a hollow cathode, to emit the full electron current. In the absence of an active cathodic device, the current flowing along an orbiting bare tether vanishes at both ends and the tether is said to be electrically floating. For negligible thermionic emission and orbital-motion-limited (OML) collection throughout the entire tether (electron/ion collection at anodic/cathodic segment, respectively), the anodic-to-cathodic length ratio is very small due to ions being much heavier, which results in low average current and Lorentz drag. The electride C12A7 : e−, which might present a possible work function as low as W = 0.6 eV and moderately high temperature stability, has been proposed as coating for floating bare tethers. Thermionic emission along a thus coated cathodic segment, under heating in space operation, can be more efficient than ion collection and, in the simplest drag mode, may eliminate the need for an active cathodic device and its corresponding gas-feed requirements and power subsystem, which would result in a truly “propellant-less” tether system. With this low-W coating, each elemental segment on the cathodic segment of a kilometers-long floating bare-tether would emit current as if it were part of a hot cylindrical probe uniformly polarized at the local tether bias, under 2D probe conditions that are also applied to the anodic-segment analysis. In the presence of emission, emitted electrons result in negative space charge, which decreases the electric field that accelerates them outwards, or even reverses it, decelerating electrons near the emitting probe. A double sheath would be established with electrons being emitted from the probe and ions coming from the ambient plasma. The thermionic current density, varying along the cathodic segment, might follow two distinct laws under different con ditions: i) space-charge-limited (SCL) emission or ii) full Richardson-Dushman (RDS) emission. A preliminary study on the SCL current in front of an emissive probe is presented using the orbital-motion-limited (OML) ion-collection sheath and Langmuir’s SCL electron current between cylindrical electrodes. A detailed calculation of current and bias profiles along the entire tether length is carried out with ohmic effects considered and the transition from SCL to full RDS emission is included. Analysis shows that in the simplest drag mode, under typical orbital and tether conditions, thermionic emission provides efficient cathodic contact and leads to a short cathodic section. In the previous analysis, both the transition between SCL and RDS emission and the current law for SCL condition have used a very simple model. To continue, considering an isotropic, unmagnetized, colissionless plasma and a stationary sheath, the probe-plasma contact is studied in detail for a negatively biased probe with thermionic emission. The possible trapped particles are ignored and this study includes both semianalytical solutions using asymptotic analysis and complete numerical solutions. Under conditions of i) high bias, ii) R = Rmax for ion OML collection validity, and iii) monotonic potential, a self-consistent asymptotic analysis is carried out for the complex plasma structure involving all three charge species (plasma electrons and ions, and emitted electrons) and four distinct spatial regions using orbital motion theories and kinetic modeling of the species. Although emitted electrons present negligible space charge far away from the probe, their effect cannot be neglected in the global analysis for the sheath structure and two thin layers in between the sheath and the quasineutral region. The parametric conditions for the current to be space-chargelimited are obtained. It is found that thermionic emission increases the range of probe radius for OML validity and is greatly more effective than ion collection for cathodic contact of tethers. In the numerical code, the orbital motions of all three species are modeled for both monotonic and non-monotonic potential, and for any probe radius R (within or beyond OML regime for ion collection). Taking advantage of two constants of motion (energy and angular momentum), the Poisson-Vlasov equation is described by an integro differential equation, which is discretized using finite difference method. The non-linear algebraic equations are solved using a parallel implementation of the Newton-Raphson method. The results, which show good agreement with the analytical results, provide the results for thermionic current, the sheath structure, and the electrostatic potential.

Parametric and structural self-adaptation of embedded systems using evolvable hardware

Los sistemas empotrados han sido concebidos tradicionalmente como sistemas de procesamiento específicos que realizan una tarea fija durante toda su vida útil. Para cumplir con requisitos estrictos de coste, tamaño y peso, el equipo de diseño debe optimizar su funcionamiento para condiciones muy específicas. Sin embargo, la demanda de mayor versatilidad, un funcionamiento más inteligente y, en definitiva, una mayor capacidad de procesamiento comenzaron a chocar con estas limitaciones, agravado por la incertidumbre asociada a entornos de operación cada vez más dinámicos donde comenzaban a ser desplegados progresivamente. Esto trajo como resultado una necesidad creciente de que los sistemas pudieran responder por si solos a eventos inesperados en tiempo diseño tales como: cambios en las características de los datos de entrada y el entorno del sistema en general; cambios en la propia plataforma de cómputo, por ejemplo debido a fallos o defectos de fabricación; y cambios en las propias especificaciones funcionales causados por unos objetivos del sistema dinámicos y cambiantes. Como consecuencia, la complejidad del sistema aumenta, pero a cambio se habilita progresivamente una capacidad de adaptación autónoma sin intervención humana a lo largo de la vida útil, permitiendo que tomen sus propias decisiones en tiempo de ejecución. Éstos sistemas se conocen, en general, como sistemas auto-adaptativos y tienen, entre otras características, las de auto-configuración, auto-optimización y auto-reparación. Típicamente, la parte soft de un sistema es mayoritariamente la única utilizada para proporcionar algunas capacidades de adaptación a un sistema. Sin embargo, la proporción rendimiento/potencia en dispositivos software como microprocesadores en muchas ocasiones no es adecuada para sistemas empotrados. En este escenario, el aumento resultante en la complejidad de las aplicaciones está siendo abordado parcialmente mediante un aumento en la complejidad de los dispositivos en forma de multi/many-cores; pero desafortunadamente, esto hace que el consumo de potencia también aumente. Además, la mejora en metodologías de diseño no ha sido acorde como para poder utilizar toda la capacidad de cómputo disponible proporcionada por los núcleos. Por todo ello, no se están satisfaciendo adecuadamente las demandas de cómputo que imponen las nuevas aplicaciones. La solución tradicional para mejorar la proporción rendimiento/potencia ha sido el cambio a unas especificaciones hardware, principalmente usando ASICs. Sin embargo, los costes de un ASIC son altamente prohibitivos excepto en algunos casos de producción en masa y además la naturaleza estática de su estructura complica la solución a las necesidades de adaptación. Los avances en tecnologías de fabricación han hecho que la FPGA, una vez lenta y pequeña, usada como glue logic en sistemas mayores, haya crecido hasta convertirse en un dispositivo de cómputo reconfigurable de gran potencia, con una cantidad enorme de recursos lógicos computacionales y cores hardware empotrados de procesamiento de señal y de propósito general. Sus capacidades de reconfiguración han permitido combinar la flexibilidad propia del software con el rendimiento del procesamiento en hardware, lo que tiene la potencialidad de provocar un cambio de paradigma en arquitectura de computadores, pues el hardware no puede ya ser considerado más como estático. El motivo es que como en el caso de las FPGAs basadas en tecnología SRAM, la reconfiguración parcial dinámica (DPR, Dynamic Partial Reconfiguration) es posible. Esto significa que se puede modificar (reconfigurar) un subconjunto de los recursos computacionales en tiempo de ejecución mientras el resto permanecen activos. Además, este proceso de reconfiguración puede ser ejecutado internamente por el propio dispositivo. El avance tecnológico en dispositivos hardware reconfigurables se encuentra recogido bajo el campo conocido como Computación Reconfigurable (RC, Reconfigurable Computing). Uno de los campos de aplicación más exóticos y menos convencionales que ha posibilitado la computación reconfigurable es el conocido como Hardware Evolutivo (EHW, Evolvable Hardware), en el cual se encuentra enmarcada esta tesis. La idea principal del concepto consiste en convertir hardware que es adaptable a través de reconfiguración en una entidad evolutiva sujeta a las fuerzas de un proceso evolutivo inspirado en el de las especies biológicas naturales, que guía la dirección del cambio. Es una aplicación más del campo de la Computación Evolutiva (EC, Evolutionary Computation), que comprende una serie de algoritmos de optimización global conocidos como Algoritmos Evolutivos (EA, Evolutionary Algorithms), y que son considerados como algoritmos universales de resolución de problemas. En analogía al proceso biológico de la evolución, en el hardware evolutivo el sujeto de la evolución es una población de circuitos que intenta adaptarse a su entorno mediante una adecuación progresiva generación tras generación. Los individuos pasan a ser configuraciones de circuitos en forma de bitstreams caracterizados por descripciones de circuitos reconfigurables. Seleccionando aquellos que se comportan mejor, es decir, que tienen una mejor adecuación (o fitness) después de ser evaluados, y usándolos como padres de la siguiente generación, el algoritmo evolutivo crea una nueva población hija usando operadores genéticos como la mutación y la recombinación. Según se van sucediendo generaciones, se espera que la población en conjunto se aproxime a la solución óptima al problema de encontrar una configuración del circuito adecuada que satisfaga las especificaciones. El estado de la tecnología de reconfiguración después de que la familia de FPGAs XC6200 de Xilinx fuera retirada y reemplazada por las familias Virtex a finales de los 90, supuso un gran obstáculo para el avance en hardware evolutivo; formatos de bitstream cerrados (no conocidos públicamente); dependencia de herramientas del fabricante con soporte limitado de DPR; una velocidad de reconfiguración lenta; y el hecho de que modificaciones aleatorias del bitstream pudieran resultar peligrosas para la integridad del dispositivo, son algunas de estas razones. Sin embargo, una propuesta a principios de los años 2000 permitió mantener la investigación en el campo mientras la tecnología de DPR continuaba madurando, el Circuito Virtual Reconfigurable (VRC, Virtual Reconfigurable Circuit). En esencia, un VRC en una FPGA es una capa virtual que actúa como un circuito reconfigurable de aplicación específica sobre la estructura nativa de la FPGA que reduce la complejidad del proceso reconfiguración y aumenta su velocidad (comparada con la reconfiguración nativa). Es un array de nodos computacionales especificados usando descripciones HDL estándar que define recursos reconfigurables ad-hoc: multiplexores de rutado y un conjunto de elementos de procesamiento configurables, cada uno de los cuales tiene implementadas todas las funciones requeridas, que pueden seleccionarse a través de multiplexores tal y como ocurre en una ALU de un microprocesador. Un registro grande actúa como memoria de configuración, por lo que la reconfiguración del VRC es muy rápida ya que tan sólo implica la escritura de este registro, el cual controla las señales de selección del conjunto de multiplexores. Sin embargo, esta capa virtual provoca: un incremento de área debido a la implementación simultánea de cada función en cada nodo del array más los multiplexores y un aumento del retardo debido a los multiplexores, reduciendo la frecuencia de funcionamiento máxima. La naturaleza del hardware evolutivo, capaz de optimizar su propio comportamiento computacional, le convierten en un buen candidato para avanzar en la investigación sobre sistemas auto-adaptativos. Combinar un sustrato de cómputo auto-reconfigurable capaz de ser modificado dinámicamente en tiempo de ejecución con un algoritmo empotrado que proporcione una dirección de cambio, puede ayudar a satisfacer los requisitos de adaptación autónoma de sistemas empotrados basados en FPGA. La propuesta principal de esta tesis está por tanto dirigida a contribuir a la auto-adaptación del hardware de procesamiento de sistemas empotrados basados en FPGA mediante hardware evolutivo. Esto se ha abordado considerando que el comportamiento computacional de un sistema puede ser modificado cambiando cualquiera de sus dos partes constitutivas: una estructura hard subyacente y un conjunto de parámetros soft. De esta distinción, se derivan dos lineas de trabajo. Por un lado, auto-adaptación paramétrica, y por otro auto-adaptación estructural. El objetivo perseguido en el caso de la auto-adaptación paramétrica es la implementación de técnicas de optimización evolutiva complejas en sistemas empotrados con recursos limitados para la adaptación paramétrica online de circuitos de procesamiento de señal. La aplicación seleccionada como prueba de concepto es la optimización para tipos muy específicos de imágenes de los coeficientes de los filtros de transformadas wavelet discretas (DWT, DiscreteWavelet Transform), orientada a la compresión de imágenes. Por tanto, el objetivo requerido de la evolución es una compresión adaptativa y más eficiente comparada con los procedimientos estándar. El principal reto radica en reducir la necesidad de recursos de supercomputación para el proceso de optimización propuesto en trabajos previos, de modo que se adecúe para la ejecución en sistemas empotrados. En cuanto a la auto-adaptación estructural, el objetivo de la tesis es la implementación de circuitos auto-adaptativos en sistemas evolutivos basados en FPGA mediante un uso eficiente de sus capacidades de reconfiguración nativas. En este caso, la prueba de concepto es la evolución de tareas de procesamiento de imagen tales como el filtrado de tipos desconocidos y cambiantes de ruido y la detección de bordes en la imagen. En general, el objetivo es la evolución en tiempo de ejecución de tareas de procesamiento de imagen desconocidas en tiempo de diseño (dentro de un cierto grado de complejidad). En este caso, el objetivo de la propuesta es la incorporación de DPR en EHW para evolucionar la arquitectura de un array sistólico adaptable mediante reconfiguración cuya capacidad de evolución no había sido estudiada previamente. Para conseguir los dos objetivos mencionados, esta tesis propone originalmente una plataforma evolutiva que integra un motor de adaptación (AE, Adaptation Engine), un motor de reconfiguración (RE, Reconfiguration Engine) y un motor computacional (CE, Computing Engine) adaptable. El el caso de adaptación paramétrica, la plataforma propuesta está caracterizada por: • un CE caracterizado por un núcleo de procesamiento hardware de DWT adaptable mediante registros reconfigurables que contienen los coeficientes de los filtros wavelet • un algoritmo evolutivo como AE que busca filtros wavelet candidatos a través de un proceso de optimización paramétrica desarrollado específicamente para sistemas caracterizados por recursos de procesamiento limitados • un nuevo operador de mutación simplificado para el algoritmo evolutivo utilizado, que junto con un mecanismo de evaluación rápida de filtros wavelet candidatos derivado de la literatura actual, asegura la viabilidad de la búsqueda evolutiva asociada a la adaptación de wavelets. En el caso de adaptación estructural, la plataforma propuesta toma la forma de: • un CE basado en una plantilla de array sistólico reconfigurable de 2 dimensiones compuesto de nodos de procesamiento reconfigurables • un algoritmo evolutivo como AE que busca configuraciones candidatas del array usando un conjunto de funcionalidades de procesamiento para los nodos disponible en una biblioteca accesible en tiempo de ejecución • un RE hardware que explota la capacidad de reconfiguración nativa de las FPGAs haciendo un uso eficiente de los recursos reconfigurables del dispositivo para cambiar el comportamiento del CE en tiempo de ejecución • una biblioteca de elementos de procesamiento reconfigurables caracterizada por bitstreams parciales independientes de la posición, usados como el conjunto de configuraciones disponibles para los nodos de procesamiento del array Las contribuciones principales de esta tesis se pueden resumir en la siguiente lista: • Una plataforma evolutiva basada en FPGA para la auto-adaptación paramétrica y estructural de sistemas empotrados compuesta por un motor computacional (CE), un motor de adaptación (AE) evolutivo y un motor de reconfiguración (RE). Esta plataforma se ha desarrollado y particularizado para los casos de auto-adaptación paramétrica y estructural. • En cuanto a la auto-adaptación paramétrica, las contribuciones principales son: – Un motor computacional adaptable mediante registros que permite la adaptación paramétrica de los coeficientes de una implementación hardware adaptativa de un núcleo de DWT. – Un motor de adaptación basado en un algoritmo evolutivo desarrollado específicamente para optimización numérica, aplicada a los coeficientes de filtros wavelet en sistemas empotrados con recursos limitados. – Un núcleo IP de DWT auto-adaptativo en tiempo de ejecución para sistemas empotrados que permite la optimización online del rendimiento de la transformada para compresión de imágenes en entornos específicos de despliegue, caracterizados por tipos diferentes de señal de entrada. – Un modelo software y una implementación hardware de una herramienta para la construcción evolutiva automática de transformadas wavelet específicas. • Por último, en cuanto a la auto-adaptación estructural, las contribuciones principales son: – Un motor computacional adaptable mediante reconfiguración nativa de FPGAs caracterizado por una plantilla de array sistólico en dos dimensiones de nodos de procesamiento reconfigurables. Es posible mapear diferentes tareas de cómputo en el array usando una biblioteca de elementos sencillos de procesamiento reconfigurables. – Definición de una biblioteca de elementos de procesamiento apropiada para la síntesis autónoma en tiempo de ejecución de diferentes tareas de procesamiento de imagen. – Incorporación eficiente de la reconfiguración parcial dinámica (DPR) en sistemas de hardware evolutivo, superando los principales inconvenientes de propuestas previas como los circuitos reconfigurables virtuales (VRCs). En este trabajo también se comparan originalmente los detalles de implementación de ambas propuestas. – Una plataforma tolerante a fallos, auto-curativa, que permite la recuperación funcional online en entornos peligrosos. La plataforma ha sido caracterizada desde una perspectiva de tolerancia a fallos: se proponen modelos de fallo a nivel de CLB y de elemento de procesamiento, y usando el motor de reconfiguración, se hace un análisis sistemático de fallos para un fallo en cada elemento de procesamiento y para dos fallos acumulados. – Una plataforma con calidad de filtrado dinámica que permite la adaptación online a tipos de ruido diferentes y diferentes comportamientos computacionales teniendo en cuenta los recursos de procesamiento disponibles. Por un lado, se evolucionan filtros con comportamientos no destructivos, que permiten esquemas de filtrado en cascada escalables; y por otro, también se evolucionan filtros escalables teniendo en cuenta requisitos computacionales de filtrado cambiantes dinámicamente. Este documento está organizado en cuatro partes y nueve capítulos. La primera parte contiene el capítulo 1, una introducción y motivación sobre este trabajo de tesis. A continuación, el marco de referencia en el que se enmarca esta tesis se analiza en la segunda parte: el capítulo 2 contiene una introducción a los conceptos de auto-adaptación y computación autonómica (autonomic computing) como un campo de investigación más general que el muy específico de este trabajo; el capítulo 3 introduce la computación evolutiva como la técnica para dirigir la adaptación; el capítulo 4 analiza las plataformas de computación reconfigurables como la tecnología para albergar hardware auto-adaptativo; y finalmente, el capítulo 5 define, clasifica y hace un sondeo del campo del hardware evolutivo. Seguidamente, la tercera parte de este trabajo contiene la propuesta, desarrollo y resultados obtenidos: mientras que el capítulo 6 contiene una declaración de los objetivos de la tesis y la descripción de la propuesta en su conjunto, los capítulos 7 y 8 abordan la auto-adaptación paramétrica y estructural, respectivamente. Finalmente, el capítulo 9 de la parte 4 concluye el trabajo y describe caminos de investigación futuros. ABSTRACT Embedded systems have traditionally been conceived to be specific-purpose computers with one, fixed computational task for their whole lifetime. Stringent requirements in terms of cost, size and weight forced designers to highly optimise their operation for very specific conditions. However, demands for versatility, more intelligent behaviour and, in summary, an increased computing capability began to clash with these limitations, intensified by the uncertainty associated to the more dynamic operating environments where they were progressively being deployed. This brought as a result an increasing need for systems to respond by themselves to unexpected events at design time, such as: changes in input data characteristics and system environment in general; changes in the computing platform itself, e.g., due to faults and fabrication defects; and changes in functional specifications caused by dynamically changing system objectives. As a consequence, systems complexity is increasing, but in turn, autonomous lifetime adaptation without human intervention is being progressively enabled, allowing them to take their own decisions at run-time. This type of systems is known, in general, as selfadaptive, and are able, among others, of self-configuration, self-optimisation and self-repair. Traditionally, the soft part of a system has mostly been so far the only place to provide systems with some degree of adaptation capabilities. However, the performance to power ratios of software driven devices like microprocessors are not adequate for embedded systems in many situations. In this scenario, the resulting rise in applications complexity is being partly addressed by rising devices complexity in the form of multi and many core devices; but sadly, this keeps on increasing power consumption. Besides, design methodologies have not been improved accordingly to completely leverage the available computational power from all these cores. Altogether, these factors make that the computing demands new applications pose are not being wholly satisfied. The traditional solution to improve performance to power ratios has been the switch to hardware driven specifications, mainly using ASICs. However, their costs are highly prohibitive except for some mass production cases and besidesthe static nature of its structure complicates the solution to the adaptation needs. The advancements in fabrication technologies have made that the once slow, small FPGA used as glue logic in bigger systems, had grown to be a very powerful, reconfigurable computing device with a vast amount of computational logic resources and embedded, hardened signal and general purpose processing cores. Its reconfiguration capabilities have enabled software-like flexibility to be combined with hardware-like computing performance, which has the potential to cause a paradigm shift in computer architecture since hardware cannot be considered as static anymore. This is so, since, as is the case with SRAMbased FPGAs, Dynamic Partial Reconfiguration (DPR) is possible. This means that subsets of the FPGA computational resources can now be changed (reconfigured) at run-time while the rest remains active. Besides, this reconfiguration process can be triggered internally by the device itself. This technological boost in reconfigurable hardware devices is actually covered under the field known as Reconfigurable Computing. One of the most exotic fields of application that Reconfigurable Computing has enabled is the known as Evolvable Hardware (EHW), in which this dissertation is framed. The main idea behind the concept is turning hardware that is adaptable through reconfiguration into an evolvable entity subject to the forces of an evolutionary process, inspired by that of natural, biological species, that guides the direction of change. It is yet another application of the field of Evolutionary Computation (EC), which comprises a set of global optimisation algorithms known as Evolutionary Algorithms (EAs), considered as universal problem solvers. In analogy to the biological process of evolution, in EHW the subject of evolution is a population of circuits that tries to get adapted to its surrounding environment by progressively getting better fitted to it generation after generation. Individuals become circuit configurations representing bitstreams that feature reconfigurable circuit descriptions. By selecting those that behave better, i.e., with a higher fitness value after being evaluated, and using them as parents of the following generation, the EA creates a new offspring population by using so called genetic operators like mutation and recombination. As generations succeed one another, the whole population is expected to approach to the optimum solution to the problem of finding an adequate circuit configuration that fulfils system objectives. The state of reconfiguration technology after Xilinx XC6200 FPGA family was discontinued and replaced by Virtex families in the late 90s, was a major obstacle for advancements in EHW; closed (non publicly known) bitstream formats; dependence on manufacturer tools with highly limiting support of DPR; slow speed of reconfiguration; and random bitstream modifications being potentially hazardous for device integrity, are some of these reasons. However, a proposal in the first 2000s allowed to keep investigating in this field while DPR technology kept maturing, the Virtual Reconfigurable Circuit (VRC). In essence, a VRC in an FPGA is a virtual layer acting as an application specific reconfigurable circuit on top of an FPGA fabric that reduces the complexity of the reconfiguration process and increases its speed (compared to native reconfiguration). It is an array of computational nodes specified using standard HDL descriptions that define ad-hoc reconfigurable resources; routing multiplexers and a set of configurable processing elements, each one containing all the required functions, which are selectable through functionality multiplexers as in microprocessor ALUs. A large register acts as configuration memory, so VRC reconfiguration is very fast given it only involves writing this register, which drives the selection signals of the set of multiplexers. However, large overheads are introduced by this virtual layer; an area overhead due to the simultaneous implementation of every function in every node of the array plus the multiplexers, and a delay overhead due to the multiplexers, which also reduces maximum frequency of operation. The very nature of Evolvable Hardware, able to optimise its own computational behaviour, makes it a good candidate to advance research in self-adaptive systems. Combining a selfreconfigurable computing substrate able to be dynamically changed at run-time with an embedded algorithm that provides a direction for change, can help fulfilling requirements for autonomous lifetime adaptation of FPGA-based embedded systems. The main proposal of this thesis is hence directed to contribute to autonomous self-adaptation of the underlying computational hardware of FPGA-based embedded systems by means of Evolvable Hardware. This is tackled by considering that the computational behaviour of a system can be modified by changing any of its two constituent parts: an underlying hard structure and a set of soft parameters. Two main lines of work derive from this distinction. On one side, parametric self-adaptation and, on the other side, structural self-adaptation. The goal pursued in the case of parametric self-adaptation is the implementation of complex evolutionary optimisation techniques in resource constrained embedded systems for online parameter adaptation of signal processing circuits. The application selected as proof of concept is the optimisation of Discrete Wavelet Transforms (DWT) filters coefficients for very specific types of images, oriented to image compression. Hence, adaptive and improved compression efficiency, as compared to standard techniques, is the required goal of evolution. The main quest lies in reducing the supercomputing resources reported in previous works for the optimisation process in order to make it suitable for embedded systems. Regarding structural self-adaptation, the thesis goal is the implementation of self-adaptive circuits in FPGA-based evolvable systems through an efficient use of native reconfiguration capabilities. In this case, evolution of image processing tasks such as filtering of unknown and changing types of noise and edge detection are the selected proofs of concept. In general, evolving unknown image processing behaviours (within a certain complexity range) at design time is the required goal. In this case, the mission of the proposal is the incorporation of DPR in EHW to evolve a systolic array architecture adaptable through reconfiguration whose evolvability had not been previously checked. In order to achieve the two stated goals, this thesis originally proposes an evolvable platform that integrates an Adaptation Engine (AE), a Reconfiguration Engine (RE) and an adaptable Computing Engine (CE). In the case of parametric adaptation, the proposed platform is characterised by: • a CE featuring a DWT hardware processing core adaptable through reconfigurable registers that holds wavelet filters coefficients • an evolutionary algorithm as AE that searches for candidate wavelet filters through a parametric optimisation process specifically developed for systems featured by scarce computing resources • a new, simplified mutation operator for the selected EA, that together with a fast evaluation mechanism of candidate wavelet filters derived from existing literature, assures the feasibility of the evolutionary search involved in wavelets adaptation In the case of structural adaptation, the platform proposal takes the form of: • a CE based on a reconfigurable 2D systolic array template composed of reconfigurable processing nodes • an evolutionary algorithm as AE that searches for candidate configurations of the array using a set of computational functionalities for the nodes available in a run time accessible library • a hardware RE that exploits native DPR capabilities of FPGAs and makes an efficient use of the available reconfigurable resources of the device to change the behaviour of the CE at run time • a library of reconfigurable processing elements featured by position-independent partial bitstreams used as the set of available configurations for the processing nodes of the array Main contributions of this thesis can be summarised in the following list. • An FPGA-based evolvable platform for parametric and structural self-adaptation of embedded systems composed of a Computing Engine, an evolutionary Adaptation Engine and a Reconfiguration Engine. This platform is further developed and tailored for both parametric and structural self-adaptation. • Regarding parametric self-adaptation, main contributions are: – A CE adaptable through reconfigurable registers that enables parametric adaptation of the coefficients of an adaptive hardware implementation of a DWT core. – An AE based on an Evolutionary Algorithm specifically developed for numerical optimisation applied to wavelet filter coefficients in resource constrained embedded systems. – A run-time self-adaptive DWT IP core for embedded systems that allows for online optimisation of transform performance for image compression for specific deployment environments characterised by different types of input signals. – A software model and hardware implementation of a tool for the automatic, evolutionary construction of custom wavelet transforms. • Lastly, regarding structural self-adaptation, main contributions are: – A CE adaptable through native FPGA fabric reconfiguration featured by a two dimensional systolic array template of reconfigurable processing nodes. Different processing behaviours can be automatically mapped in the array by using a library of simple reconfigurable processing elements. – Definition of a library of such processing elements suited for autonomous runtime synthesis of different image processing tasks. – Efficient incorporation of DPR in EHW systems, overcoming main drawbacks from the previous approach of virtual reconfigurable circuits. Implementation details for both approaches are also originally compared in this work. – A fault tolerant, self-healing platform that enables online functional recovery in hazardous environments. The platform has been characterised from a fault tolerance perspective: fault models at FPGA CLB level and processing elements level are proposed, and using the RE, a systematic fault analysis for one fault in every processing element and for two accumulated faults is done. – A dynamic filtering quality platform that permits on-line adaptation to different types of noise and different computing behaviours considering the available computing resources. On one side, non-destructive filters are evolved, enabling scalable cascaded filtering schemes; and on the other, size-scalable filters are also evolved considering dynamically changing computational filtering requirements. This dissertation is organized in four parts and nine chapters. First part contains chapter 1, the introduction to and motivation of this PhD work. Following, the reference framework in which this dissertation is framed is analysed in the second part: chapter 2 features an introduction to the notions of self-adaptation and autonomic computing as a more general research field to the very specific one of this work; chapter 3 introduces evolutionary computation as the technique to drive adaptation; chapter 4 analyses platforms for reconfigurable computing as the technology to hold self-adaptive hardware; and finally chapter 5 defines, classifies and surveys the field of Evolvable Hardware. Third part of the work follows, which contains the proposal, development and results obtained: while chapter 6 contains an statement of the thesis goals and the description of the proposal as a whole, chapters 7 and 8 address parametric and structural self-adaptation, respectively. Finally, chapter 9 in part 4 concludes the work and describes future research paths.

Piezoelectric sensing and non-parametric statistical signal processing for health monitoring of hysteretic dampers used in seismic-resistant structures

The paper proposes a new application of non-parametric statistical processing of signals recorded from vibration tests for damage detection and evaluation on I-section steel segments. The steel segments investigated constitute the energy dissipating part of a new type of hysteretic damper that is used for passive control of buildings and civil engineering structures subjected to earthquake-type dynamic loadings. Two I-section steel segments with different levels of damage were instrumented with piezoceramic sensors and subjected to controlled white noise random vibrations. The signals recorded during the tests were processed using two non-parametric methods (the power spectral density method and the frequency response function method) that had never previously been applied to hysteretic dampers. The appropriateness of these methods for quantifying the level of damage on the I-shape steel segments is validated experimentally. Based on the results of the random vibrations, the paper proposes a new index that predicts the level of damage and the proximity of failure of the hysteretic damper

Critical fluctuations and entanglement in the nondegenerate parametric oscillator

We present a fully quantum mechanical treatment of the nondegenerate optical parametric oscillator both below and near threshold. This is a nonequilibrium quantum system with a critical point phase transition, that is also known to exhibit strong yet easily observed squeezing and quantum entanglement. Our treatment makes use of the positive P representation and goes beyond the usual linearized theory. We compare our analytical results with numerical simulations and find excellent agreement. We also carry out a detailed comparison of our results with those obtained from stochastic electrodynamics, a theory obtained by truncating the equation of motion for the Wigner function, with a view to locating regions of agreement and disagreement between the two. We calculate commonly used measures of quantum behavior including entanglement, squeezing, and Einstein-Podolsky-Rosen (EPR) correlations as well as higher order tripartite correlations, and show how these are modified as the critical point is approached. These results are compared with those obtained using two degenerate parametric oscillators, and we find that in the near-critical region the nondegenerate oscillator has stronger EPR correlations. In general, the critical fluctuations represent an ultimate limit to the possible entanglement that can be achieved in a nondegenerate parametric oscillator.

Assessing pupil and school performance by non-parametric and parametric techniques

Often observations are nested within other units. This is particularly the case in the educational sector where school performance in terms of value added is the result of school contribution as well as pupil academic ability and other features relating to the pupil. Traditionally, the literature uses parametric (i.e. it assumes a priori a particular function on the production process) Multi-Level Models to estimate the performance of nested entities. This paper discusses the use of the non-parametric (i.e. without a priori assumptions on the production process) Free Disposal Hull model as an alternative approach. While taking into account contextual characteristics as well as atypical observations, we show how to decompose non-parametrically the overall inefficiency of a pupil into a unit specific and a higher level (i.e. a school) component. By a sample of entry and exit attainments of 3017 girls in British ordinary single sex schools, we test the robustness of the non-parametric and parametric estimates. We find that the two methods agree in the relative measures of the scope for potential attainment improvement. Further, the two methods agree on the variation in pupil attainment and the proportion attributable to pupil and school level.

An Exploration of parametric software cost estimating models for Jackson Systems Development

Most parametric software cost estimation models used today evolved in the late 70's and early 80's. At that time, the dominant software development techniques being used were the early 'structured methods'. Since then, several new systems development paradigms and methods have emerged, one being Jackson Systems Development (JSD). As current cost estimating methods do not take account of these developments, their non-universality means they cannot provide adequate estimates of effort and hence cost. In order to address these shortcomings two new estimation methods have been developed for JSD projects. One of these methods JSD-FPA, is a top-down estimating method, based on the existing MKII function point method. The other method, JSD-COCOMO, is a sizing technique which sizes a project, in terms of lines of code, from the process structure diagrams and thus provides an input to the traditional COCOMO method.The JSD-FPA method allows JSD projects in both the real-time and scientific application areas to be costed, as well as the commercial information systems applications to which FPA is usually applied. The method is based upon a three-dimensional view of a system specification as opposed to the largely data-oriented view traditionally used by FPA. The method uses counts of various attributes of a JSD specification to develop a metric which provides an indication of the size of the system to be developed. This size metric is then transformed into an estimate of effort by calculating past project productivity and utilising this figure to predict the effort and hence cost of a future project. The effort estimates produced were validated by comparing them against the effort figures for six actual projects.The JSD-COCOMO method uses counts of the levels in a process structure chart as the input to an empirically derived model which transforms them into an estimate of delivered source code instructions.

Ocular and systemic endothelial function in the off spring of diabetics:a pilot study

Purpose To investigate ocular and systemic correlates of endothelial function in the normoglycaemic offspring of Type 2 Diabetics (T2DM). Methods Healthy participants aged between 25-65 with (n=30) and without (n=39) a family history were recruited. Retinal vessel reactivity was assessed by using the Retinal Vessel Analyser (RVA, Imedos GmBH). In addition, systemic endothelial function was assessed by using the flow mediated dilation (FMD) technique. Results Parametric testing showed no significant differences in anthropometric, blood assay or ocular and systemic function between both groups (p>0.05). The average maximum dilation in the measured retinal artery correlated significantly with the maximum dilation of the measured brachial artery (p=0.002 R=0.55) in healthy controls; however, this was not true for subjects with family history of T2DM. Conclusion Subjects with family history of T2DM show possibly early signs of endothelial dysfunction that, in certain conditions, could contribute to the higher risk of this group of developing similar pathology to their parents.