108 resultados para NOC


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Multiprocessing is a promising solution to meet the requirements of near future applications. To get full benefit from parallel processing, a manycore system needs efficient, on-chip communication architecture. Networkon- Chip (NoC) is a general purpose communication concept that offers highthroughput, reduced power consumption, and keeps complexity in check by a regular composition of basic building blocks. This thesis presents power efficient communication approaches for networked many-core systems. We address a range of issues being important for designing power-efficient manycore systems at two different levels: the network-level and the router-level. From the network-level point of view, exploiting state-of-the-art concepts such as Globally Asynchronous Locally Synchronous (GALS), Voltage/ Frequency Island (VFI), and 3D Networks-on-Chip approaches may be a solution to the excessive power consumption demanded by today’s and future many-core systems. To this end, a low-cost 3D NoC architecture, based on high-speed GALS-based vertical channels, is proposed to mitigate high peak temperatures, power densities, and area footprints of vertical interconnects in 3D ICs. To further exploit the beneficial feature of a negligible inter-layer distance of 3D ICs, we propose a novel hybridization scheme for inter-layer communication. In addition, an efficient adaptive routing algorithm is presented which enables congestion-aware and reliable communication for the hybridized NoC architecture. An integrated monitoring and management platform on top of this architecture is also developed in order to implement more scalable power optimization techniques. From the router-level perspective, four design styles for implementing power-efficient reconfigurable interfaces in VFI-based NoC systems are proposed. To enhance the utilization of virtual channel buffers and to manage their power consumption, a partial virtual channel sharing method for NoC routers is devised and implemented. Extensive experiments with synthetic and real benchmarks show significant power savings and mitigated hotspots with similar performance compared to latest NoC architectures. The thesis concludes that careful codesigned elements from different network levels enable considerable power savings for many-core systems.

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Through advances in technology, System-on-Chip design is moving towards integrating tens to hundreds of intellectual property blocks into a single chip. In such a many-core system, on-chip communication becomes a performance bottleneck for high performance designs. Network-on-Chip (NoC) has emerged as a viable solution for the communication challenges in highly complex chips. The NoC architecture paradigm, based on a modular packet-switched mechanism, can address many of the on-chip communication challenges such as wiring complexity, communication latency, and bandwidth. Furthermore, the combined benefits of 3D IC and NoC schemes provide the possibility of designing a high performance system in a limited chip area. The major advantages of 3D NoCs are the considerable reductions in average latency and power consumption. There are several factors degrading the performance of NoCs. In this thesis, we investigate three main performance-limiting factors: network congestion, faults, and the lack of efficient multicast support. We address these issues by the means of routing algorithms. Congestion of data packets may lead to increased network latency and power consumption. Thus, we propose three different approaches for alleviating such congestion in the network. The first approach is based on measuring the congestion information in different regions of the network, distributing the information over the network, and utilizing this information when making a routing decision. The second approach employs a learning method to dynamically find the less congested routes according to the underlying traffic. The third approach is based on a fuzzy-logic technique to perform better routing decisions when traffic information of different routes is available. Faults affect performance significantly, as then packets should take longer paths in order to be routed around the faults, which in turn increases congestion around the faulty regions. We propose four methods to tolerate faults at the link and switch level by using only the shortest paths as long as such path exists. The unique characteristic among these methods is the toleration of faults while also maintaining the performance of NoCs. To the best of our knowledge, these algorithms are the first approaches to bypassing faults prior to reaching them while avoiding unnecessary misrouting of packets. Current implementations of multicast communication result in a significant performance loss for unicast traffic. This is due to the fact that the routing rules of multicast packets limit the adaptivity of unicast packets. We present an approach in which both unicast and multicast packets can be efficiently routed within the network. While suggesting a more efficient multicast support, the proposed approach does not affect the performance of unicast routing at all. In addition, in order to reduce the overall path length of multicast packets, we present several partitioning methods along with their analytical models for latency measurement. This approach is discussed in the context of 3D mesh networks.

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In accordance with the Moore's law, the increasing number of on-chip integrated transistors has enabled modern computing platforms with not only higher processing power but also more affordable prices. As a result, these platforms, including portable devices, work stations and data centres, are becoming an inevitable part of the human society. However, with the demand for portability and raising cost of power, energy efficiency has emerged to be a major concern for modern computing platforms. As the complexity of on-chip systems increases, Network-on-Chip (NoC) has been proved as an efficient communication architecture which can further improve system performances and scalability while reducing the design cost. Therefore, in this thesis, we study and propose energy optimization approaches based on NoC architecture, with special focuses on the following aspects. As the architectural trend of future computing platforms, 3D systems have many bene ts including higher integration density, smaller footprint, heterogeneous integration, etc. Moreover, 3D technology can signi cantly improve the network communication and effectively avoid long wirings, and therefore, provide higher system performance and energy efficiency. With the dynamic nature of on-chip communication in large scale NoC based systems, run-time system optimization is of crucial importance in order to achieve higher system reliability and essentially energy efficiency. In this thesis, we propose an agent based system design approach where agents are on-chip components which monitor and control system parameters such as supply voltage, operating frequency, etc. With this approach, we have analysed the implementation alternatives for dynamic voltage and frequency scaling and power gating techniques at different granularity, which reduce both dynamic and leakage energy consumption. Topologies, being one of the key factors for NoCs, are also explored for energy saving purpose. A Honeycomb NoC architecture is proposed in this thesis with turn-model based deadlock-free routing algorithms. Our analysis and simulation based evaluation show that Honeycomb NoCs outperform their Mesh based counterparts in terms of network cost, system performance as well as energy efficiency.

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Multiprocessor system-on-chip (MPSoC) designs utilize the available technology and communication architectures to meet the requirements of the upcoming applications. In MPSoC, the communication platform is both the key enabler, as well as the key differentiator for realizing efficient MPSoCs. It provides product differentiation to meet a diverse, multi-dimensional set of design constraints, including performance, power, energy, reconfigurability, scalability, cost, reliability and time-to-market. The communication resources of a single interconnection platform cannot be fully utilized by all kind of applications, such as the availability of higher communication bandwidth for computation but not data intensive applications is often unfeasible in the practical implementation. This thesis aims to perform the architecture-level design space exploration towards efficient and scalable resource utilization for MPSoC communication architecture. In order to meet the performance requirements within the design constraints, careful selection of MPSoC communication platform, resource aware partitioning and mapping of the application play important role. To enhance the utilization of communication resources, variety of techniques such as resource sharing, multicast to avoid re-transmission of identical data, and adaptive routing can be used. For implementation, these techniques should be customized according to the platform architecture. To address the resource utilization of MPSoC communication platforms, variety of architectures with different design parameters and performance levels, namely Segmented bus (SegBus), Network-on-Chip (NoC) and Three-Dimensional NoC (3D-NoC), are selected. Average packet latency and power consumption are the evaluation parameters for the proposed techniques. In conventional computing architectures, fault on a component makes the connected fault-free components inoperative. Resource sharing approach can utilize the fault-free components to retain the system performance by reducing the impact of faults. Design space exploration also guides to narrow down the selection of MPSoC architecture, which can meet the performance requirements with design constraints.

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Actually, the term innovation seems to be one of the most used in any kind of business practices. However, in order to get value from it, companies need to define a systematic and structured way to manage innovation. This process can be difficult and very risky since it is associated with the development of firm´s capabilities which involves human and technical challenges according to the context of a firm. Additionally, it seems not to exist a magic formula to manage innovation and what may work in a company may not work in another, even though in the same type of industry. In this sense, the purpose of this research is to identify how the oil and gas companies can manage innovation and what are the main elements, their interrelations and structure, required for managing innovation effectively in this critical sector for the world economy. The study follows a holistic single case study in a National Oil Company (NOC) of a developing country to explore how innovation performs in the industry, what are the main elements regarding innovation management and their interactions according to the nature of the industry. Contributory literature and qualitative data from the case study company (with the use of non-standardized interviews) is collected and analyzed. The research confirms the relevance and importance of the definition and implementation of an innovation framework in order to ensure the generation of value and organize as well as guide the efforts in innovation done by a firm. In this way based on the theoretical background, research´s findings, and in the company´s innovation environment and conditions, a framework for managing innovation at the case study company is suggested. This study is one of the few, if not only one, that has reviewed the way as oil and gas companies manage innovation and its practical implementation in a company from a developing country. Both researchers and practitioners will get a photograph of understanding innovation management in the oil and gas industry and its growing necessity in the business world. Some issues have been highlighted, so that future study can be focused in those directions. In fact, even though research on innovation management has significantly grown, there are still many issues that need to be addressed to get insight about managing innovation in various contexts and industries. Studies are mostly performed in the context of large firms and in developed countries, so then research in the context of developing countries is still almost an untouched area, especially in the oil and gas industry. Finally, from the research it seems crucial to explore the effect of some innovation-related variables such as: open innovation in third world economies and in state-own companies; the impact of mergers and acquisitions in innovation performance in oil and gas companies; value measurement in the first stages of the innovation process; and, development of innovation capabilities in companies from developing nations.

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Advancements in IC processing technology has led to the innovation and growth happening in the consumer electronics sector and the evolution of the IT infrastructure supporting this exponential growth. One of the most difficult obstacles to this growth is the removal of large amount of heatgenerated by the processing and communicating nodes on the system. The scaling down of technology and the increase in power density is posing a direct and consequential effect on the rise in temperature. This has resulted in the increase in cooling budgets, and affects both the life-time reliability and performance of the system. Hence, reducing on-chip temperatures has become a major design concern for modern microprocessors. This dissertation addresses the thermal challenges at different levels for both 2D planer and 3D stacked systems. It proposes a self-timed thermal monitoring strategy based on the liberal use of on-chip thermal sensors. This makes use of noise variation tolerant and leakage current based thermal sensing for monitoring purposes. In order to study thermal management issues from early design stages, accurate thermal modeling and analysis at design time is essential. In this regard, spatial temperature profile of the global Cu nanowire for on-chip interconnects has been analyzed. It presents a 3D thermal model of a multicore system in order to investigate the effects of hotspots and the placement of silicon die layers, on the thermal performance of a modern ip-chip package. For a 3D stacked system, the primary design goal is to maximise the performance within the given power and thermal envelopes. Hence, a thermally efficient routing strategy for 3D NoC-Bus hybrid architectures has been proposed to mitigate on-chip temperatures by herding most of the switching activity to the die which is closer to heat sink. Finally, an exploration of various thermal-aware placement approaches for both the 2D and 3D stacked systems has been presented. Various thermal models have been developed and thermal control metrics have been extracted. An efficient thermal-aware application mapping algorithm for a 2D NoC has been presented. It has been shown that the proposed mapping algorithm reduces the effective area reeling under high temperatures when compared to the state of the art.

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This thesis presents a novel design paradigm, called Virtual Runtime Application Partitions (VRAP), to judiciously utilize the on-chip resources. As the dark silicon era approaches, where the power considerations will allow only a fraction chip to be powered on, judicious resource management will become a key consideration in future designs. Most of the works on resource management treat only the physical components (i.e. computation, communication, and memory blocks) as resources and manipulate the component to application mapping to optimize various parameters (e.g. energy efficiency). To further enhance the optimization potential, in addition to the physical resources we propose to manipulate abstract resources (i.e. voltage/frequency operating point, the fault-tolerance strength, the degree of parallelism, and the configuration architecture). The proposed framework (i.e. VRAP) encapsulates methods, algorithms, and hardware blocks to provide each application with the abstract resources tailored to its needs. To test the efficacy of this concept, we have developed three distinct self adaptive environments: (i) Private Operating Environment (POE), (ii) Private Reliability Environment (PRE), and (iii) Private Configuration Environment (PCE) that collectively ensure that each application meets its deadlines using minimal platform resources. In this work several novel architectural enhancements, algorithms and policies are presented to realize the virtual runtime application partitions efficiently. Considering the future design trends, we have chosen Coarse Grained Reconfigurable Architectures (CGRAs) and Network on Chips (NoCs) to test the feasibility of our approach. Specifically, we have chosen Dynamically Reconfigurable Resource Array (DRRA) and McNoC as the representative CGRA and NoC platforms. The proposed techniques are compared and evaluated using a variety of quantitative experiments. Synthesis and simulation results demonstrate VRAP significantly enhances the energy and power efficiency compared to state of the art.

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The anxiogenic and antinociceptive effects produced by glutamate N-methyl-D-aspartate receptor activation within the dorsal periaqueductal gray (dPAG) matter have been related to nitric oxide (NO) production, since injection of NO synthase (NOS) inhibitors reverses these effects. dPAG corticotropin-releasing factor receptor (CRFr) activation also induces anxiety-like behavior and antinociception, which, in turn, are selectively blocked by local infusion of the CRF type 1 receptor (CRFr1) antagonist, NBI 27914 [5-chloro-4-(N-(cyclopropyl)methyl-N-propylamino)-2-methyl-6-(2,4,6-trichlorophenyl)aminopyridine]. Here, we determined whether i) the blockade of the dPAG by CRFr1 attenuates the anxiogenic/antinociceptive effects induced by local infusion of the NO donor, NOC-9 [6-(2-hydroxy-1-methyl-2-nitrosohydrazino)-N-methyl-1-hexanamine], and ii) the anxiogenic/antinociceptive effects induced by intra-dPAG CRF are prevented by local infusion of Nω-propyl-L-arginine (NPLA), a neuronal NOS inhibitor, in mice. Male Swiss mice (12 weeks old, 25-35 g, N = 8-14/group) were stereotaxically implanted with a 7-mm cannula aimed at the dPAG. Intra-dPAG NOC-9 (75 nmol) produced defensive-like behavior (jumping and running) and antinociception (assessed by the formalin test). Both effects were reversed by prior local infusion of NBI 27914 (2 nmol). Conversely, intra-dPAG NPLA (0.4 nmol) did not modify the anxiogenic/antinociceptive effects of CRF (150 pmol). These results suggest that CRFr1 plays an important role in the defensive behavior and antinociception produced by NO within the dPAG. In contrast, the anxiogenic and antinociceptive effects produced by intra-dPAG CRF are not related to NO synthesis in this limbic midbrain structure.

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Les systèmes multiprocesseurs sur puce électronique (On-Chip Multiprocessor [OCM]) sont considérés comme les meilleures structures pour occuper l'espace disponible sur les circuits intégrés actuels. Dans nos travaux, nous nous intéressons à un modèle architectural, appelé architecture isométrique de systèmes multiprocesseurs sur puce, qui permet d'évaluer, de prédire et d'optimiser les systèmes OCM en misant sur une organisation efficace des nœuds (processeurs et mémoires), et à des méthodologies qui permettent d'utiliser efficacement ces architectures. Dans la première partie de la thèse, nous nous intéressons à la topologie du modèle et nous proposons une architecture qui permet d'utiliser efficacement et massivement les mémoires sur la puce. Les processeurs et les mémoires sont organisés selon une approche isométrique qui consiste à rapprocher les données des processus plutôt que d'optimiser les transferts entre les processeurs et les mémoires disposés de manière conventionnelle. L'architecture est un modèle maillé en trois dimensions. La disposition des unités sur ce modèle est inspirée de la structure cristalline du chlorure de sodium (NaCl), où chaque processeur peut accéder à six mémoires à la fois et où chaque mémoire peut communiquer avec autant de processeurs à la fois. Dans la deuxième partie de notre travail, nous nous intéressons à une méthodologie de décomposition où le nombre de nœuds du modèle est idéal et peut être déterminé à partir d'une spécification matricielle de l'application qui est traitée par le modèle proposé. Sachant que la performance d'un modèle dépend de la quantité de flot de données échangées entre ses unités, en l'occurrence leur nombre, et notre but étant de garantir une bonne performance de calcul en fonction de l'application traitée, nous proposons de trouver le nombre idéal de processeurs et de mémoires du système à construire. Aussi, considérons-nous la décomposition de la spécification du modèle à construire ou de l'application à traiter en fonction de l'équilibre de charge des unités. Nous proposons ainsi une approche de décomposition sur trois points : la transformation de la spécification ou de l'application en une matrice d'incidence dont les éléments sont les flots de données entre les processus et les données, une nouvelle méthodologie basée sur le problème de la formation des cellules (Cell Formation Problem [CFP]), et un équilibre de charge de processus dans les processeurs et de données dans les mémoires. Dans la troisième partie, toujours dans le souci de concevoir un système efficace et performant, nous nous intéressons à l'affectation des processeurs et des mémoires par une méthodologie en deux étapes. Dans un premier temps, nous affectons des unités aux nœuds du système, considéré ici comme un graphe non orienté, et dans un deuxième temps, nous affectons des valeurs aux arcs de ce graphe. Pour l'affectation, nous proposons une modélisation des applications décomposées en utilisant une approche matricielle et l'utilisation du problème d'affectation quadratique (Quadratic Assignment Problem [QAP]). Pour l'affectation de valeurs aux arcs, nous proposons une approche de perturbation graduelle, afin de chercher la meilleure combinaison du coût de l'affectation, ceci en respectant certains paramètres comme la température, la dissipation de chaleur, la consommation d'énergie et la surface occupée par la puce. Le but ultime de ce travail est de proposer aux architectes de systèmes multiprocesseurs sur puce une méthodologie non traditionnelle et un outil systématique et efficace d'aide à la conception dès la phase de la spécification fonctionnelle du système.

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Plusieurs études ont permis la caractérisation de la structure et de la fonction du ribosome. En ce qui attrait à la biogénèse du ribosome, nombreux aspects restent à être découverts et compris de façon plus dynamique. En effet, cette biogénèse englobe une variété de voies de modifications et d’assemblages requises pour la maturation des ARNr et pour leurs liaisons avec les protéines ribosomales. De ce fait, les protéines Noc ont été caractérisées comme des facteurs d’assemblages et ont permis la découverte d’une des premières indications sur l’ordre spatio-temporel de la maturation du ribosome. Ainsi, en utilisant la levure comme modèle, notre objectif est d’étudier d’avantage l’échange des complexes composés des protéines Noc ainsi que leur localisation intranucléaire. Ainsi, la nature des interactions de Noc2p avec Noc1p et Noc3p et l’influence de l’arrêt du transport intranucléaire ont été étudiés en utilisant des promoteurs inductibles, la microscopie à fluorescence, des immunobuvardages, qRT-PCR et des purifications par affinité.

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The JModel suite consists of a number of models of aspects of the Earth System. The Java programmes model in detail aspects of the cycles of some major biogeochemical elements that exemplify the range of geochemical processes in marine environments.

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Endogenous formation of N-nitroso compounds (NOCs), which are known animal carcinogens, could contribute to human carcinogenesis but definitive evidence is still lacking. To investigate the relevance of NOCs in human colorectal cancer (CRC) development, we analyzed whole genome gene expression modifications in human colon biopsies in relation to fecal NOC exposure. We had a particular interest in patients suffering from intestinal inflammation as this may stimulate endogenous NOC formation, and consequently predispose to CRC risk. Inflammatory bowel disease (IBD) patients diagnosed with ulcerative colitis and irritable bowel syndrome patients without inflammation, serving as controls, were therefore recruited. Fecal NOC were demonstrated in the majority of subjects. By associating gene expression levels of all subjects to fecal NOC levels, we identified a NOC exposure-associated transcriptomic response that suggests that physiological NOC concentrations may potentially induce genotoxic responses and chromatin modifications in human colon tissue, both of which are linked to carcinogenicity. In a network analysis, chromatin modifications were linked to 11 significantly modulated histone genes, pointing towards a possible epigenetic mechanism that may be relevant in comprehending NOC-induced carcinogenesis. In addition, pro-inflammatory transcriptomic modifications were identified in visually non-inflamed regions of the IBD colon. However, fecal NOC levels were slightly but not significantly increased in IBD patients, suggesting that inflammation did not strongly stimulate NOC formation. We conclude that NOC exposure is associated with gene expression modifications in the human colon that may suggest a potential role of these compounds in CRC development.

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Red meat consumption is associated with an increased colorectal cancer (CRC) risk, which may be due to an increased endogenous formation of genotoxic N-nitroso compounds (NOCs). To assess the impact of red meat consumption on potential risk factors of CRC, we investigated the effect of a 7-day dietary red meat intervention in human subjects on endogenous NOC formation and fecal water genotoxicity in relation to genome-wide transcriptomic changes induced in colonic tissue. The intervention showed no effect on fecal NOC excretion but fecal water genotoxicity significantly increased in response to red meat intake. Colonic inflammation caused by inflammatory bowel disease, which has been suggested to stimulate endogenous nitrosation, did not influence fecal NOC excretion or fecal water genotoxicity. Transcriptomic analyses revealed that genes significantly correlating with the increase in fecal water genotoxicity were involved in biological pathways indicative of genotoxic effects, including modifications in DNA damage repair, cell cycle, and apoptosis pathways. Moreover, WNT signaling and nucleosome remodeling pathways were modulated which are implicated in human CRC development. We conclude that the gene expression changes identified in this study corroborate the genotoxic potential of diets high in red meat and point towards a potentially increased CRC risk in humans.

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Haem in red meat (RM) stimulates the endogenous production of mutagenic nitroso compounds (NOC). Processed (nitrite-preserved red) meat additionally contains high concentrations of preformed NOC. In two studies, of a fresh RM versus a vegetarian (VEG) diet (six males and six females) and of a nitrite-preserved red meat (PM) versus a VEG diet (5 males and 11 females), we investigated whether processing of meat might increase colorectal cancer risk by stimulating nitrosation and DNA damage. Meat diets contained 420 g (males) or 366 g (females) meat/per day. Faecal homogenates from day 10 onwards were analysed for haem and NOC and asso- ciated supernatants for genotoxicity. Means are adjusted for differ- ences in male to female ratios between studies. Faecal NOC concentrations on VEG diets were low (2.6 and 3.5 mmol/g) but significantly higher on meat diets (PM 175 ± 19 nmol/g versus RM 185 ± 22 nmol/g; P 5 0.75). The RM diet resulted in a larger pro- portion of nitrosyl iron (RM 78% versus PM 54%; P < 0.0001) and less nitrosothiols (RM 12% versus PM 19%; P < 0.01) and other NOC (RM 10% versus PM 27%; P < 0.0001). There was no statis- tically significant difference in DNA breaks induced by faecal water (FW) following PM and RM diets (P 5 0.80). However, PM re- sulted in higher levels of oxidized pyrimidines (P < 0.05). Surpris- ingly, VEG diets resulted in significantly more FW-induced DNA strand breaks than the meat diets (P < 0.05), which needs to be clarified in further studies. Meats cured with nitrite have the same effect as fresh RM on endogenous nitrosation but show increased FW-induced oxidative DNA damage.

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Scope Epidemiological and clinical studies have demonstrated that the consumption of red haem-rich meat may contribute to the risk of colorectal cancer. Two hypotheses have been put forward to explain this causal relationship, i.e. N-nitroso compound (NOC) formation and lipid peroxidation (LPO). Methods and Results In this study, the NOC-derived DNA adduct O6-carboxymethylguanine (O6-CMG) and the LPO product malondialdehyde (MDA) were measured in individual in vitro gastrointestinal digestions of meat types varying in haem content (beef, pork, chicken). While MDA formation peaked during the in vitro small intestinal digestion, alkylation and concomitant DNA adduct formation was observed in seven (out of 15) individual colonic digestions using separate faecal inocula. From those, two haem-rich meat digestions demonstrated a significantly higher O6-CMG formation (p < 0.05). MDA concentrations proved to be positively correlated (p < 0.0004) with haem content of digested meat. The addition of myoglobin, a haem-containing protein, to the digestive simulation showed a dose–response association with O6-CMG (p = 0.004) and MDA (p = 0.008) formation. Conclusion The results suggest the haem-iron involvement for both the LPO and NOC pathway during meat digestion. Moreover, results unambiguously demonstrate that DNA adduct formation is very prone to inter-individual variation, suggesting a person-dependent susceptibility to colorectal cancer development following haem-rich meat consumption.