Synchronous Buck converter with Output Impedance Correction Circuit

This work is related to the improvement of the output impedance of the Buck converter by means of introducing an additional power path that virtually increases the output capacitance during transients. It is well known that in VRM applications, with wide load steps, voltage overshoots and undershoots may lead to undesired performance of the load. To solve this problem, high-bandwidth high-switching frequency power converters can be applied to reduce the transient time or a big output capacitor can be applied to reduce the output impedance. The first solution can degrade the efficiency by increasing switching losses of the MOSFETS, and the second solution is penalizing the cost and size of the output filter. The Output Impedance Correction Circuit (OICC), as presented here, is used to inject or extract a current n-1 times larger than the output capacitor current, thus virtually increasing n times the value of the output capacitance during the transients. This feature allows the usage of a low frequency Buck converter with smaller capacitor but satisfying the dynamic requirements.

Survey of architectures and optimizations for wide bandwidth envelope amplifier

In the last years, RF power amplifiers are taking advantage of the switched dc-dc converters to use them in several architectures that may improve the efficiency of the amplifier, keeping a good linearity. The use of linearization techniques such as Envelope Elimination and Restoration(EER) and Envelope Tracking (ET) requires a very fast dc-dc power converter to provide variable voltage supply to the power amplifier but theoretically the efficiency can be much higher than using the classical amplifiers belonging to classes A, B or AB. The purpose of this paper is to analyze the state of the art of the power converters used as envelope amplifiers in this application. The power topologies will be explored and several important parameters such as efficiency, bandwidth will be discussed.

Sensorless explicit model predictive control for multi-phase buck converters with variable output voltage

The purpose of this paper is to use the predictive control to take advantage of the future information in order to improve the reference tracking. The control attempts to increase the bandwidth of the conventional regulators by using the future information of the reference, which is supposed to be known in advance. A method for designing a controller is also proposed. A comparison in simulation with a conventional regulator is made controlling a four-phase Buck converter. Advantages and disadvantages are analyzed based on simulation results.

Practical Characterization of Input-Parallel-Connected Converters with a Common Input Filter

The paper presents a method to analyze robust stability and transient performance of a distributed power system consisting of commercial converter modules interconnected through a common input filter. The method is based on the use of four transfer functions, which are measurable from the converter input and output terminals. It is shown that these parameters provide important information on the power module sensitivity to the interactions caused by the external impedances. Practical characterization for the described system structure is performed introducing special transfer functions utilized for the interactions assessment. Experimental results are provided to support the presented analysis procedure.

Optimal Design of Envelope Amplifier Based on Linear Assisted Buck Converter

Envelope Tracking (ET) and Envelope Elimination and Restoration (EER) are two techniques that have been used as a solution for highly efficient linear RF Power Amplifiers (PA). In both techniques the most important part is a dc-dc converter called envelope amplifier that has to supply the RF PA with variable voltage. Besides high efficiency, its bandwidth is very important as well. Envelope amplifier based on parallel combination of a switching dc-dc converter and a linear regulator is an architecture that is widely used due to its simplicity. In this paper we discuss about theoretical limitations of this architecture regarding its efficiency and we demonstrate two possible way of its implementation. In order to derive the presented conclusions, a theoretical model of envelope amplifier's efficiency has been presented. Additionally, the benefits of the new emerging GaN technology for this application have been shown as well.

Optimal design of AC EMI filters with damping networks and effect on the systems power factor

The cutoff frequencies of an EMI filter are normally given by the noise attenuation requirements the filter has to fulfill. In order to select the component values of the filter elements, i.e. inductances and capacitances, an additional design criterium is needed. In this paper the effect of the EMI filter input and output impedances are considered. The input impedance influences the filters effect on the system displacement power factor and the output impedance plays a key role in the system stability. The effect of filter element values, the number of filter stages as well as additional damping networks are considered and a design procedure is provided. For this analysis a two-port description of the input filters employing ABCD-parameters is used.

Loss model for a high frequency and low load DC/DC synchronous buck converter

This work presents a behavioral-analytical hybrid loss model for a buck converter. The model has been designed for a wide operating frequency range up to 4MHz and a low power range (below 20W). It is focused on the switching losses obtained in the power MOSFETs. Main advantages of the model are the fast calculation time and a good accuracy. It has been validated by simulation and experimentally with one Ga, power transistor and two Si MOSFETs. Results show good agreement between measurements and the model.

Improvement of the Dynamic Performance of a Buck Converter using Controlled Current Source as an Additional Energy Path

This work is related to the improvement of the dynamic performance of the Buck converter by means of introducing an additional power path that virtually increase s the output capacitance during transients, thus improving the output impedance of the converter. It is well known that in VRM applications, with wide load steps, voltage overshoots and undershoots ma y lead to undesired performance of the load. To solve this problem, high-bandwidth high-switching frequency power converter s can be applied to reduce the transient time or a big output capacitor can be applied to reduce the output impedance. The first solution can degrade the efficiency by increasing switching losses of the MOSFETS, and the second solution is penalizing the cost and size of the output filter. The additional energy path, as presented here, is introduced with the Output Impedance Correction Circuit (OICC) based on the Controlled Current Source (CCS). The OICC is using CCS to inject or extract a current n - 1 times larger than the output capacitor current, thus virtually increasing n times the value of the output capacitance during the transients. This feature allows the usage of a low frequency Buck converter with smaller capacitor but satisfying the dynamic requirements.

Hybrid behavioral-analytical loss model for a high frequency and low load DC/DC buck converter

This work presents a behavioral-analytical hybrid loss model for a buck converter. The model has been designed for a wide operating frequency range up to 4MHz and a low power range (below 20W). It is focused on the switching losses obtained in the power MOSFETs. Main advantages of the model are the fast calculation time (below 8.5 seconds) and a good accuracy, which makes this model suitable for the optimization process of the losses in the design of a converter. It has been validated by simulation and experimentally with one GaN power transistor and three Si MOSFETs. Results show good agreement between measurements and the model

High Efficiency Envelope Amplifier Using The Slow-Envelope Technique

High efficiency envelope amplifiers are demanded in EER technique for RF transmitters, which benefits low maintaining cost or long battery time. The conventional solution is a dc-dc switching converters. This dc-dc converter should operate at very high frequency to track an envelope in the MHz range to supply the power amplifier. One of the alternative circuits suitable for this application is a hybrid topology composed of a switched converter and a linear regulator in series that work together to adjust the output voltage to track the envelope with accuracy. This topology can take advantage of the reduced slew-rate technique (also called slow-envelope technique) where switching dc-dc converter provides the RF envelope with limited slew rate in order to avoid high switching frequency and high power losses, while the linear regulator performs fine adjustment in order to obtain the exact replica of the RF envelope. The combination of this control technique with this topology is proposed in this paper. Envelopes with different bandwidth will be considered to optimize the efficiency of the dc-dc converter.

Envelope Amplifier Based on a Hybrid Series Converter With The Slow-envelope Technique

High frequency dc-dc switching converters are used as envelope amplifiers in RF transmitters. The dc-dc converter should operate at very high frequency to track an envelope in the MHz range to supply the power amplifier. One of the circuits suitable for this application is a hybrid topology composed of a switched converter and a linear regulator in series that work together to adjust the output voltage to track the envelope with accuracy. This topology can take advantage of the reduced slew-rate technique where switching dc-dc converter provides the RF envelope with limited slew rate in order to avoid high switching frequency and high power losses, while the linear regulator performs fine adjustment in order to obtain the exact replica of the RF envelope. The combination of this control technique with this topology is proposed in this paper. Envelopes with different bandwidth will be considered to optimize the efficiency of the dc-dc converter. The calculations and experiments have been done to track a 2MHz envelope in the range 0-12V for an EER RF transmitter.

Comparison of V2IC control with voltage mode and current mode controls for high frequency (MHz) and very fast response applications

High switching frequencies (several MHz) allow the integration of low power DC/DC converters. Although, in theory, a high switching frequency would make possible to implement a conventional Voltage Mode control (VMC) or Peak Current Mode control (PCMC) with very high bandwidth, in practice, parasitic effects and robustness limits the applicability of these control techniques. This paper compares VMC and CMC techniques with the V2IC control. This control is based on two loops. The fast internal loop has information of the output capacitor current and the error voltage, providing fast dynamic response under load and voltage reference steps, while the slow external voltage loop provides accurate steady state regulation. This paper shows the fast dynamic response of the V2IC control under load and output voltage reference steps and its robustness operating with additional output capacitors added by the customer.

Analysis and optimized design of a distributed multi-stage EMC filter for an interleaved three-phase PWM-rectifier system for aircraft applications

Different possible input filter configurations for a modular three-phase PWM rectifier system consisting of three interleaved converter cells are studied. The system is designed for an aircraft application where MIL-STD-461E conducted EMI standards have to be met and system weight is a critical design issue. The importance of a LISN model on the simulated noise levels and the effect of interleaving and power unbalance between the different converter modules is discussed. The effect of the number of filter stages and the degree of distribution of the filter stages among the individual converter modules on the weight and losses of the input filter is studied and optimal filter structures are proposed.

An overview of fast DC-DC converters for envelope amplifier in RF transmitters

In the last years, RF power amplifiers are taking advantage of the switched dc-dc converters to use them in several architectures that may improve the efficiency of the amplifier, keeping a good linearity. The use of linearization techniques such as Envelope Elimination and Restoration (EER) and Envelope Tracking (ET) requires a very fast dc-dc power converter to provide variable voltage supply to the power amplifier but theoretically the efficiency can be much higher than using the classical amplifiers belonging to classes A, B or AB. The purpose of this paper is to analyze the state of the art of the power converters used as envelope amplifiers in this application where a fast output voltage variation is required. The power topologies will be explored and several important parameters such as efficiency, bandwidth and output voltage range will be discussed.

Adaptive Control for ZVS Three Phase Full Active Bridge Converter with ARCN

This paper presents an adaptive control for the auxiliary circuit, called ARCN (Auxiliary Resonant Commutating Network), used to achieve ZVS in full active bridge converters under a wide load range. Depending on the load conditions, the proposed control adapts the timing of the ARCN to minimize the losses. The principle of operation and implementation considerations are presented for a three phase full active bridge converter, proposing different methods to implement the control according to the specifications. The experimental results shown verify the proposed methodology.