Apparatus and method for heat-run test on high-power PWM converters with low energy expenditure

Before installation, a voltage source converter is usually subjected to heat-run test to verify its thermal design and performance under load. For heat-run test, the converter needs to be operated at rated voltage and rated current for a substantial length of time. Hence, such tests consume huge amount of energy in case of high-power converters. Also, the capacities of the source and loads available in the research and development (R&D) centre or the production facility could be inadequate to conduct such tests. This paper proposes a method to conduct heat-run tests on high-power, pulse width modulated (PWM) converters with low energy consumption. The experimental set-up consists of the converter under test and another converter (of similar or higher rating), both connected in parallel on the ac side and open on the dc side. Vector-control or synchronous reference frame control is employed to control the converters such that one draws certain amount of reactive power and the other supplies the same; only the system losses are drawn from the mains. The performance of the controller is validated through simulation and experiments. Experimental results, pertaining to heat-run tests on a high-power PWM converter, are presented at power levels of 25 kVA to 150 kVA.

New modular structure DC-DC converter without electrolytic capacitors for renewable energy applications

Uma aplicacao da celula de comutacao ZVS-PWM-GEPAE ao conversor DC-AC

This work presents the design and procedure of a DC-to-AC converter using a ZVS Commutation Cell developed by Barbi and Martins (1991) and applied to the family of DC-to-DC PWM converters. Firstly, we show the cell applied to buck converter. The stages of operation and the main current and voltage equations of the resonant devices are presented. Next, we adapt the converter to the regenerative operation mode. Hence, the full bridge converter at low frequency operation is conected on the DC-to-DC stage (at high frequency) output ends (Seixas, 1993). Commutation of zero voltage for all switches, PWM at constant frequency and neither overvoltage nor additional current stress are observed by digital simulation. The design example and experimental results obtained by prototype rated at 275 V, 1 kW and 40 kHz are also presented.

Design and implementation of a dc-dc converter based on variable structure control of switched systems

This paper presents a control method for a class of continuous-time switched systems, using state feedback variable structure controllers. The method is applied to the control of a non-trivial dc-dc power converter and a simple and inexpensive control circuit design, that was simulated using the software PSpice, is proposed. The design is based on Lyapunov-Metzler-SPR systems and the performance of the resulting control system is superior to that afforded by a recently proposed alternative sliding-mode control technique. © 2011 IFAC.

AC-DC three-phase multipulse converter with boost DC-DC stage and constant hysteresis control

This work proposes a new three-phase multipulse rectifier based on the delta autotransformer connection with DC-DC Boost stages and constant hysteresis control which has the objective of providing a reliable DC bus for on-board applications, electric motor drives and similars, always considering power quality issues. Thus, the proposal presents 0.99 power factor, 6% harmonic distortions in the currents from the mains and enhanced magnetic core utilization, which results in low weight and volume for the overall converter. The proposed control technique uses the simple constant hysteresis concept, thus leading to a low-cost but effective and reliable strategy. © 2011 IEEE.

Ultrahigh step-up dc-dc converter for distributed generation by three Degrees of Freedom (3DoF) approach

This paper proposes a novel dc-dc converter topology to achieve an ultrahigh step-up ratio while maintaining a high conversion efficiency. It adopts a three degree of freedom approach in the circuit design. It also demonstrates the flexibility of the proposed converter to combine with the features of modularity, electrical isolation, soft-switching, low voltage stress on switching devices, and is thus considered to be an improved topology over traditional dc-dc converters. New control strategies including the two-section output voltage control and cell idle control are also developed to improve the converter performance. With the cell idle control, the secondary winding inductance of the idle module is bypassed to decrease its power loss. A 400-W dc-dc converter is prototyped and tested to verify the proposed techniques, in addition to a simulation study. The step-up conversion ratio can reach 1:14 with a peak efficiency of 94% and the proposed techniques can be applied to a wide range of high voltage and high power distributed generation and dc power transmission.

New modular structure DC-DC converter without electrolytic capacitors for renewable energy applications

Electrolytic capacitors are extensively used in power converters but they are bulky, unreliable, and have short lifetimes. This paper proposes a new capacitor-free high step-up dc-dc converter design for renewable energy applications such as photovoltaics (PVs) and fuel cells. The primary side of the converter includes three interleaved inductors, three main switches, and an active clamp circuit. As a result, the input current ripple is greatly reduced, eliminating the necessity for an input capacitor. In addition, zero voltage switching (ZVS) is achieved during switching transitions for all active switches, so that switching losses can be greatly reduced. Furthermore, a three-phase modular structure and six pulse rectifiers are employed to reduce the output voltage ripple. Since magnetic energy stored in the leakage inductance is recovered, the reverse-recovery issue of the diodes is effectively solved. The proposed converter is justified by simulation and experimental tests on a 1-kW prototype.

Distributed Power balance and damping control for high power multiport LCL DC hub

This project is funded by European Research Council in FP7; grant no 259328, 2010 and EPSRC grant no EP/K006428/1, 2013.

Distributed Power balance and damping control for high power multiport LCL DC hub

This project is funded by European Research Council in FP7; grant no 259328, 2010 and EPSRC grant no EP/K006428/1, 2013.

Multilevel converters in renewable energy systems

In photovoltaic, fuel cells and storage batteries, the low output DC voltage should be boosted. Therefore, a step-up converter is necessary to boost the low DC voltage for the DC link voltage of the inverter. The main contribution of this chapter is to electrical energy conversion in renewable energy systems based on multilevel inverters. Different configuration of renewable energy systems based on power converters will be discussed in detail. Finally, a new single inductor Multi-Output Boost (MOB) converter is proposed, which is compatible with the diode-clamped configuration. Steady state and dynamic analyses have been carried out in order to show the validity of the proposed topology. Then the joint circuit of the proposed DC-DC converter with a three-level diode-clamped converter is presented in order to have a series regulated voltage at the DC link voltage of the diode-clamped inverter. MOB converter can boost the low input DC voltage of the renewable energy sources and at the same time adjust the voltage across each capacitor to the desired voltage levels, thereby solving the main problem associated with capacitor voltage imbalance in this type of multilevel converter.

A new multilevel converter configuration for high power and high quality applications

The Queensland University of Technology (QUT) allows the presentation of theses for the Degree of Doctor of Philosophy in the format of published or submitted papers, where such papers have been published, accepted or submitted during the period of candidature. This thesis is composed of ten published /submitted papers and book chapters of which nine have been published and one is under review. This project is financially supported by an Australian Research Council (ARC) Discovery Grant with the aim of investigating multilevel topologies for high quality and high power applications, with specific emphasis on renewable energy systems. The rapid evolution of renewable energy within the last several years has resulted in the design of efficient power converters suitable for medium and high-power applications such as wind turbine and photovoltaic (PV) systems. Today, the industrial trend is moving away from heavy and bulky passive components to power converter systems that use more and more semiconductor elements controlled by powerful processor systems. However, it is hard to connect the traditional converters to the high and medium voltage grids, as a single power switch cannot stand at high voltage. For these reasons, a new family of multilevel inverters has appeared as a solution for working with higher voltage levels. Besides this important feature, multilevel converters have the capability to generate stepped waveforms. Consequently, in comparison with conventional two-level inverters, they present lower switching losses, lower voltage stress across loads, lower electromagnetic interference (EMI) and higher quality output waveforms. These properties enable the connection of renewable energy sources directly to the grid without using expensive, bulky, heavy line transformers. Additionally, they minimize the size of the passive filter and increase the durability of electrical devices. However, multilevel converters have only been utilised in very particular applications, mainly due to the structural limitations, high cost and complexity of the multilevel converter system and control. New developments in the fields of power semiconductor switches and processors will favor the multilevel converters for many other fields of application. The main application for the multilevel converter presented in this work is the front-end power converter in renewable energy systems. Diode-clamped and cascade converters are the most common type of multilevel converters widely used in different renewable energy system applications. However, some drawbacks – such as capacitor voltage imbalance, number of components, and complexity of the control system – still exist, and these are investigated in the framework of this thesis. Various simulations using software simulation tools are undertaken and are used to study different cases. The feasibility of the developments is underlined with a series of experimental results. This thesis is divided into two main sections. The first section focuses on solving the capacitor voltage imbalance for a wide range of applications, and on decreasing the complexity of the control strategy on the inverter side. The idea of using sharing switches at the output structure of the DC-DC front-end converters is proposed to balance the series DC link capacitors. A new family of multioutput DC-DC converters is proposed for renewable energy systems connected to the DC link voltage of diode-clamped converters. The main objective of this type of converter is the sharing of the total output voltage into several series voltage levels using sharing switches. This solves the problems associated with capacitor voltage imbalance in diode-clamped multilevel converters. These converters adjust the variable and unregulated DC voltage generated by renewable energy systems (such as PV) to the desirable series multiple voltage levels at the inverter DC side. A multi-output boost (MOB) converter, with one inductor and series output voltage, is presented. This converter is suitable for renewable energy systems based on diode-clamped converters because it boosts the low output voltage and provides the series capacitor at the output side. A simple control strategy using cross voltage control with internal current loop is presented to obtain the desired voltage levels at the output voltage. The proposed topology and control strategy are validated by simulation and hardware results. Using the idea of voltage sharing switches, the circuit structure of different topologies of multi-output DC-DC converters – or multi-output voltage sharing (MOVS) converters – have been proposed. In order to verify the feasibility of this topology and its application, steady state and dynamic analyses have been carried out. Simulation and experiments using the proposed control strategy have verified the mathematical analysis. The second part of this thesis addresses the second problem of multilevel converters: the need to improve their quality with minimum cost and complexity. This is related to utilising asymmetrical multilevel topologies instead of conventional multilevel converters; this can increase the quality of output waveforms with a minimum number of components. It also allows for a reduction in the cost and complexity of systems while maintaining the same output quality, or for an increase in the quality while maintaining the same cost and complexity. Therefore, the asymmetrical configuration for two common types of multilevel converters – diode-clamped and cascade converters – is investigated. Also, as well as addressing the maximisation of the output voltage resolution, some technical issues – such as adjacent switching vectors – should be taken into account in asymmetrical multilevel configurations to keep the total harmonic distortion (THD) and switching losses to a minimum. Thus, the asymmetrical diode-clamped converter is proposed. An appropriate asymmetrical DC link arrangement is presented for four-level diode-clamped converters by keeping adjacent switching vectors. In this way, five-level inverter performance is achieved for the same level of complexity of the four-level inverter. Dealing with the capacitor voltage imbalance problem in asymmetrical diodeclamped converters has inspired the proposal for two different DC-DC topologies with a suitable control strategy. A Triple-Output Boost (TOB) converter and a Boost 3-Output Voltage Sharing (Boost-3OVS) converter connected to the four-level diode-clamped converter are proposed to arrange the proposed asymmetrical DC link for the high modulation indices and unity power factor. Cascade converters have shown their abilities and strengths in medium and high power applications. Using asymmetrical H-bridge inverters, more voltage levels can be generated in output voltage with the same number of components as the symmetrical converters. The concept of cascading multilevel H-bridge cells is used to propose a fifteen-level cascade inverter using a four-level H-bridge symmetrical diode-clamped converter, cascaded with classical two-level Hbridge inverters. A DC voltage ratio of cells is presented to obtain maximum voltage levels on output voltage, with adjacent switching vectors between all possible voltage levels; this can minimize the switching losses. This structure can save five isolated DC sources and twelve switches in comparison to conventional cascade converters with series two-level H bridge inverters. To increase the quality in presented hybrid topology with minimum number of components, a new cascade inverter is verified by cascading an asymmetrical four-level H-bridge diode-clamped inverter. An inverter with nineteen-level performance was achieved. This synthesizes more voltage levels with lower voltage and current THD, rather than using a symmetrical diode-clamped inverter with the same configuration and equivalent number of power components. Two different predictive current control methods for the switching states selection are proposed to minimise either losses or THD of voltage in hybrid converters. High voltage spikes at switching time in experimental results and investigation of a diode-clamped inverter structure raised another problem associated with high-level high voltage multilevel converters. Power switching components with fast switching, combined with hard switched-converters, produce high di/dt during turn off time. Thus, stray inductance of interconnections becomes an important issue and raises overvoltage and EMI issues correlated to the number of components. Planar busbar is a good candidate to reduce interconnection inductance in high power inverters compared with cables. The effect of different transient current loops on busbar physical structure of the high-voltage highlevel diode-clamped converters is highlighted. Design considerations of proper planar busbar are also presented to optimise the overall design of diode-clamped converters.

Improving the penetration level of PVs using DC link for residential buildings

This paper proposes the use of a common DC link in residential buildings to allow customers to inject their surplus power that otherwise would be limited due to AC power quality violation. The surplus power can easily be transferred to other phases and feeders through common DC link in order to maintain the balance between generated power and load. PSCAD-EMTDC platform is used to simulate and study the proposed approach. This paper suggests that this structure can be a pathway to the future DC power systems.

An analysis on the possibility of using capacitors of a three-level capacitor clamped inverter as power smoothing elements for wind power systems

This paper presents a new direct integration scheme for supercapacitors that are used to mitigate short term power fluctuations in wind power systems. The idea is to replace ordinary capacitors of a 3-level flying capacitor inverter by supercapacitors and operate them under variable voltage conditions. This approach eliminates the need of interfacing dc-dc converters for supercapacitor integration and thus considerably improves the overall efficiency. However, the major problem of this unique system is the change of supercapacitor voltages. An analysis on the effects of these voltage variations are presented. A space vector modulation method, built from the scratch, is proposed to generate undistorted current even in the presence of dynamic changes in supercapacitor voltages. A supercapacitor voltage equalisation algorithm is also proposed. Furthermore, resistive behavior of supercapacitors at high frequencies and the need for a low pass filter are highlighted. Simulation results are presented to verify the efficacy of the proposed system in suppressing short term wind power fluctuations.

A structure-preserving energy function for stability analysis of AC/DC systems

Direct stability analysis ofAC/DC power systems using a structure-preserving energy function (SPEF) is proposed in this paper. The system model considered retains the load buses thereby enabling the representation of nonlinear voltage dependent loads. TheHVDC system is represented with the same degree of detail as is normally done in transient stability simulation. The converter controllers can be represented by simplified or detailed models. Two or multi-terminalDC systems can be considered. The stability analysis is illustrated with a 3-machine system example and encouraging results have been obtained.

Digital Dead Time Logic and Protection Circuitry for PWM Voltage Source Converters

Power semiconductor devices have finite turn on and turn off delays that may not be perfectly matched. In a leg of a voltage source converter, the simultaneous turn on of one device and the turn off of the complementary device will cause a DC bus shoot through, if the turn off delay is larger than the turn on delay time. To avoid this situation it is common practice to blank the two complementary devices in a leg for a small duration of time while switching, which is called dead time. This paper proposes a logic circuit for digital implementation required to control the complementary devices of a leg independently and at the same time preventing cross conduction of devices in a leg, and while providing accurate and stable dead time. This implementation is based on the concept of finite state machines. This circuit can also block improper PWM pulses to semiconductor switches and filters small pulses notches below a threshold time width as the narrow pulses do not provide any significant contribution to average pole voltage, but leads to increased switching loss. This proposed dead time logic has been implemented in a CPLD and is implemented in a protection and delay card for 3- power converters.