56 resultados para Counterfeiting


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In January 2012, Poland witnessed massive protests, both in the streets and on the Internet, opposing ratification of the Anti-Counterfeiting Trade Agreement, which triggered a wave of strong anti-ACTA movements across Europe. In Poland, these protests had further far-reaching consequences, as they not only changed the initial position of the government on the controversial treaty but also actually started a public debate on the role of copyright law in the information society. Moreover, as a result of these events the Polish Ministry for Administration and Digitisation launched a round table, gathering various stakeholders to negotiate a potential compromise with regard to copyright law that would satisfy conflicting interests of various actors. This contribution will focus on a description of this massive resentment towards ACTA and a discussion of its potential reasons. Furthermore, the mechanisms that led to the extraordinary influence of the anti-ACTA movement on the governmental decisions in Poland will be analysed through the application of models and theories stemming from the social sciences. The importance of procedural justice in the copyright legislation process, especially its influence on the image of copyright law and obedience of its norms, will also be emphasised.

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Contains notes on cases before the Supreme Court in Lennox and Worcester, Massachusetts relating to counterfeiting, libel, and fraud.

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Mode of access: Internet.

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Mode of access: Internet.

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"April 18,1990."

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This thesis explores methods for fabrication of nanohole arrays, and their integration into a benchtop system for use as sensors or anti-counterfeit labels. Chapter 1 gives an introduction to plasmonics and more specifically nanohole arrays and how they have potential as label free sensors compared to the current biosensors on the market. Various fabrication methods are explored, including Focused Ion Beam, Electron Beam Lithography, Nanoimprint lithography, Template stripping and Phase Shift Lithography. Focused Ion Beam was chosen to fabricate the nanohole arrays due to its suitability for rapid prototyping and it’s relatively low cost. In chapter 2 the fabrication of nanohole arrays using FIB is described, and the samples characterised. The fabricated nanohole arrays are tested as bulk refractive index sensors, before a bioassay using whole molecule human IgG antibodies and antigen is developed and performed on the senor. In chapter 3 the fabricated sensors are integrated into a custom built system, capable of real time, multiplexed detection of biomolecules. Here, scFv antibodies of two biomolecules relevant to the detection of pancreatic cancer (C1q and C3) are attached to the nanohole arrays, and detection of their complementary proteins is demonstrated both in buffer (10 nM detection of C1q Ag) and human serum. Chapter 4 explores arrays of anisotropic (elliptical) nanoholes and shows how the shape anisotropy induces polarisation sensitive transmission spectra, in both simulations and fabricated arrays. The potential use of such samples as visible and NIR tag for anti-counterfeiting applications is demonstrated. Finally, chapter 5 gives a summary of the work completed and discusses potential future work in this area.

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Contemporary integrated circuits are designed and manufactured in a globalized environment leading to concerns of piracy, overproduction and counterfeiting. One class of techniques to combat these threats is circuit obfuscation which seeks to modify the gate-level (or structural) description of a circuit without affecting its functionality in order to increase the complexity and cost of reverse engineering. Most of the existing circuit obfuscation methods are based on the insertion of additional logic (called “key gates”) or camouflaging existing gates in order to make it difficult for a malicious user to get the complete layout information without extensive computations to determine key-gate values. However, when the netlist or the circuit layout, although camouflaged, is available to the attacker, he/she can use advanced logic analysis and circuit simulation tools and Boolean SAT solvers to reveal the unknown gate-level information without exhaustively trying all the input vectors, thus bringing down the complexity of reverse engineering. To counter this problem, some ‘provably secure’ logic encryption algorithms that emphasize methodical selection of camouflaged gates have been proposed previously in literature [1,2,3]. The contribution of this paper is the creation and simulation of a new layout obfuscation method that uses don't care conditions. We also present proof-of-concept of a new functional or logic obfuscation technique that not only conceals, but modifies the circuit functionality in addition to the gate-level description, and can be implemented automatically during the design process. Our layout obfuscation technique utilizes don’t care conditions (namely, Observability and Satisfiability Don’t Cares) inherent in the circuit to camouflage selected gates and modify sub-circuit functionality while meeting the overall circuit specification. Here, camouflaging or obfuscating a gate means replacing the candidate gate by a 4X1 Multiplexer which can be configured to perform all possible 2-input/ 1-output functions as proposed by Bao et al. [4]. It is important to emphasize that our approach not only obfuscates but alters sub-circuit level functionality in an attempt to make IP piracy difficult. The choice of gates to obfuscate determines the effort required to reverse engineer or brute force the design. As such, we propose a method of camouflaged gate selection based on the intersection of output logic cones. By choosing these candidate gates methodically, the complexity of reverse engineering can be made exponential, thus making it computationally very expensive to determine the true circuit functionality. We propose several heuristic algorithms to maximize the RE complexity based on don’t care based obfuscation and methodical gate selection. Thus, the goal of protecting the design IP from malicious end-users is achieved. It also makes it significantly harder for rogue elements in the supply chain to use, copy or replicate the same design with a different logic. We analyze the reverse engineering complexity by applying our obfuscation algorithm on ISCAS-85 benchmarks. Our experimental results indicate that significant reverse engineering complexity can be achieved at minimal design overhead (average area overhead for the proposed layout obfuscation methods is 5.51% and average delay overhead is about 7.732%). We discuss the strengths and limitations of our approach and suggest directions that may lead to improved logic encryption algorithms in the future. References: [1] R. Chakraborty and S. Bhunia, “HARPOON: An Obfuscation-Based SoC Design Methodology for Hardware Protection,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 10, pp. 1493–1502, 2009. [2] J. A. Roy, F. Koushanfar, and I. L. Markov, “EPIC: Ending Piracy of Integrated Circuits,” in 2008 Design, Automation and Test in Europe, 2008, pp. 1069–1074. [3] J. Rajendran, M. Sam, O. Sinanoglu, and R. Karri, “Security Analysis of Integrated Circuit Camouflaging,” ACM Conference on Computer Communications and Security, 2013. [4] Bao Liu, Wang, B., "Embedded reconfigurable logic for ASIC design obfuscation against supply chain attacks,"Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014 , vol., no., pp.1,6, 24-28 March 2014.

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Dissertação (mestrado)—Universidade de Brasília, Instituto de Química, Programa de Pós-Graduação em Química, 2015.

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Many algorithms have been introduced to deterministically authenticate Radio Frequency Identification (RFID) tags, while little work has been done to address scalability issue in batch authentications. Deterministic approaches verify tags one by one, and the communication overhead and time cost grow linearly with increasing size of tags. We design a fast and scalable counterfeits estimation scheme, INformative Counting (INC), which achieves sublinear authentication time and communication cost in batch verifications. The key novelty of INC builds on an FM-Sketch variant authentication synopsis that can capture key counting information using only sublinear space. With the help of this well-designed data structure, INC is able to provide authentication results with accurate estimates of the number of counterfeiting tags and genuine tags, while previous batch authentication methods merely provide 0/1 results indicating the existence of counterfeits. We conduct detailed theoretical analysis and extensive experiments to examine this design and the results show that INC significantly outperforms previous work in terms of effectiveness and efficiency.

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We use an augmented version of the UK Innovation Surveys 4–7 to explore firm-level and local area openness externalities on firms’ innovation performance. We find strong evidence of the value of external knowledge acquisition both through interactive collaboration and non-interactive contacts such as demonstration effects, copying or reverse engineering. Levels of knowledge search activity remain well below the private optimum, however, due perhaps to informational market failures. We also find strong positive externalities of openness resulting from the intensity of local interactive knowledge search—a knowledge diffusion effect. However, there are strong negative externalities resulting from the intensity of local non-interactive knowledge search—a competition effect. Our results provide support for local initiatives to support innovation partnering and counter illegal copying or counterfeiting. We find no significant relationship between either local labour quality or employment composition and innovative outputs.