Developement of DSP based educational kit for power electronics and drives

The educational kit was developed for power electronics and drives. The need and purpose of this kit is to train engineers with current technology of digital control in power electronics. The DSP is the natural choice as it is able to perform high speed calculations required in power electronics. The educational kit consists of a DSP platform using TI DSP TMS320C50 starter kit, an inverter and an induction machine-dc machine set. A set of experiments have been prepared so that DSP programming can be learned easily in a smooth fashion. Here the application presented is open loop V/F control of three phase induction using sine pulse width modulation technique.

Waveform synthesis using Walsh functions International Journal of Electronics

A software and a microprocessor based hardware for waveform synthesis using Walsh functions are described. The software is based on Walsh function generation using Hadamard matrices and on the truncated Walsh series expansion for the waveform to be synthesized. The hardware employs six microprocessor controlled programmable Walsh function generators (PWFGs) for generating the first six non-vanishing terms of the truncated Walsh series. Improved approximation to a given waveform may be achieved by employing additional PWFGs.

Experimental results of an activated carbon-HFC 134a adsorption cooling system for thermal management of electronics

Results of performance measurement of a small cooling capacity laboratory model of an adsorption refrigeration system for thermal management of electronics are compiled. This adsorption cooler was built with activated carbon as the adsorbent and HFC 134a as the refrigerant to produce a cooling capacity under 5 W using waste heat up to 90 degrees C. The thermal compression process is obtained from an ensemble of four solid sorption compressors. Parametric study was conducted with cycle times of 16 and 20 min, heat source temperatures from 73 to 87 degrees C and cooling loads from 3 to 4.9W. Overall system performance is analyzed using two indicators, namely, cooling effectiveness and normalized exergetic efficiency. (C) 2011 Elsevier Ltd. All rights reserved.

Total Factor Productivity Growth and Output Growth in Indian Electronics Industry in the Liberalization Era: An Empirical Examination

This paper analyses the efficiency and productivity growth of Electronics industry, which is considered one of the vibrant and rapidly growing manufacturing industry sub-sectors of India in the liberalization era since 1991. The main objective of the paper is to examine the extent and growth of Total Factor Productivity (TFP) and its components namely, Technical Efficiency Change (TEC) and Technological Progress (TP) and its contribution to total output growth. In this study, the electronics industry is broadly classified into communication equipments, computer hardware, consumer electronics and other electronics, with the purpose of performing a comparative analysis of productivity growth for each of these sub-sectors for the time period 1993-2004. The paper found that the sub-sectors have improved in terms of economies of scale and contribution of capital.The change in technical efficiency and technological progress moved in reverse directions. Three of the four industry witnessed growth in the output primarily due to TFPG and the contribution of input growth to output growth had been negative/negligible, except for Computer hardware where contribution from both input growth and TFPG to output growth were prominent. The paper explored the possible reasons that addressed the issue of low technical efficiency and technological progress in the industry.

Topological analysis of general linear networks

A new method of network analysis, a generalization in several different senses of existing methods and applicable to all networks for which a branch-admittance (or impedance) matrix can be formed, is presented. The treatment of network determinants is very general and essentially four terminal rather than three terminal, and leads to simple expressions based on trees of a simple graph associated with the network and matrix, and involving products of low-order, usually(2 times 2)determinants of tree-branch admittances, in addition to tree-branch products as in existing methods. By comparison with existing methods, the total number of trees and of tree pairs is usually considerably reduced, and this fact, together with an easy method of tree-pair sign determination which is also presented, makes the new method simpler in general. The method can be very easily adapted, by the use of infinite parameters, to accommodate ideal transformers, operational amplifiers, and other forms of network constraint; in fact, is thought to be applicable to all linear networks.

Low threshold voltage ZnO thin film transistor with a Zn0.7Mg0.3O gate dielectric for transparent electronics

A highly transparent all ZnO thin film transistor (ZnO-TFT) with a transmittance of above 80% in the visible part of the spectrum, was fabricated by direct current magnetron sputtering, with a bottom gate configuration. The ZnO-TFT with undoped ZnO channel layers deposited on 300 nm Zn0.7Mg0.3O gate dielectric layers attains an on/off ratio of 104 and mobility of 20 cm2/V s. The capacitance-voltage (C−V) characteristics of the ZnO-TFT exhibited a transition from depletion to accumulation with a small hysteresis indicating the presence of oxide traps. The trap density was also computed from the Levinson’s plot. The use of Zn0.7Mg0.3O as a dielectric layer adds additional dimension to its applications. The room temperature processing of the device depicts the possibility of the use of flexible substrates such as polymer substrates. The results provide the realization of transparent electronics for next-generation optoelectronics.

Thermal Management of Electronics Using PCM-Based Heat Sink Subjected to Cyclic Heat Load

Designing a heat sink based on a phase change material (PCM) under cyclic loading is a critical issue. For cyclic operation, it is required that the fraction of the PCM melting during the heating cycle should completely resolidify during the cooling period, so that that thermal storage unit can be operated for an unlimited number of cycles. Accordingly, studies are carried out to find the parameters influencing the behavior of a PCM under cyclic loading. A number of parameters are identified in the process, the most important ones being the duty cycle and heat transfer coefficient (h) for cooling. The required h or the required cooling period for complete resolidification for infinite cyclic operation of a conventional PCM-based heat sink is found to be very high and unrealistic with air cooling from the surface. To overcome this problem, the conventional design is modified where h and the area exposed to heat transfer can be independently controlled. With this arrangement, the enhanced area provided for cooling keeps h within realistic limits. Analytical investigation is carried out to evaluate the thermal performance of this modified PCM-based heat sink in comparison to those with conventional designs. Experiments are also performed on both the conventional and the modified PCM-based heat sinks to validate the new findings.

Compensator Design for Closed Loop Hall-Effect Current Sensors

Closed loop current sensors used in power electronics applications are expected to have high bandwidth and minimal measurement transients. In this paper, a closed loop compensated Hall-effect current sensor is modeled. The model is used to tune the sensor's compensator. Analytical expression of step response is used to evaluate the performance of the PI compensator in the current sensor. This analysis is used to devise a procedure to design parameters of the PI compensator for fast dynamic response and for small dynamic error. A prototype current sensor is built in the laboratory. Simulations using the model are compared with experimental results to validate the model and to study the variation in performance with compensator parameters. The performance of the designed PI compensator for the sensor is compared with a commercial current sensor. The measured bandwidth of the designed current sensor is above 200 kHz, which is comparable to commercial standards. Implementation issues of PI compensator using operational amplifiers are also addressed.

Origin of 1/f noise in graphene produced for large-scale applications in electronics

The authors report a detailed investigation of the flicker noise (1/f noise) in graphene films obtained from chemical vapour deposition (CVD) and chemical reduction of graphene oxide. The authors find that in the case of polycrystalline graphene films grown by CVD, the grain boundaries and other structural defects are the dominant source of noise by acting as charged trap centres resulting in huge increase in noise as compared with that of exfoliated graphene. A study of the kinetics of defects in hydrazine-reduced graphene oxide (RGO) films as a function of the extent of reduction showed that for longer hydrazine treatment time strong localised crystal defects are introduced in RGO, whereas the RGO with shorter hydrazine treatment showed the presence of large number of mobile defects leading to higher noise amplitude.

Sensing of Stimulus Artifact Suppressed Signals From Electrode Interfaces

Stimulus artifacts inhibit reliable acquisition of biological evoked potentials for several milliseconds if an electrode contact is utilized for both electrical stimulation and recording purposes. This hinders the measurement of evoked short-latency biological responses, which is otherwise elicited by stimulation in implantable prosthetic devices. We present an improved stimulus artifact suppression scheme using two electrode simultaneous stimulation and differential readout using high-gain amplifiers. Substantial reduction of artifact duration has been shown possible through the common-mode rejection property of an instrumentation amplifier for electrode interfaces. The performance of this method depends on good matching of electrode-electrolyte interface properties of the chosen electrode pair. A novel calibration algorithm has been developed that helps in artificial matching of impedance and thereby achieves the required performance in artifact suppression. Stimulus artifact duration has been reduced down to 50 mu s from the stimulation-cum-recording electrodes, which is similar to 6x improvement over the present state of the art. The system is characterized with emulated resistor-capacitor loads and a variety of in-vitro metal electrodes dipped in saline environment. The proposed method is going to be useful for closed-loop electrical stimulation and recording studies, such as bidirectional neural prosthesis of retina, cochlea, brain, and spinal cord.