Accelerating innovation in the social housing sector in UK

The UK government has been promoting innovation in the construction sector to improve the sustainability of the built environment. It has the potential and strength in developing construction research in design and engineering, but the impact of these processes seems to be slow in reaching the residential sector. While funding remains a major constraint research show that a number of detrimental issues including; organisation, risk, mind sets of the stakeholders, planning constraints,reluctance to accept change and the unexploited markets are major contributing factors. Most of these barriers can be overcome with research, development and information and knowledge transfer techniques. Educating all stakeholders can act as an accelerator for innovation. Given the large stock of existing dwellings, the situation is compounded, by issues related to climate change, to the point that this problem can no longer be ignored and requires an urgent response from all sectors involved. This paper attempts to highlight some of the key issues that are important in accelerating innovation in the housing sector. It briefly looks at the process of innovation in housing and presents lessons learnt from two research projects. The drivers and barriers and the role played by the government are examined in relation to the housing context.

Global synchrony of an accelerating risein sea surface temperature

The oceans have shown a recent rapid and accelerating rise in temperature with, given the close link between temperature and marine organisms, pronounced effects on ecosystems. Here we describe for the first time a globally synchronous pattern of pulsed short period (�1 year long) emanations of warm sea surface temperature anomalies from tropical seas towards the poles on the shelf/slope with an intensification of the warming after the 1976/1977, 1986/1987 and 1997/1998 El Nin˜os. On the eastern margins of continents the anomalies propagate towards the poles in part by largely baroclinic boundary currents, reinforced by regional atmospheric warming. The processes contributing to the less continuous warm anomalies on western margins are linked to the transfer of warmth from adjacent western boundary currents. These climate induced events show a close parallelism with the timing of ecosystem changes in shelf seas, important for fisheries and ecosystem services, and melting of sea-ice.

SOCS2 Can Enhance Interleukin-2 (IL-2) and IL-3 Signalling by Accelerating SOCS3 Degradation

Cytokine responses can be regulated by a family of proteins termed suppressors of cytokine signaling (SOCS) which can inhibit the JAK/STAT pathway in a classical negative-feedback manner. While the SOCS are thought to target signaling intermediates for degradation, relatively little is known about how their turnover is regulated. Unlike other SOCS family members, we find that SOCS2 can enhance interleukin-2 (IL-2)- and IL-3-induced STAT phosphorylation following and potentiate proliferation in response to cytokine stimulation. As a clear mechanism for these effects, we demonstrate that expression of SOCS2 results in marked proteasome-dependent reduction of SOCS3 and SOCS1 protein expression. Furthermore, we provide evidence that this degradation is dependent on the presence of an intact SOCS box and that the loss of SOCS3 is enhanced by coexpression of elongin B/C. This suggests that SOCS2 can bind to SOCS3 and elongin B/C to form an E3 ligase complex resulting in the degradation of SOCS3. Therefore, SOCS2 can enhance cytokine responses by accelerating proteasome-dependent turnover of SOCS3, suggesting a mechanism for the gigantism observed in SOCS2 transgenic mice.

Accelerating Multiple Sequence Alignment with the Cell BE Processor

The Cell Broadband Engine (BE) Architecture is a new heterogeneous multi-core architecture targeted at compute-intensive workloads. The architecture of the Cell BE has several features that are unique in high-performance general-purpose processors, most notably the extensive support for vectorization, scratch pad memories and explicit programming of direct memory accesses (DMAs) and mailbox communication. While these features strongly increase programming complexity, it is generally claimed that significant speedups can be obtained by using Cell BE processors. This paper presents our experiences with using the Cell BE architecture to accelerate Clustal W, a bio-informatics program for multiple sequence alignment. We report on how we apply the unique features of the Cell BE to Clustal W and how important each is in obtaining high performance. By making extensive use of vectorization and by parallelizing the application across all cores, we demonstrate a speedup of 24.4 times when using 16 synergistic processor units on a QS21 Cell Blade compared to single-thread execution on the power processing unit. As the Cell BE exploits a large number of slim cores, our highly optimized implementation is just 3.8 times faster than a 3-thread version running on an Intel Core2 Duo, as the latter processor exploits a small number of fat cores.

Accelerating code on multi-cores with FastFlow

FastFlow is a programming framework specifically targeting cache-coherent shared-memory multi-cores. It is implemented as a stack of C++ template libraries built on top of lock-free (and memory fence free) synchronization mechanisms. Its philosophy is to combine programmability with performance. In this paper a new FastFlow programming methodology aimed at supporting parallelization of existing sequential code via offloading onto a dynamically created software accelerator is presented. The new methodology has been validated using a set of simple micro-benchmarks and some real applications. © 2011 Springer-Verlag.

Enabling science through emerging HPC technologies: accelerating numerical quadrature using a GPU

The R-matrix method when applied to the study of intermediate energy electron scattering by the hydrogen atom gives rise to a large number of two electron integrals between numerical basis functions. Each integral is evaluated independently of the others, thereby rendering this a prime candidate for a parallel implementation. In this paper, we present a parallel implementation of this routine which uses a Graphical Processing Unit as a co-processor, giving a speedup of approximately 20 times when compared with a sequential version. We briefly consider properties of this calculation which make a GPU implementation appropriate with a view to identifying other calculations which might similarly benet.

Turbo-smt: Accelerating coupled sparse matrix-tensor factorizations by 200x

How can we correlate the neural activity in the human brain as it responds to typed words, with properties of these terms (like ‘edible’, ‘fits in hand’)? In short, we want to find latent variables, that jointly explain both the brain activity, as well as the behavioral responses. This is one of many settings of the Coupled Matrix-Tensor Factorization (CMTF) problem.

Can we accelerate any CMTF solver, so that it runs within a few minutes instead of tens of hours to a day, while maintaining good accuracy? We introduce Turbo-SMT, a meta-method capable of doing exactly that: it boosts the performance of any CMTF algorithm, by up to 200x, along with an up to 65 fold increase in sparsity, with comparable accuracy to the baseline.

We apply Turbo-SMT to BrainQ, a dataset consisting of a (nouns, brain voxels, human subjects) tensor and a (nouns, properties) matrix, with coupling along the nouns dimension. Turbo-SMT is able to find meaningful latent variables, as well as to predict brain activity with competitive accuracy.

Accelerating integer-based fully homomorphic encryption using Comba multiplication

Fully Homomorphic Encryption (FHE) is a recently developed cryptographic technique which allows computations on encrypted data. There are many interesting applications for this encryption method, especially within cloud computing. However, the computational complexity is such that it is not yet practical for real-time applications. This work proposes optimised hardware architectures of the encryption step of an integer-based FHE scheme with the aim of improving its practicality. A low-area design and a high-speed parallel design are proposed and implemented on a Xilinx Virtex-7 FPGA, targeting the available DSP slices, which offer high-speed multiplication and accumulation. Both use the Comba multiplication scheduling method to manage the large multiplications required with uneven sized multiplicands and to minimise the number of read and write operations to RAM. Results show that speed up factors of 3.6 and 10.4 can be achieved for the encryption step with medium-sized security parameters for the low-area and parallel designs respectively, compared to the benchmark software implementation on an Intel Core2 Duo E8400 platform running at 3 GHz.

Optimised Multiplication Architectures for Accelerating Fully Homomorphic Encryption

Large integer multiplication is a major performance bottleneck in fully homomorphic encryption (FHE) schemes over the integers. In this paper two optimised multiplier architectures for large integer multiplication are proposed. The first of these is a low-latency hardware architecture of an integer-FFT multiplier. Secondly, the use of low Hamming weight (LHW) parameters is applied to create a novel hardware architecture for large integer multiplication in integer-based FHE schemes. The proposed architectures are implemented, verified and compared on the Xilinx Virtex-7 FPGA platform. Finally, the proposed implementations are employed to evaluate the large multiplication in the encryption step of FHE over the integers. The analysis shows a speed improvement factor of up to 26.2 for the low-latency design compared to the corresponding original integer-based FHE software implementation. When the proposed LHW architecture is combined with the low-latency integer-FFT accelerator to evaluate a single FHE encryption operation, the performance results show that a speed improvement by a factor of approximately 130 is possible.

Accelerating Large Scale Centroid-based Clustering with Locality Sensitive Hashing

Most traditional data mining algorithms struggle to cope with the sheer scale of data efficiently. In this paper, we propose a general framework to accelerate existing clustering algorithms to cluster large-scale datasets which contain large numbers of attributes, items, and clusters. Our framework makes use of locality sensitive hashing (LSH) to significantly reduce the cluster search space. We also theoretically prove that our framework has a guaranteed error bound in terms of the clustering quality. This framework can be applied to a set of centroid-based clustering algorithms that assign an object to the most similar cluster, and we adopt the popular K-Modes categorical clustering algorithm to present how the framework can be applied. We validated our framework with five synthetic datasets and a real world Yahoo! Answers dataset. The experimental results demonstrate that our framework is able to speed up the existing clustering algorithm between factors of 2 and 6, while maintaining comparable cluster purity.