OPSM - Opportunistic Power Save mode for Infrastructure IEEE 802.11 WLAN

We focus on the energy spent in radio communication by the stations (STAs) in an IEEE 802.11 infrastructure WLAN. All the STAs are engaged in web browsing, which is characterized by a short file downloads over TCP, with short duration of inactivity or think time in between two file downloads. Under this traffic, Static PSM (SPSM) performs better than CAM, since the STAs in SPSM can switch to low power state (sleep) during think times while in CAM they have to be in the active state all the time. In spite of this gain, performance of SPSM degrades due to congestion, as the number of STAs associated with the access point (AP) increases. To address this problem, we propose an algorithm, which we call opportunistic PSM (OPSM). We show through simulations that OPSM performs better than SPSM under the aforementioned TCP traffic. The performance gain achieved by OPSM over SPSM increases as the mean file size requested by the STAs or the number of STAs associated with the AP increases. We implemented OPSM in NS-2.33, and to compare the performance of OPSM and SPSM, we evaluate the number of file downloads that can be completed with a given battery capacity and the average time taken to download a file.

Throughput performance of distributed applications in switched networks in presence of end-system bottlenecks

The steady state throughput performance of distributed applications deployed in switched networks in presence of end-system bottlenecks is studied in this paper. The effect of various limitations at an end-system is modelled as an equivalent transmission capacity limitation. A class of distributed applications is characterised by a static traffic distribution matrix that determines the communication between various components of the application. It is found that uniqueness of steady state throughputs depends only on the traffic distribution matrix and that some applications (e.g., broadcast applications) can yield non-unique values for the steady state component throughputs. For a given switch capacity, with traffic distribution that yield fair unique throughputs, the trade-off between the end-system capacity and the number of application components is brought out. With a proposed distributed rate control, it has been illustrated that it is possible to have unique solution for certain traffic distributions which is otherwise impossible. Also, by proper selection of rate control parameters, various throughput performance objectives can be realised.

Application of an evolutionary fuzzy system for the estimation of workforce deployment and cross-training in an assembly environment

Owing to the increased customer demands for make-to-order products and smaller product life-cycles, today assembly lines are designed to ensure a quick switch-over from one product model to another for companies' survival in market place. The complexity associated with the decisions pertaining to the type of training and number of workers and their exposition to the different tasks especially in the current era of customized production is a serious problem that the managers and the HRD gurus are facing in industry. This paper aims to determine the amount of cross-training and dynamic deployment policy caused by workforce flexibility for a make-to-order assembly. The aforementioned issues have been dealt with by adopting the concept of evolutionary fuzzy system because of the linguistic nature of the attributes associated with product variety and task complexity. A fuzzy system-based methodology is proposed to determine the amount of cross-training and dynamic deployment policy. The proposed methodology is tested on 10 sample products of varying complexities and the results obtained are in line with the conclusions drawn by previous researchers.

Hyper-activation of the TCP4 transcription factor in Arabidopsis thaliana accelerates multiple aspects of plant maturation

Plant organs are initiated as primordial outgrowths, and require controlled cell division and differentiation to achieve their final size and shape. Superimposed on this is another developmental program that orchestrates the switch from vegetative to reproductive to senescence stages in the life cycle. These require sequential function of heterochronic regulators. Little is known regarding the coordination between organ and organismal growth in plants. The TCP gene family encodes transcription factors that control diverse developmental traits, and a subgroup of class II TCP genes regulate leaf morphogenesis. Absence of these genes results in large, crinkly leaves due to excess division, mainly at margins. It has been suggested that these class II TCPs modulate the spatio-temporal control of differentiation in a growing leaf, rather than regulating cell proliferation per se. However, the link between class II TCP action and cell growth has not been established. As loss-of-function mutants of individual TCP genes in Arabidopsis are not very informative due to gene redundancy, we generated a transgenic line that expressed a hyper-activated form of TCP4 in its endogenous expression domain. This resulted in premature onset of maturation and decreased cell proliferation, leading to much smaller leaves, with cup-shaped lamina in extreme cases. Further, the transgenic line initiated leaves faster than wild-type and underwent precocious reproductive maturation due to a shortened adult vegetative phase. Early senescence and severe fertility defects were also observed. Thus, hyper-activation of TCP4 revealed its role in determining the timing of crucial developmental events, both at the organ and organism level.

A Seven-Level Inverter Topology for Induction Motor Drive Using Two-Level Inverters and Floating Capacitor Fed H-Bridges

A multilevel inverter topology for seven-level space vector generation is proposed in this paper. In this topology, the seven-level structure is realized using two conventional two-level inverters and six capacitor-fed H-bridge cells. It needs only two isolated dc-voltage sources of voltage rating V(dc)/2 where V(dc) is the dc voltage magnitude required by the conventional neutral point clamped (NPC) seven-level topology. The proposed topology is capable of maintaining the H-bridge capacitor voltages at the required level of V(dc)/6 under all operating conditions, covering the entire linear modulation and overmodulation regions, by making use of the switching state redundancies. In the event of any switch failure in H-bridges, this inverter can operate in three-level mode, a feature that enhances the reliability of the drive system. The two-level inverters, which operate at a higher voltage level of V(dc)/2, switch less compared to the H-bridges, which operate at a lower voltage level of V(dc)/6, resulting in switching loss reduction. The experimental verification of the proposed topology is carried out for the entire modulation range, under steady state as well as transient conditions.

A New Family of Soft Transition Converters: Design Example and Dynamic Model

The soft switching converters evolved through the resonant load, resonant switch, resonant transition and active clamp converters to eliminate switching losses in power converters. This paper briefly presents the operating principle of the new family of soft transition converters; the methodology of design of these converters is presented through an example. In the proposed family of converters, the switching transitions of both the main switch and auxiliary switch are lossless.When these converters are analysed in terms of the pole current and throw voltage, the defining equations of all converters belonging to this family become identical.Such a description allows one to define simple circuit oriented model for these converters. These circuit models help in evaluating the steady state and dynamic model of these converters. The standard dynamic performance functions of the converters are readily obtainable from this model. This paper presents these dynamic models and verifies the same through measurements on a prototype converter.

Compiler-Directed Dynamic Voltage Scaling using Program Phases

Energy consumption has become a major constraint in providing increased functionality for devices with small form factors. Dynamic voltage and frequency scaling has been identified as an effective approach for reducing the energy consumption of embedded systems. Earlier works on dynamic voltage scaling focused mainly on performing voltage scaling when the CPU is waiting for memory subsystem or concentrated chiefly on loop nests and/or subroutine calls having sufficient number of dynamic instructions. This paper concentrates on coarser program regions and for the first time uses program phase behavior for performing dynamic voltage scaling. Program phases are annotated at compile time with mode switch instructions. Further, we relate the Dynamic Voltage Scaling Problem to the Multiple Choice Knapsack Problem, and use well known heuristics to solve it efficiently. Also, we develop a simple integer linear program formulation for this problem. Experimental evaluation on a set of media applications reveal that our heuristic method obtains a 38% reduction in energy consumption on an average, with a performance degradation of 1% and upto 45% reduction in energy with a performance degradation of 5%. Further, the energy consumed by the heuristic solution is within 1% of the optimal solution obtained from the ILP approach.

A new family of soft transition converters: Design and dynamic model

The soft switching converters evolved through the resonant load, resonant switch, resonant transition and active clamp converters to eliminate switching losses in power converters. This paper briefly presents the operating principle of the new family of soft transition converters; the methodology of design of these converters is presented through an example. In the proposed family of converters, the switching transitions of both the main switch and auxiliary switch are lossless. When these converters are analysed in terms of the pole current and throw voltage, the defining equations of all converters belonging to this family become identical.Such a description allows one to define simple circuit oriented model for these converters. These circuit models help in evaluating the steady state and dynamic model of these converters. The standard dynamic performance functions of the converters are readily obtainable from this model. This paper presents these dynamic models and verifies the same through measurements on a prototype converter.

Training-Symbol Embedded, High-Rate, Single-Symbol ML-Decodable, Distributed STBCs for Relay Networks

Distributed space-time block codes (DSTBCs) from complex orthogonal designs (CODs) (both square and nonsquare), coordinate interleaved orthogonal designs (CIODs), and Clifford unitary weight designs (CUWDs) are known to lose their single-symbol ML decodable (SSD) property when used in two-hop wireless relay networks using amplify and forward protocol. For such networks, in this paper, three new classes of high rate, training-symbol embedded (TSE) SSD DSTBCs are constructed: TSE-CODs, TSE-CIODs, and TSE-CUWDs. The proposed codes include the training symbols inside the structure of the code which is shown to be the key point to obtain the SSD property along with the channel estimation capability. TSE-CODs are shown to offer full-diversity for arbitrary complex constellations and the constellations for which TSE-CIODs and TSE-CUWDs offer full-diversity are characterized. It is shown that DSTBCs from nonsquare TSE-CODs provide better rates (in symbols per channel use) when compared to the known SSD DSTBCs for relay networks. Important from the practical point of view, the proposed DSTBCs do not contain any zeros in their codewords and as a result, antennas of the relay nodes do not undergo a sequence of switch on/off transitions within every codeword, and, thus, avoid the antenna switching problem.

The phenomenon of notch in an NEMP simulator and its reduction

The effect of variation in the switching instant of the output switch of the pulser circuit used in energizing an NEMP simulator on the voltage fed to the simulator and hence the electric field within the working volume of the simulator has been studied. Depending upon the instant at which the output switch closes, the amplitude and the wave shape of the voltage that is fed to the illuminator varies. This wave shape of the output voltage from the pulser circuit determines the shape and characteristics of the electric field within the working volume of the simulator. To study the effect of variation in the switching instant on the vertical electric field within the working volume, the vertical electric field has been computed in time and frequency domains. For certain switching instants, the electric field shows a sharp reduction in its amplitude after the peak which is called the notch. The presence of notch results in the test object not getting illuminated with all the frequencies of interest. The notch has been successfully reduced by suitably modifying the pulser circuit.

UV Photodetectors Based on ZnO Nanorods: Role of Defect-Concentration

UV photodetectors based on ZnO nanorods prepared by two methods have been fabricated by a simple drop casting procedure. The detectors show good performance at 375 nm giving satisfactory values of responsivity, external quantum efficiency and photoconductive gain. The performance of ZnO nanorods prepared at low temperatures, containing a larger concentration of defects, is found to be superior. (C) 2011 The Japan Society of Applied Physics

A hybrid nine-level inverter for IM drive

This paper proposes a new hybrid nine-level inverter topology for IM drive. The nine-level structure is realized by using two three-phase two-level inverters fed by isolated DC voltage sources and six H-bridges fed by capacitors. The number of switches required in this topology is only 36 where as the conventional nine-level topologies require 48 switches. The voltages across the capacitors, feeding the H-bridges that operate at asymmetric voltages, are effectively balanced by making use of the switching state redundancies. In this topology, the requirement of DC link voltage is only half of the maximum magnitude of the voltage space vector. As the two-level inverters are powered by isolated voltage sources, the circulation of triplen harmonic current in the motor winding is prevented. The proposed drive system is capable of functioning in three-level mode in case of any switch failure in H-bridges. The performance of the proposed topology in the entire modulation range is verified by simulation study and experiment.

High voltage DC power supply topology for pulsed load applications with converter switching synchronized to load pulses

High voltage power supplies for radar applications are investigated, which are subjected to pulsed load (125 kHz and 10% duty cycle) with stringent specifications (<0.01% regulation, efficiency>85%, droop<0.5 V/micro-sec.). As good regulation and stable operation requires the converter to be switched at much higher frequency than the pulse load frequency, transformer poses serious problems of insulation failure and higher losses. This paper proposes a methodology to tackle the problems associated with this type of application. Synchronization of converter switching with load pulses enables the converter to switch at half the load switching frequency. Low switching frequency helps in ensuring safety of HV transformer insulation and reduction of losses due to skin and proximity effect. Phase-modulated series resonant converter with ZVS is used as the power converter.

A Novel VSI- and CSI-Fed Active-Reactive Induction Motor Drive with Sinusoidal Voltages and Currents

Till date load-commutated inverter (LCI)-fed synchronous motor drive configuration is popular in high power applications (>10 MW). The leading power factor operation of synchronous motor by excitation control offers this simple and rugged drive structure. On the contrary, LCI-fed induction motor drive is absent as it always draws lagging power factor current. Therefore, complicated commutation circuit is required to switch off thyristors for a current source inverter (CSI)-driven induction motor. It poses the major hindrance to scale up the power rating of CSI-fed induction motor drive. Anew power topology for LCI-fed induction motor drive for medium-voltage drive application is proposed. A new induction machine (active-reactive induction machine) with two sets of three-phase winding is introduced as a drive motor. The proposed power configuration ensures sinusoidal voltage and current at the motor terminals. The total drive power is shared among a thyristor-based LCI, an insulated gate bipolar transistor (IGBT)-based two-level voltage source inverter (VSI), and a three-level VSI. The benefits of SCRs and IGBTs are explored in the proposed drive. Experimental results from a prototype drive verify the basic concepts of the drive.

Switching Transients in Single-Phase Induction Motors

The subject of transients in polyphase induction motors and synchronous machines has been studied in very great detail by several investigators, but no published literature exists dealing exclusively with the analysis of the problem of transients in single-phase induction motors. This particular problem has been studied in this paper by applying the Laplace transform. The results of actual computation of the currents and developed electrical torque are compared with the data obtained by setting up the integro-differential equations of the machine on an electronic differential analyzer. It is shown that if the motor is switched on to the supply when the potential passes through its zero value, there is a pulsating fundamental frequency torque superimposed on the average steady-state unidirectional torque. If, on the other hand, the switch is closed when the applied potential passes through its maximum value, the developed electrical torque settles down to its final steady-state value during the first cycle of the supply voltage.