A Scalable High Throughput Firewall in FPGA

High end network security applications demand high speed operation and large rule set support. Packet classification is the core functionality that demands high throughput in such applications. This paper proposes a packet classification architecture to meet such high throughput. We have Implemented a Firewall with this architecture in reconfigurable hardware. We propose an extension to Distributed Crossproducting of Field Labels (DCFL) technique to achieve scalable and high performance architecture. The implemented Firewall takes advantage of inherent structure and redundancy of rule set by using, our DCFL Extended (DCFLE) algorithm. The use of DCFLE algorithm results In both speed and area Improvement when It is Implemented in hardware. Although we restrict ourselves to standard 5-tuple matching, the architecture supports additional fields.High throughput classification Invariably uses Ternary Content Addressable Memory (TCAM) for prefix matching, though TCAM fares poorly In terms of area and power efficiency. Use of TCAM for port range matching is expensive, as the range to prefix conversion results in large number of prefixes leading to storage inefficiency. Extended TCAM (ETCAM) is fast and the most storage efficient solution for range matching. We present for the first time a reconfigurable hardware Implementation of ETCAM. We have implemented our Firewall as an embedded system on Virtex-II Pro FPGA based platform, running Linux with the packet classification in hardware. The Firewall was tested in real time with 1 Gbps Ethernet link and 128 sample rules. The packet classification hardware uses a quarter of logic resources and slightly over one third of memory resources of XC2VP30 FPGA. It achieves a maximum classification throughput of 50 million packet/s corresponding to 16 Gbps link rate for file worst case packet size. The Firewall rule update Involves only memory re-initialiization in software without any hardware change.

Architecture Optimization of Aerospace Computing Systems

Simultaneous consideration of both performance and reliability issues is important in the choice of computer architectures for real-time aerospace applications. One of the requirements for such a fault-tolerant computer system is the characteristic of graceful degradation. A shared and replicated resources computing system represents such an architecture. In this paper, a combinatorial model is used for the evaluation of the instruction execution rate of a degradable, replicated resources computing system such as a modular multiprocessor system. Next, a method is presented to evaluate the computation reliability of such a system utilizing a reliability graph model and the instruction execution rate. Finally, this computation reliability measure, which simultaneously describes both performance and reliability, is applied as a constraint in an architecture optimization model for such computing systems. Index Terms-Architecture optimization, computation

The Influence of Constantinople on Middle Byzantine Architecture (843-1204) : A typological and morphological approach at the provincial level.

The influence of the architecture of the Byzantine capital spread to the Mediterranean provinces with travelling masters and architects. In this study the architecture of the Constantinopolitan School has been detected on the basis of the typology of churches, completed by certain morphological aspects when necessary. The impact of the Constantinopolitan workshops appears to have been more important than previously realized. This research revealed that the Constantinopolitan composite domed inscribed-cross type or cross-in-square spread everywhere to the Balkans and it was assumed soon by the local schools of architecture. In addition, two novel variants were invented on the basis of this model: the semi-composite type and the so-called Athonite type. In the latter variant lateral conches, choroi, were added for liturgical reasons. Instead, the origin of the domed ambulatory church was partly provincial. One result of this study is that the origin of the Middle Byzantine domed octagonal types was traced to Constantinople. This is attested on the basis of the archaeological evidence. Also some other architectural elements that have not been preserved in the destroyed capital have survived at the provincial level: the domed hexagonal type, the multi-domed superstructure, the pseudo-octagon and the narthex known as the lite. The Constantinopolitan architecture during the period in question was based on the Early Christian and Late Antique forms, practices and innovations and this also emerges at the provincial level.

Cholesterol Disturbances in Inherited Neurodegenerative Diseases : Studies on Npc1, Ppt1 and Ctsd deficient mice

The central nervous system (CNS) is the most cholesterol-rich organ in the body. Cholesterol is essential to CNS functions such as synaptogenesis and formation of myelin. Significant differences exist in cholesterol metabolism between the CNS and the peripheral organs. However, the regulation of cholesterol metabolism in the CNS is poorly understood compared to our knowledge of the regulation of cholesterol homeostasis in organs reached by cholesterol-carrying lipoprotein particles in the circulation. Defects in CNS cholesterol homeostasis have been linked to a variety of neurodegenerative diseases, including common diseases with complex pathogenetic mechanisms such as Alzheimer s disease. In spite of intense effort, the mechanisms which link disturbed cholesterol homeostasis to these diseases remain elusive. We used three inherited recessive neurodegenerative disorders as models in the studies included in this thesis: Niemann-Pick type C (NPC), infantile neuronal ceroid lipofuscinosis and cathepsin D deficiency. Of these three, NPC has previously been linked to disturbed intracellular cholesterol metabolism. Elucidating the mechanisms with which disturbances of cholesterol homeostasis link to neurodegeneration in recessive inherited disorders with known genetic lesions should shed light on how cholesterol is handled in the healthy CNS and help to understand how these and more complex diseases develop. In the first study we analyzed the synthesis of sterols and the assembly and secretion of lipoprotein particles in Npc1 deficient primary astrocytes. We found that both wild type and Npc1 deficient astrocytes retain significant amounts of desmosterol and other cholesterol precursor sterols as membrane constituents. No difference was observed in the synthesis of sterols and the secretion of newly synthesized sterols between Npc1 wild type, heterozygote or knockout astrocytes. We found that the incorporation of newly synthesized sterols into secreted lipoprotein particles was not inhibited by Npc1 mutation, and the lipoprotein particles were similar to those excreted by wild type astrocytes in shape and size. The bulk of cholesterol was found to be secreted independently of secreted NPC2. These observations demonstrate the ability of Npc1 deficient astrocytes to handle de novo sterols, and highlight the unique sterol composition in the developing brain. Infantile neuronal ceroid lipofuscinosis is caused by the deficiency of a functional Ppt1 enzyme in the cells. In the second study, global gene expression studies of approximately 14000 mouse genes showed significant changes in the expression of 135 genes in Ppt1 deficient neurons compared to wild type. Several genes encoding for enzymes of the mevalonate pathway of cholesterol biosynthesis showed increased expression. As predicted by the expression data, sterol biosynthesis was found to be upregulated in the knockout neurons. These data link Ppt1 deficiency to disturbed cholesterol metabolism in CNS neurons. In the third study we investigated the effect of cathepsin D deficiency on the structure of myelin and lipid homeostasis in the brain. Our proteomics data, immunohistochemistry and western blotting data showed altered levels of the myelin protein components myelin basic protein, proteolipid protein and 2 , 3 -cyclic nucleotide 3 phosphodiesterase in the brains of cathepsin D deficient mice. Electron microscopy revealed altered myelin structure in cathepsin D deficient brains. Additionally, plasmalogen-derived alkenyl chains and 20- and 24-carbon saturated and monounsaturated fatty acids typical for glycosphingolipids were found to be significantly reduced, but polyunsaturated species were significantly increased in the knockout brains, pointing to a decrease in white matter. The levels of ApoE and ABCA1 proteins linked to cholesterol efflux in the CNS were found to be altered in the brains of cathepsin D deficient mice, along with an accumulation of cholesteryl esters and a decrease in triglycerols. Together these data demonstrate altered myelin architecture in cathepsin D deficient mice and link cathepsin D deficiency to aberrant cholesterol metabolism and trafficking. Basic research into rare monogenic diseases sheds light on the underlying biological processes which are perturbed in these conditions and contributes to our understanding of the physiological function of healthy cells. Eventually, understanding gained from the study of disease models may contribute towards establishing treatment for these disorders and further our understanding of the pathogenesis of other, more complex and common diseases.

Parallel polygon scan conversion algorithms: Performance evaluation on a shared bus architecture

In this paper, three parallel polygon scan conversion algorithms have been proposed, and their performance when executed on a shared bus architecture has been compared. It has been shown that the parallel algorithm that does not use edge coherence performs better than those that use edge coherence. Further, a multiprocessing architecture has been proposed to execute the parallel polygon scan conversion algorithms more efficiently than a single shared bus architecture.

Improvement of mango tree architecture

This paper discusses the role of mango canopy architecture in mango productivity and orchard management and considers potential increases on production of high density orchards through improved canopy architecture. Lower tree height, reduced vigour and smaller more open canopies are recognised as important aspects of high density orchards. However, vigour management, light relations, flowering and crop load of high density orchards needs to be better understood if we are to developed sustainable highly productive canopy training and pruning systems that are easy to maintain at high planting densities.

Reconfigurable Viterbi decoder on mesh connected multiprocessor architecture

In modern wireline and wireless communication systems, Viterbi decoder is one of the most compute intensive and essential elements. Each standard requires a different configuration of Viterbi decoder. Hence there is a need to design a flexible reconfigurable Viterbi decoder to support different configurations on a single platform. In this paper we present a reconfigurable Viterbi decoder which can be reconfigured for standards such as WCDMA, CDMA2000, IEEE 802.11, DAB, DVB, and GSM. Different parameters like code rate, constraint length, polynomials and truncation length can be configured to map any of the above mentioned standards. Our design provides higher throughput and scalable power consumption in various configuration of the reconfigurable Viterbi decoder. The power and throughput can also be optimized for different standards.

Diverse bodies-space politics: Towards a critique of social (in)justice of built environment

Writing has long played an important role in the progression of architecture and the built environment. Histories of architecture are written, manifestoes that form the basis for a designer’s work are written and most importantly, the built environment advances itself through the act of critical writing. Not unlike the visual arts, literature and poetry, the tradition of written criticism has been crucial to the progression of architecture and its allied professions (Franz 2003). This article contributes to architecture and the built environment through the act of a written essay that critiques the problem of bodily diversity to architecture. In particular, the article explores the implications of body-space politics and abstracted body thinking on diverse bodies and their spatial justice. Using Soja’s Spatial Justice theory (2008), we seek to point out the underlying conceptions and power differentials assigned to different bodies spatially and how this leads to spatial injustices and contested spaces. The article also critically analyses the historical emergence of ‘the standardised body’ in architecture and its application in design theory and practice , and looks at how bodies often found on the outside of architecture highlight how such thinking creates in justices. Different theories are drawn on to help point to how design through the use of the upright, forward facing, male bod willingly and unwillingly denies access to resources and spatialities of everyday life. We also suggest ways to re-conceptualise the body in design practice and teaching.

Parallel circuit partitioning on a reduced array architecture

The physical design of a VLSI circuit involves circuit partitioning as a subtask. Typically, it is necessary to partition a large electrical circuit into several smaller circuits such that the total cross-wiring is minimized. This problem is a variant of the more general graph partitioning problem, and it is known that there does not exist a polynomial time algorithm to obtain an optimal partition. The heuristic procedure proposed by Kernighan and Lin1,2 requires O(n2 log2n) time to obtain a near-optimal two-way partition of a circuit with n modules. In the VLSI context, due to the large problem size involved, this computational requirement is unacceptably high. This paper is concerned with the hardware acceleration of the Kernighan-Lin procedure on an SIMD architecture. The proposed parallel partitioning algorithm requires O(n) processors, and has a time complexity of O(n log2n). In the proposed scheme, the reduced array architecture is employed with due considerations towards cost effectiveness and VLSI realizability of the architecture.The authors are not aware of any earlier attempts to parallelize a circuit partitioning algorithm in general or the Kernighan-Lin algorithm in particular. The use of the reduced array architecture is novel and opens up the possibilities of using this computing structure for several other applications in electronic design automation.

Parallel min-cut placement on reduced hardware SIMD architecture.

Massively parallel SIMD computing is applied to obtain an order of magnitude improvement in the executional speed of an important algorithm in VLSI design automation. The physical design of a VLSI circuit involves logic module placement as a subtask. The paper is concerned with accelerating the well known Min-cut placement technique for logic cell placement. The inherent parallelism of the Min-cut algorithm is identified, and it is shown that a parallel machine based on the efficient execution of the placement procedure.

A fault-tolerant multi-transputer architecture

A new fault-tolerant multi-transputer architecture capable of tolerating failure of any one component in the system is described. In the proposed architecture the processing nodes are automatically reconfigured in the event of a fault and the computations continue from the stage where the fault occurred. The process of reconfiguration is transparent to the user, and the identity of the failed component is communicated to the user along with the results of computations. Parallel solution of a typical engineering problem involving solution of Laplace's equation by the boundary element method has been implemented. The performance of the architecture in the event of faults has been investigated.

Diacetylenic lipid tubules:experimental evidence for a chiral molecular architecture

Molecular self-assembly is of key importance for the rational design of advanced materials. To investigate the causal relation between molecular structure and the consequent self-assembled microstructure, self-assembled tubules of diacetylenic lipids were studied. Circular-dichroism studies give experimental evidence that the formation of tubules is driven by chiral molecular packing, in agreement with recent theories of tubules. On the basis of these results, a molecular mechanism for the formation of tubules is proposed.

Role of organic fluorine in crystal engineering

The design of compounds with novel and improved physico-chemical properties as advanced functional materials with a specific application spectrum requires the knowledge about possible supramolecular packing motifs and their experimental control in crystalline lattice. Besides the structure of the individual molecule, non-covalent interactions play a significant role in the determination of molecular conformation, along with the formation of three-dimensional supramolecular architecture in a crystal as a requirement for molecular recognition processes, and the related bioactivity. Involvement of functional groups will contribute to the formation of a predefined packing motif due to their well-defined interactions. The strength and directionality of these interactions create characteristic packing motifs, which can be used for the design of supramolecular arrangements by the development of appropriate strategies for the precise control of their topology. Most relevant of these non-covalent interactions are stacking interactions and hydrogen bonds, which have been subjects of extensive study in the last two decades. In recent literature, substantial efforts have been put in by various researchers towards the understanding of interactions involving organic fluorine and the role they play in generating different packing motifs which guides assembling of molecules in the crystal lattice.

Hierarchical Directory-Based Shared Memory Architecture

We describe the design of a directory-based shared memory architecture on a hierarchical network of hypercubes. The distributed directory scheme comprises two separate hierarchical networks for handling cache requests and transfers. Further, the scheme assumes a single address space and each processing element views the entire network as contiguous memory space. The size of individual directories stored at each node of the network remains constant throughout the network. Although the size of the directory increases with the network size, the architecture is scalable. The results of the analytical studies demonstrate superior performance characteristics of our scheme compared with those of other schemes.