Análise e síntese de um processador digital wavelet

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Biofilm responses to salmon carcass analog addition in central Idaho streams

Pacific salmon populations have declined due to human activity in the Pacific Northwest, resulting in decreased delivery of marine-derived nutrients to streams. Managers use artificial nutrient additions to increase juvenile salmon growth and survival and assume that added nutrients stimulate biofilm production, which propagates up the food web to juvenile salmon. We assessed biofilm responses (standing crop, nutrient limitation, and metabolism) to experimental additions of salmon carcass analog in tributaries of the Salmon River, Idaho in 2010 and 2011. Biofilm standing crop and nutrient limitation did not respond to analog, but primary productivity and respiration increased in the subset of streams where they were measured. Discrepancies between biofilm productivity and standing crop may occur if standing crop is constrained by physical and biological factors. Thus, conclusions about biofilm response to analog should not be based on standing crop alone and mitigation research may benefit from nutrient budgets of entire watersheds.

A methodology to analyze, design and implement very fast and robust controls of Buck-type converters

La electrónica digital moderna presenta un desafío a los diseñadores de sistemas de potencia. El creciente alto rendimiento de microprocesadores, FPGAs y ASICs necesitan sistemas de alimentación que cumplan con requirimientos dinámicos y estáticos muy estrictos. Específicamente, estas alimentaciones son convertidores DC-DC de baja tensión y alta corriente que necesitan ser diseñados para tener un pequeño rizado de tensión y una pequeña desviación de tensión de salida bajo transitorios de carga de una alta pendiente. Además, dependiendo de la aplicación, se necesita cumplir con otros requerimientos tal y como proveer a la carga con ”Escalado dinámico de tensión”, donde el convertidor necesitar cambiar su tensión de salida tan rápidamente posible sin sobreoscilaciones, o ”Posicionado Adaptativo de la Tensión” donde la tensión de salida se reduce ligeramente cuanto más grande sea la potencia de salida. Por supuesto, desde el punto de vista de la industria, las figuras de mérito de estos convertidores son el coste, la eficiencia y el tamaño/peso. Idealmente, la industria necesita un convertidor que es más barato, más eficiente, más pequeño y que aún así cumpla con los requerimienos dinámicos de la aplicación. En este contexto, varios enfoques para mejorar la figuras de mérito de estos convertidores se han seguido por la industria y la academia tales como mejorar la topología del convertidor, mejorar la tecnología de semiconducores y mejorar el control. En efecto, el control es una parte fundamental en estas aplicaciones ya que un control muy rápido hace que sea más fácil que una determinada topología cumpla con los estrictos requerimientos dinámicos y, consecuentemente, le da al diseñador un margen de libertar más amplio para mejorar el coste, la eficiencia y/o el tamaño del sistema de potencia. En esta tesis, se investiga cómo diseñar e implementar controles muy rápidos para el convertidor tipo Buck. En esta tesis se demuestra que medir la tensión de salida es todo lo que se necesita para lograr una respuesta casi óptima y se propone una guía de diseño unificada para controles que sólo miden la tensión de salida Luego, para asegurar robustez en controles muy rápidos, se proponen un modelado y un análisis de estabilidad muy precisos de convertidores DC-DC que tienen en cuenta circuitería para sensado y elementos parásitos críticos. También, usando este modelado, se propone una algoritmo de optimización que tiene en cuenta las tolerancias de los componentes y sensados distorsionados. Us ando este algoritmo, se comparan controles muy rápidos del estado del arte y su capacidad para lograr una rápida respuesta dinámica se posiciona según el condensador de salida utilizado. Además, se propone una técnica para mejorar la respuesta dinámica de los controladores. Todas las propuestas se han corroborado por extensas simulaciones y prototipos experimentales. Con todo, esta tesis sirve como una metodología para ingenieros para diseñar e implementar controles rápidos y robustos de convertidores tipo Buck. ABSTRACT Modern digital electronics present a challenge to designers of power systems. The increasingly high-performance of microprocessors, FPGAs (Field Programmable Gate Array) and ASICs (Application-Specific Integrated Circuit) require power supplies to comply with very demanding static and dynamic requirements. Specifically, these power supplies are low-voltage/high-current DC-DC converters that need to be designed to exhibit low voltage ripple and low voltage deviation under high slew-rate load transients. Additionally, depending on the application, other requirements need to be met such as to provide to the load ”Dynamic Voltage Scaling” (DVS), where the converter needs to change the output voltage as fast as possible without underdamping, or ”Adaptive Voltage Positioning” (AVP) where the output voltage is slightly reduced the greater the output power. Of course, from the point of view of the industry, the figures of merit of these converters are the cost, efficiency and size/weight. Ideally, the industry needs a converter that is cheaper, more efficient, smaller and that can still meet the dynamic requirements of the application. In this context, several approaches to improve the figures of merit of these power supplies are followed in the industry and academia such as improving the topology of the converter, improving the semiconductor technology and improving the control. Indeed, the control is a fundamental part in these applications as a very fast control makes it easier for the topology to comply with the strict dynamic requirements and, consequently, gives the designer a larger margin of freedom to improve the cost, efficiency and/or size of the power supply. In this thesis, how to design and implement very fast controls for the Buck converter is investigated. This thesis proves that sensing the output voltage is all that is needed to achieve an almost time-optimal response and a unified design guideline for controls that only sense the output voltage is proposed. Then, in order to assure robustness in very fast controls, a very accurate modeling and stability analysis of DC-DC converters is proposed that takes into account sensing networks and critical parasitic elements. Also, using this modeling approach, an optimization algorithm that takes into account tolerances of components and distorted measurements is proposed. With the use of the algorithm, very fast analog controls of the state-of-the-art are compared and their capabilities to achieve a fast dynamic response are positioned de pending on the output capacitor. Additionally, a technique to improve the dynamic response of controllers is also proposed. All the proposals are corroborated by extensive simulations and experimental prototypes. Overall, this thesis serves as a methodology for engineers to design and implement fast and robust controls for Buck-type converters.

Phase noise and spur reduction in an array of direct digital synthesizers

Many applications, including communications, test and measurement, and radar, require the generation of signals with a high degree of spectral purity. One method for producing tunable, low-noise source signals is to combine the outputs of multiple direct digital synthesizers (DDSs) arranged in a parallel configuration. In such an approach, if all noise is uncorrelated across channels, the noise will decrease relative to the combined signal power, resulting in a reduction of sideband noise and an increase in SNR. However, in any real array, the broadband noise and spurious components will be correlated to some degree, limiting the gains achieved by parallelization. This thesis examines the potential performance benefits that may arise from using an array of DDSs, with a focus on several types of common DDS errors, including phase noise, phase truncation spurs, quantization noise spurs, and quantizer nonlinearity spurs. Measurements to determine the level of correlation among DDS channels were made on a custom 14-channel DDS testbed. The investigation of the phase noise of a DDS array indicates that the contribution to the phase noise from the DACs can be decreased to a desired level by using a large enough number of channels. In such a system, the phase noise qualities of the source clock and the system cost and complexity will be the main limitations on the phase noise of the DDS array. The study of phase truncation spurs suggests that, at least in our system, the phase truncation spurs are uncorrelated, contrary to the theoretical prediction. We believe this decorrelation is due to the existence of an unidentified mechanism in our DDS array that is unaccounted for in our current operational DDS model. This mechanism, likely due to some timing element in the FPGA, causes some randomness in the relative phases of the truncation spurs from channel to channel each time the DDS array is powered up. This randomness decorrelates the phase truncation spurs, opening the potential for SFDR gain from using a DDS array. The analysis of the correlation of quantization noise spurs in an array of DDSs shows that the total quantization noise power of each DDS channel is uncorrelated for nearly all values of DAC output bits. This suggests that a near N gain in SQNR is possible for an N-channel array of DDSs. This gain will be most apparent for low-bit DACs in which quantization noise is notably higher than the thermal noise contribution. Lastly, the measurements of the correlation of quantizer nonlinearity spurs demonstrate that the second and third harmonics are highly correlated across channels for all frequencies tested. This means that there is no benefit to using an array of DDSs for the problems of in-band quantizer nonlinearities. As a result, alternate methods of harmonic spur management must be employed.

A small area 8 bits 50 MHz CMOS DAC for Bluetooth transmitter

This paper presents a small-area CMOS current-steering segmented digital-to-analog converter (DAC) design intended for RF transmitters in 2.45 GHz Bluetooth applications. The current-source design strategy is based on an iterative scheme whose variables are adjusted in a simple way, minimizing the area and the power consumption, and meeting the design specifications. A theoretical analysis of static-dynamic requirements and a new layout strategy to attain a small-area current-steering DAC are included. The DAC was designed and implemented in 0.35 mu m CMOS technology, requiring an active area of just 200 mu m x 200 mu m. Experimental results, with a full-scale output current of 700 mu A and a 3.3 V power supply, showed a spurious-free dynamic range of 58 dB for a 1 MHz output sine wave and sampling frequency of 50 MHz, with differential and integral nonlinearity of 0.3 and 0.37 LSB, respectively.

On the analysis of notched concrete beams: From measurement with digital image correlation to identification with boundary element method of a cohesive model

A way of coupling digital image correlation (to measure displacement fields) and boundary element method (to compute displacements and tractions along a crack surface) is presented herein. It allows for the identification of Young`s modulus and fracture parameters associated with a cohesive model. This procedure is illustrated to analyze the latter for an ordinary concrete in a three-point bend test on a notched beam. In view of measurement uncertainties, the results are deemed trustworthy thanks to the fact that numerous measurement points are accessible and used as entries to the identification procedure. (C) 2010 Elsevier Ltd. All rights reserved.

Digital image analysis to standardize a photometric method in colorimetric quantification

Techniques applying digital images increasingly have been used in biology, medicine, physics, and other research areas. The image coordinates can represent light intensities values to be detected by a CCD. Based on this concept, a photometric system composed of a LED source and a digital camera as a detector was used for optical density measurements. Standards for permanganate, glucose, and protein solutions were detemined by colorimetric methods using our device. Samples of protein of Pasteurella mutocida bacteria membrane and, also, fractions of rabbit kidney membrane, rich in Na, K-ATPase, with unknown concentrations were dosed through the Hartree method using our photometric system.

Effectiveness of the Combined Recombinant Human Growth Hormone and Gonadotropin-Releasing Hormone Analog Therapy in Pubertal Patients with Short Stature due to SHOX Deficiency

Context: Isolated heterozygous SHOX defects are the most frequent monogenic cause of short stature, and combined therapy with recombinant human GH (rhGH) and GnRH analog (GnRHa) in pubertal patients has been suggested, but there are no data on final height. Objective: The aim of the study was to analyze adult height after rhGH and GnRHa therapy in patients with SHOX haploinsufficiency. Patients: Ten peripubertal patients with isolated SHOX defects participated in the study. Intervention: Five patients were followed without treatment, and five were treated with rhGH (50 mu g/kg/d) and depot leuprolide acetate (3.75 mg/month). Main Outcome Measures: Adult height SD score (SDS) was measured. Results: All patients followed without treatment had marked downward growth shift during puberty (height SDS, -1.2 +/- 0.7 at 11.4 +/- 1.4 yr; adult height SDS, -2.5 +/- 0.5). Conversely, four of five patients treated with rhGH for 2 to 4.9 yr associated to GnRHa for 1.4 to 5.8 yr improved their height SDS from -2.3 +/- 1.3 at 11.8 +/- 2.1 yr to a final height SDS of -1.7 +/- 1.6. The difference between the mean height SDS at the first evaluation and final height SDS was statistically significant in nontreated vs. treated patients (mean height SDS change, -1.2 +/- 0.4 vs. 0.6 +/- 0.4, respectively; P < 0.001). Conclusion: A gain in adult height of patients with isolated SHOX defects treated with combined rhGH and GnRHa therapy was demonstrated for the first time, supporting this treatment for children with SHOX defects who have just started puberty to avoid the loss of growth potential observed in these patients during puberty. (J Clin Endocrinol Metab 95: 328-332, 2010)

Development of a digital hearing aid to meet the Brazilian Government`s Ordinance 587 (APAC) - Health Department

The treatment of sensorineural hearing loss is based on hearing aids, also known as individual sound amplification devices. The hearing aids purchased by the Brazilian Government, aiming at fulfilling public policies, are based on dedicated components, which bring about benefits, but also render them expensive and may impair repair services after manufacture`s warranty expires. Aim: to design digital behind-the-ear hearing aids built from standardized components coming from the very supply chain of these manufacturers. Study design: experimental. Materials and Methods: to identify the supply chain of these manufacturers, request samples and set up hearing aids in the laboratory. Results: The developed hearing aids did not show lesser electroacoustic characteristics when compared to those acquired by the Government, also being tested by the same reference international technical standard. Conclusion: It is possible to develop digital behind-the-ear hearing aids based on off-the-shelf components from hearing aid manufacturers` supply chain. Their advantages include low operational costs - for acquisition (with clear advantages for the Government) and service (advantage for the patient).

Validity and reliability of a computer method to estimate vertebral axial rotation from digital radiographs

Axial vertebral rotation, an important parameter in the assessment of scoliosis may be identified on X-ray images. In line with the advances in the field of digital radiography, hospitals have been increasingly using this technique. The objective of the present study was to evaluate the reliability of computer-processed rotation measurements obtained from digital radiographs. A software program was therefore developed, which is able to digitally reproduce the methods of Perdriolle and Raimondi and to calculate semi-automatically the rotation degree of vertebra on digital radiographs. Three independent observers estimated vertebral rotation employing both the digital and the traditional manual methods. Compared to the traditional method, the digital assessment showed a 43% smaller error and a stronger correlation. In conclusion, the digital method seems to be reliable and enhance the accuracy and precision of vertebral rotation measurements.

The impact of the digital divide on the perceived interest of an e-Marketplace to support healthcare and social care services

In a Europe increasingly aging, it is now recognized the importance and potential of the service industry for ageing well based on information and communication technologies (ICT), as exemplified by the electronic market of social services and health care, the GuiMarket, proposed by the authors. However, this new range of services requires that individuals have advanced digital skills to fully participate in society. Based on the results of a survey made on a sample of 315 individuals, this paper discusses the importance granted GuiMarket and the intended frequency of use, concluding there is a close relationship between ICT access and use that respondents anticipate making of GuiMarket and alike services.

Design of improved rail-to-rail low-distortion and low-stress switches in advanced CMOS technologies

This paper describes the efficient design of an improved and dedicated switched-capacitor (SC) circuit capable of linearizing CMOS switches to allow SC circuits to reach low distortion levels. The described circuit (SC linearization control circuit, SLC) has the advantage over conventional clock-bootstrapping circuits of exhibiting low-stress, since large gate voltages are avoided. This paper presents exhaustive corner simulation results of a SC sample-and-hold (S/H) circuit which employs the proposed and optimized circuits, together with the experimental evaluation of a complete 10-bit ADC utilizing the referred S/H circuit. These results show that the SLC circuits can reduce distortion and increase dynamic linearity above 12 bits for wide input signal bandwidths.

Technical considerations concerning digital technologies

This chapter addresses technical issues concerning digital technologies. Radiological equipment and technique are briefly introduced together with a discussion about requirements and advantages of digital technologies. Digital technologies offer several advantages when compared to conventional analogical systems, or screen–film (SF) systems. While in clinical practice the practitioners should be aware of technical factors such as image acquisition, management of patient dose, and diagnostic image quality. Thus, digital technologies require an up-to-date scientific knowledge concerning their use in projection radiography. In this chapter, technical considerations concerning digital technologies are provided.

HVDC transmission systems: Bipolar back-to-back diode clamped multilevel converter with fastoptimum-predictive control and capacitor balancing strategy

Voltage source multilevel power converter structures are being considered for high power high voltage applications where they have well known advantages. Recently, full back-to-back connected multilevel neutral diode clamped converters (NPC) have been used in high voltage direct current (HVDC) transmission systems. Bipolar back-to-back connection of NPCs have advantages in long distance HVDC transmission systems, but highly increased difficulties to balance the dc capacitor voltage dividers on both sending and receiving end NPCs. This paper proposes a fast optimum-predictive controller to balance the dc capacitor voltages and to control the power flow in a long distance HVDCsystem using bipolar back-to-back connected NPCs. For both converter sides, the control strategy considers active and reactive power to establish ac grid currents on sending and receiving ends, while guaranteeing the balancing of both NPC dc bus capacitor voltages. Furthermore, the fast predictivecontroller minimizes the semiconductor switching frequency to reduce global switching losses. The performance and robustness of the new fast predictive control strategy and the associated dc capacitors voltage balancing are evaluated. (C) 2011 Elsevier B.V. All rights reserved.