Formation of amorphous xenon nanoclusters and microstructure evolution in pulsed laser deposited Ti62.5Si37.5 thin films during Xe ion irradiation

As deposited amorphous and crystallized thin films of Ti 37.5% Si alloy deposited by pulsed laser ablation technique were irradiated with 100 keV Xe+ ion beam to an ion fluence of about 1016 ions-cm−2. Transmission electron microscopy revealed that the implanted Xe formed amorphous nanosized clusters in both cases. The Xe ion-irradiation favors nucleation of a fcc-Ti(Si) phase in amorphous films. However, in crystalline films, irradiation leads to dissolution of the Ti5Si3 intermetallic phase. In both cases, Xe irradiation leads to the evolution of similar microstructures. Our results point to the pivotal role of nucleation in the evolution of the microstructure under the condition of ion implantation.

Structural characterization of DC magnetron-sputtered TiO2 thin films using XRD and Raman scattering studies

Titanium dioxide films have been deposited using DC magnetron sputtering technique onto well-cleaned p-silicon substrates at an oxygen partial pressure of 7 x 10(-5) mbar and at a sputtering pressure (Ar + O-2) Of I X 10(-3) mbar. The deposited films were calcinated at 673 and 773 K. The composition of the films as analyzed using Auger electron spectroscopy reveals the stoichiometry with an 0 and Ti ratio 2.08. The influence of post-deposition annealing at 673 and 773 K on the structural properties of the titanium dioxide thin films have been studied using XRD and Raman scattering. The structure of the films deposited at the ambient was found to be amorphous and the films annealed at temperature 673 K and above were crystalline with anatase structure. The lattice constants, grain size, microstrain and the dislocation density of the film are calculated and correlated with annealing temperature. The Raman scattering study was performed on the as-deposited and annealed samples and the existence of Raman active modes A(1g), B-1g and E-g corresponding to the Raman shifts are studied and reported. The improvement of crystallinity of the TiO2 films was also studied using Raman scattering studies. (C) 2003 Elsevier Ltd. All rights reserved.

Reactive Diffusion Between Vanadium and Silicon

Interdiffusion study is conducted in the V-Si system to determine integrated diffusion coefficients of the phases. Activation energy values are calculated from the experiments conducted at different temperatures. The average values are found to be 208, 240 and 141 kJ/mol, respectively, for the V(3)Si, V(5)Si(3) and VSi(2) phases. The low activation energy for the VSi(2) phase indicates very high concentration of defects or the significant contribution from the grain boundary diffusion. The error in calculation of diffusion parameters from a very thin phase layer in a multiphase diffusion couple is discussed. Further the data available in the literature in this system is compared and the problems in the indirect methodology followed previously to calculate the diffusion parameters are discussed.

Effect of annealing temperature on electrical and nano-structural properties of sol-gel derived ZnO thin films

Zinc oxide (ZnO) thin films have been prepared on silicon substrates by sol-gel spin coating technique with spinning speed of 3,000 rpm. The films were annealed at different temperatures from 200 to 500 A degrees C and found that ZnO films exhibit different nanostructures at different annealing temperatures. The X-ray diffraction (XRD) results showed that the ZnO films convert from amorphous to polycrystalline phase after annealing at 400 A degrees C. The metal oxide semiconductor (MOS) capacitors were fabricated using ZnO films deposited on pre-cleaned silicon (100) substrates and electrical properties such as current versus voltage (I-V) and capacitance versus voltage (C-V) characteristics were studied. The electrical resistivity decreased with increasing annealing temperature. The oxide capacitance was measured at different annealing temperatures and different signal frequencies. The dielectric constant and the loss factor (tan delta) were increased with increase of annealing temperature.

Severe wear of a near eutectic aluminium-silicon alloy

The severe wear of a near eutectic aluminium silicon alloy is explored using a range of electron microscopic, spectroscopic and diffraction techniques to identify the residually strained and unstrained regions, microcracks and oxidized regions in the subsurface. In severe wear the contact pressure exceeds the elastic shakedown limit. Under this condition the primary and eutectic silicon particles fragment drastically. The fragments are transported by the matrix as it undergoes incremental straining with each cyclic contact at the asperity level. The grains are refined from similar to 2000 nm in the bulk to 30 nm in the near surface region. A large reduction in the interparticle distance compared with that for a milder stage of wear gives rise to high strain gradients which contribute to an enhancement of the dislocation density. The resulting regions of very high strain in the boundaries of the recrystallized grains as well as within the subgrains lead to the formation of microvoidskracks. This is accompanied by the formation of brittle oxides at these subsurface interfaces due to enhanced diffusion of oxygen. We believe that the abundance of such microcracks in the near surface region, primed by severe plastic deformation, is what distinguishes a severe wear regime from mild wear. (C) 2011 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved.

Topology Optimization of Micromachined Structures with the Manufacturing Constraints of KOH Etching of (110) Silicon

The focus of this paper is on designing useful compliant micro-mechanisms of high-aspect-ratio which can be microfabricated by the cost-effective wet etching of (110) orientation silicon (Si) wafers. Wet etching of (110) Si imposes constraints on the geometry of the realized mechanisms because it allows only etch-through in the form of slots parallel to the wafer's flat with a certain minimum length. In this paper, we incorporate this constraint in the topology optimization and obtain compliant designs that meet the specifications on the desired motion for given input forces. Using this design technique and wet etching, we show that we can realize high-aspect-ratio compliant micro-mechanisms. For a (110) Si wafer of 250 µm thickness, the minimum length of the etch opening to get a slot is found to be 866 µm. The minimum achievable width of the slot is limited by the resolution of the lithography process and this can be a very small value. This is studied by conducting trials with different mask layouts on a (110) Si wafer. These constraints are taken care of by using a suitable design parameterization rather than by imposing the constraints explicitly. Topology optimization, as is well known, gives designs using only the essential design specifications. In this work, we show that our technique also gives manufacturable mechanism designs along with lithography mask layouts. Some designs obtained are transferred to lithography masks and mechanisms are fabricated on (110) Si wafers.

Studies on the deposition and characterization of silicon oxide films for optical coating applications

Silicon oxide films were deposited by reactive evaporation of SiO. Parameters such as oxygen partial pressure and substrate temperature were varied to get variable and graded index films. Films with a refractive index in the range 1.718 to 1.465 at 550 nm have been successfully deposited. Films deposited using ionized oxygen has the refractive index 1.465 at 550 nm and good UV transmittance like bulk fused quartz. Preparation of graded index films was also investigated by changing the oxygen partial pressure during deposition. A two layer antireflection coating at 1064nm has been designed using both homogeneous and inhomogeneous films and studied their characteristics.

Temperature dependent transport studies in InN quantum dots grown by droplet epitaxy on silicon nitride/Si substrate

InN quantum dots (QDs) were fabricated on silicon nitride/Si (111) substrate by droplet epitaxy. Single-crystalline structure of InN QDs was verified by transmission electron microscopy, and the chemical bonding configurations of InN QDs were examined by x-ray photoelectron spectroscopy. Photoluminescence measurement shows a slight blue shift compared to the bulk InN, arising from size dependent quantum confinement effect. The interdigitated electrode pattern was created and current-voltage (I-V) characteristics of InN QDs were studied in a metal-semiconductor-metal configuration in the temperature range of 80-300K. The I-V characteristics of lateral grown InN QDs were explained by using the trap model. (C) 2011 American Institute of Physics. [doi:10.1063/1.3651762]

Effect of substrate bias voltage on the structure, electric and dielectric properties of TiO(2) thin films by DC magnetron sputtering

Titanium dioxide (TiO(2)) films have been deposited on glass and p-silicon (1 0 0) substrates by DC magnetron sputtering technique to investigate their structural, electrical and optical properties. The surface composition of the TiO(2) films has been analyzed by X-ray photoelectron spectroscopy. The TiO(2) films formed on unbiased substrates were amorphous. Application of negative bias voltage to the substrate transformed the amorphous TiO(2) into polycrystalline as confirmed by Raman spectroscopic studies. Thin film capacitors with configuration of Al/TiO(2)/p-Si have been fabricated. The leakage current density of unbiased films was 1 x10(-6) A/cm(2) at a gate bias voltage of 1.5 V and it was decreased to 1.41 x 10(-7) A/cm(2) with the increase of substrate bias voltage to -150 V owing to the increase in thickness of interfacial layer of SiO(2). Dielectric properties and AC electrical conductivity of the films were studied at various frequencies for unbiased and biased at -150 V. The capacitance at 1 MHz for unbiased films was 2.42 x 10(-10) F and it increased to 5.8 x 10(-10) F in the films formed at substrate bias voltage of -150 V. Dielectric constant of TiO(2) films were calculated from capacitance-voltage measurements at 1 MHz frequency. The dielectric constant of unbiased films was 6.2 while those formed at -150 V it increased to 19. The optical band gap of the films decreased from 3.50 to 3.42 eV with the increase of substrate bias voltage from 0 to -150 V. (C) 2011 Elsevier B. V. All rights reserved.

“Post silicon debug of SOC designs”

Continuous advances in VLSI technology have made implementation of very complicated systems possible. Modern System-on -Chips (SoCs) have many processors, IP cores and other functional units. As a result, complete verification of whole systems before implementation is becoming infeasible; hence it is likely that these systems may have some errors after manufacturing. This increases the need to find design errors in chips after fabrication. The main challenge for post-silicon debug is the observability of the internal signals. Post-silicon debug is the problem of determining what's wrong when the fabricated chip of a new design behaves incorrectly. This problem now consumes over half of the overall verification effort on large designs, and the problem is growing worse.Traditional post-silicon debug methods concentrate on functional parts of systems and provide mechanisms to increase the observability of internal state of systems. Those methods may not be sufficient as modern SoCs have lots of blocks (processors, IP cores, etc.) which are communicating with one another and communication is another source of design errors. This tutorial will be provide an insight into various observability enhancement techniques, on chip instrumentation techniques and use of high level models to support the debug process targeting both inside blocks and communication among them. It will also cover the use of formal methods to help debug process.