Ultrahigh step-up dc-dc converter for distributed generation by three Degrees of Freedom (3DoF) approach

This paper proposes a novel dc-dc converter topology to achieve an ultrahigh step-up ratio while maintaining a high conversion efficiency. It adopts a three degree of freedom approach in the circuit design. It also demonstrates the flexibility of the proposed converter to combine with the features of modularity, electrical isolation, soft-switching, low voltage stress on switching devices, and is thus considered to be an improved topology over traditional dc-dc converters. New control strategies including the two-section output voltage control and cell idle control are also developed to improve the converter performance. With the cell idle control, the secondary winding inductance of the idle module is bypassed to decrease its power loss. A 400-W dc-dc converter is prototyped and tested to verify the proposed techniques, in addition to a simulation study. The step-up conversion ratio can reach 1:14 with a peak efficiency of 94% and the proposed techniques can be applied to a wide range of high voltage and high power distributed generation and dc power transmission.

A new sensorless speed control scheme for doubly-fed reluctance generators

This paper presents the development and experimental validation of a novel angular velocity observer-based field-oriented control algorithm for a promising low-cost brushless doubly fed reluctance generator (BDFRG) in wind power applications. The BDFRG has been receiving increasing attention because of the use of partially rated power electronics, the high reliability of brushless design, and competitive performance to its popular slip-ring counterpart, the doubly fed induction generator. The controller viability has been demonstrated on a BDFRG laboratory test facility for emulation of variable speed and loading conditions of wind turbines or pump drives.

Online sensorless position estimation for switched reluctance motors using one current sensor

This paper proposes an online sensorless rotor position estimation technique for switched reluctance motors (SRMs) using just one current sensor. It is achieved by first decoupling the excitation current from the bus current. Two phase-shifted pulse width modulation signals are injected into the relevant lower transistors in the asymmetrical half-bridge converter for short intervals during each current fundamental cycle. Analog-to-digital converters are triggered in the pause middles of the dual pulse to separate the bus current for excitation current recognition. Next, the rotor position is estimated from the excitation current, by a current-rise-time method in the current-chopping-control mode in a low-speed operation and a current-gradient method in the voltage-pulse-control mode in a high-speed operation. The proposed scheme requires only a bus current sensor and a minor change to the converter circuit, without a need for individual phase current sensors or additional detection devices, achieving a more compact and cost-effective drive. The performance of the sensorless SRM drive is fully investigated. The simulation and experiments on a 750-W three-phase 12/8-pole SRM are carried out to verify the effectiveness of the proposed scheme.

Central-tapped node linked modular fault-tolerance topology for SRM applications

Electric vehicles (EVs) and hybrid electric vehicles (HEVs) can reduce greenhouse gas emissions while switched reluctance motor (SRM) is one of the promising motor for such applications. This paper presents a novel SRM fault-diagnosis and fault-tolerance operation solution. Based on the traditional asymmetric half-bridge topology for the SRM driving, the central tapped winding of the SRM in modular half-bridge configuration are introduced to provide fault-diagnosis and fault-tolerance functions, which are set idle in normal conditions. The fault diagnosis can be achieved by detecting the characteristic of the excitation and demagnetization currents. An SRM fault-tolerance operation strategy is also realized by the proposed topology, which compensates for the missing phase torque under the open-circuit fault, and reduces the unbalanced phase current under the short-circuit fault due to the uncontrolled faulty phase. Furthermore, the current sensor placement strategy is also discussed to give two placement methods for low cost or modular structure. Simulation results in MATLAB/Simulink and experiments on a 750-W SRM validate the effectiveness of the proposed strategy, which may have significant implications and improve the reliability of EVs/HEVs.

DC-link voltage control strategy for reducing capacitance and total harmonic distortion in single-phase grid-connected photovoltaic inverters

High-volume capacitance is required to buffer the power difference between the input and output ports in single-phase grid-connected photovoltaic inverters, which become an obstacle to high system efficiency and long device lifetime. Furthermore, total harmonic distortion becomes serious when the system runs into low power level. In this study, a comprehensive analysis is introduced for two-stage topology with the consideration of active power, DC-link (DCL) voltage, ripple and capacitance. This study proposed a comprehensive DCL voltage control strategy to minimise the DCL capacitance while maintaining a normal system operation. Furthermore, the proposed control strategy is flexible to be integrated with the pulse-skipping control that significantly improves the power quality at light power conditions. Since the proposed control strategy needs to vary DCL voltage, an active protection scheme is also introduced to prevent any voltage violation across the DCL. The proposed control strategy is evaluated by both simulation and experiments, whose results confirm the system effectiveness.

Optimised phase disposition pulse-width modulation strategy for hybrid-clamped multilevel inverters using switching state sequences

This study describes an optimised modulation strategy based on switching state sequences for the hybrid-clamped multilevel converter. Two key control variables defined as 'phase shift angle' and 'switching state change' for a five-level hybrid-clamped inverter are proposed to improve all switches' operation, and by changing their values, different control methods can be obtained for modulation optimisation purposes. Two example methods can solve the voltage imbalance problem of the dc-link capacitors and furthermore avoid two switches' simultaneous switching transitions and improve the inverter's performance as compared with the traditional phase disposition pulse-width modulation strategy. A 6 kW prototype inverter is developed and a range of simulation and experiments are carried out for validation. It is found that simulation and experimental results are in a good agreement and the proposed modulation strategy is verified in terms of low-order harmonic reduction.

Multiobjective design optimization of IGBT power modules considering power cycling and thermal cycling

Insulated-gate bipolar transistor (IGBT) power modules find widespread use in numerous power conversion applications where their reliability is of significant concern. Standard IGBT modules are fabricated for general-purpose applications while little has been designed for bespoke applications. However, conventional design of IGBTs can be improved by the multiobjective optimization technique. This paper proposes a novel design method to consider die-attachment solder failures induced by short power cycling and baseplate solder fatigue induced by the thermal cycling which are among major failure mechanisms of IGBTs. Thermal resistance is calculated analytically and the plastic work design is obtained with a high-fidelity finite-element model, which has been validated experimentally. The objective of minimizing the plastic work and constrain functions is formulated by the surrogate model. The nondominated sorting genetic algorithm-II is used to search for the Pareto-optimal solutions and the best design. The result of this combination generates an effective approach to optimize the physical structure of power electronic modules, taking account of historical environmental and operational conditions in the field.

A thermally wavelength-tunable photonic switch based on silicon microring resonator

Silicon photonics is a very promising technology for future low-cost high-bandwidth optical telecommunication applications down to the chip level. This is due to the high degree of integration, high optical bandwidth and large speed coupled with the development of a wide range of integrated optical functions. Silicon-based microring resonators are a key building block that can be used to realize many optical functions such as switching, multiplexing, demultiplaxing and detection of optical wave. The ability to tune the resonances of the microring resonators is highly desirable in many of their applications. In this work, the study and application of a thermally wavelength-tunable photonic switch based on silicon microring resonator is presented. Devices with 10μm diameter were systematically studied and used in the design. Its resonance wavelength was tuned by thermally induced refractive index change using a designed local micro-heater. While thermo-optic tuning has moderate speed compared with electro-optic and all-optic tuning, with silicon’s high thermo-optic coefficient, a much wider wavelength tunable range can be realized. The device design was verified and optimized by optical and thermal simulations. The fabrication and characterization of the device was also implemented. The microring resonator has a measured FSR of ∼18 nm, FWHM in the range 0.1-0.2 nm and Q around 10,000. A wide tunable range (>6.4 nm) was achieved with the switch, which enables dense wavelength division multiplexing (DWDM) with a channel space of 0.2nm. The time response of the switch was tested on the order of 10 μs with a low power consumption of ∼11.9mW/nm. The measured results are in agreement with the simulations. Important applications using the tunable photonic switch were demonstrated in this work. 1×4 and 4×4 reconfigurable photonic switch were implemented by using multiple switches with a common bus waveguide. The results suggest the feasibility of on-chip DWDM for the development of large-scale integrated photonics. Using the tunable switch for output wavelength control, a fiber laser was demonstrated with Erbium-doped fiber amplifier as the gain media. For the first time, this approach integrated on-chip silicon photonic wavelength control.

Dynamic modeling and analysis of single-stage boost inverters under normal and abnormal conditions

Inverters play key roles in connecting sustainable energy (SE) sources to the local loads and the ac grid. Although there has been a rapid expansion in the use of renewable sources in recent years, fundamental research, on the design of inverters that are specialized for use in these systems, is still needed. Recent advances in power electronics have led to proposing new topologies and switching patterns for single-stage power conversion, which are appropriate for SE sources and energy storage devices. The current source inverter (CSI) topology, along with a newly proposed switching pattern, is capable of converting the low dc voltage to the line ac in only one stage. Simple implementation and high reliability, together with the potential advantages of higher efficiency and lower cost, turns the so-called, single-stage boost inverter (SSBI), into a viable competitor to the existing SE-based power conversion technologies.^ The dynamic model is one of the most essential requirements for performance analysis and control design of any engineering system. Thus, in order to have satisfactory operation, it is necessary to derive a dynamic model for the SSBI system. However, because of the switching behavior and nonlinear elements involved, analysis of the SSBI is a complicated task.^ This research applies the state-space averaging technique to the SSBI to develop the state-space-averaged model of the SSBI under stand-alone and grid-connected modes of operation. Then, a small-signal model is derived by means of the perturbation and linearization method. An experimental hardware set-up, including a laboratory-scaled prototype SSBI, is built and the validity of the obtained models is verified through simulation and experiments. Finally, an eigenvalue sensitivity analysis is performed to investigate the stability and dynamic behavior of the SSBI system over a typical range of operation. ^

Field programmable gate array based target detection and gesture recognition

The move from Standard Definition (SD) to High Definition (HD) represents a six times increases in data, which needs to be processed. With expanding resolutions and evolving compression, there is a need for high performance with flexible architectures to allow for quick upgrade ability. The technology advances in image display resolutions, advanced compression techniques, and video intelligence. Software implementation of these systems can attain accuracy with tradeoffs among processing performance (to achieve specified frame rates, working on large image data sets), power and cost constraints. There is a need for new architectures to be in pace with the fast innovations in video and imaging. It contains dedicated hardware implementation of the pixel and frame rate processes on Field Programmable Gate Array (FPGA) to achieve the real-time performance. ^ The following outlines the contributions of the dissertation. (1) We develop a target detection system by applying a novel running average mean threshold (RAMT) approach to globalize the threshold required for background subtraction. This approach adapts the threshold automatically to different environments (indoor and outdoor) and different targets (humans and vehicles). For low power consumption and better performance, we design the complete system on FPGA. (2) We introduce a safe distance factor and develop an algorithm for occlusion occurrence detection during target tracking. A novel mean-threshold is calculated by motion-position analysis. (3) A new strategy for gesture recognition is developed using Combinational Neural Networks (CNN) based on a tree structure. Analysis of the method is done on American Sign Language (ASL) gestures. We introduce novel point of interests approach to reduce the feature vector size and gradient threshold approach for accurate classification. (4) We design a gesture recognition system using a hardware/ software co-simulation neural network for high speed and low memory storage requirements provided by the FPGA. We develop an innovative maximum distant algorithm which uses only 0.39% of the image as the feature vector to train and test the system design. Database set gestures involved in different applications may vary. Therefore, it is highly essential to keep the feature vector as low as possible while maintaining the same accuracy and performance^

Protótipo de rastreador solar de um eixo baseado em microcontrolador

The increase in the efficiency of photo-voltaic systems has been the object of various studies the past few years. One possible way to increase the power extracted by a photovoltaic panel is the solar tracking, performing its movement in order to follow the sun’s path. One way to activate the tracking system is using an electric induction motor, which should have sufficient torque and low speed, ensuring tracking accuracy. With the use of voltage source inverters and logic devices that generate the appropriate switching is possible to obtain the torque and speed required for the system to operate. This paper proposes the implementation of a angular position sensor and a driver to be applied in solar tracker built at a Power Electronics and Renewable Energies Laboratory, located in UFRN. The speed variation of the motor is performed via a voltage source inverter whose PWM command to actuate their keys will be implemented in an FPGA (Field Programmable Gate Array) device and a TM4C microcontroller. A platform test with an AC induction machine of 1.5 CV was assembled for the comparative testing. The angular position sensor of the panel is implemented in a ATMega328 microcontroller coupled to an accelerometer, commanded by an Arduino prototyping board. The solar position is also calculated by the microcontroller from the geographic coordinates of the site where it was placed, and the local time and date obtained from an RTC (Real-Time Clock) device. A prototype of a solar tracker polar axis moved by a DC motor was assembled to certify the operation of the sensor and to check the tracking efficiency.

Survey on demand side sensitivity to power quality in Ireland

Power systems require a reliable supply and good power quality. The impact of power supply interruptions is well acknowledged and well quantified. However, a system may perform reliably without any interruptions but may have poor power quality. Although poor power quality has cost implications for all actors in the electrical power systems, only some users are aware of its impact. Power system operators are much attuned to the impact of low power quality on their equipment and have the appropriate monitoring systems in place. However, over recent years certain industries have come increasingly vulnerable to negative cost implications of poor power quality arising from changes in their load characteristics and load sensitivities, and therefore increasingly implement power quality monitoring and mitigation solutions. This paper reviews several historical studies which investigate the cost implications of poor power quality on industry. These surveys are largely focused on outages, whilst the impact of poor power quality such as harmonics, short interruptions, voltage dips and swells, and transients is less well studied and understood. This paper examines the difficulties in quantifying the costs of poor power quality, and uses the chi-squared method to determine the consequences for industry of power quality phenomenon using a case study of over 40 manufacturing and data centres in Ireland.

A touchless passive Infrared gesture sensor.

A sensing device for a touchless, hand gesture, user interface based on an inexpensive passive infrared pyroelectric detector array is presented. The 2 x 2 element sensor responds to changing infrared radiation generated by hand movement over the array. The sensing range is from a few millimetres to tens of centimetres. The low power consumption (< 50 μW) enables the sensor’s use in mobile devices and in low energy applications. Detection rates of 77% have been demonstrated using a prototype system that differentiates the four main hand motion trajectories – up, down, left and right. This device allows greater non-contact control capability without an increase in size, cost or power consumption over existing on/off devices.

Comparative performance analysis of drives for induction motors

The asynchronous polyphase induction motor has been the motor of choice in industrial settings for about the past half century because power electronics can be used to control its output behavior. Before that, the dc motor was widely used because of its easy speed and torque controllability. The two main reasons why this might be are its ruggedness and low cost. The induction motor is a rugged machine because it is brushless and has fewer internal parts that need maintenance or replacement. This makes it low cost in comparison to other motors, such as the dc motor. Because of these facts, the induction motor and drive system have been gaining market share in industry and even in alternative applications such as hybrid electric vehicles and electric vehicles. The subject of this thesis is to ascertain various control algorithms’ advantages and disadvantages and give recommendations for their use under certain conditions and in distinct applications. Four drives will be compared as fairly as possible by comparing their parameter sensitivities, dynamic responses, and steady-state errors. Different switching techniques are used to show that the motor drive is separate from the switching scheme; changing the switching scheme produces entirely different responses for each motor drive.

Electrical and optical studies on carbon nanotube arrays

Single-walled carbon nanotubes (SWNTs) have been studied as a prominent class of high performance electronic materials for next generation electronics. Their geometry dependent electronic structure, ballistic transport and low power dissipation due to quasi one dimensional transport, and their capability of carrying high current densities are some of the main reasons for the optimistic expectations on SWNTs. However, device applications of individual SWNTs have been hindered by uncontrolled variations in characteristics and lack of scalable methods to integrate SWNTs into electronic devices. One relatively new direction in SWNT electronics, which avoids these issues, is using arrays of SWNTs, where the ensemble average may provide uniformity from device to device, and this new breed of electronic material can be integrated into electronic devices in a scalable fashion. This dissertation describes (1) methods for characterization of SWNT arrays, (2) how the electrical transport in these two-dimensional arrays depend on length scales and spatial anisotropy, (3) the interaction of aligned SWNTs with the underlying substrate, and (4) methods for scalable integration of SWNT arrays into electronic devices. The electrical characterization of SWNT arrays have been realized by polymer electrolyte-gated SWNT thin film transistors (TFTs). Polymer electrolyte-gating addresses many technical difficulties inherent to electrical characterization by gating through oxide-dielectrics. Having shown polymer electrolyte-gating can be successfully applied on SWNT arrays, we have studied the length scaling dependence of electrical transport in SWNT arrays. Ultrathin films formed by sub-monolayer surface coverage of SWNT arrays are very interesting systems in terms of the physics of two-dimensional electronic transport. We have observed that they behave qualitatively different than the classical conducting films, which obey the Ohm’s law. The resistance of an ultrathin film of SWNT arrays is indeed non-linear with the length of the film, across which the transport occurs. More interestingly, a transition between conducting and insulating states is observed at a critical surface coverage, which is called percolation limit. The surface coverage of conducting SWNTs can be manipulated by turning on and off the semiconductors in the SWNT array, leading to the operation principle of SWNT TFTs. The percolation limit depends also on the length and the spatial orientation of SWNTs. We have also observed that the percolation limit increases abruptly for aligned arrays of SWNTs, which are grown on single crystal quartz substrates. In this dissertation, we also compare our experimental results with a two-dimensional stick network model, which gives a good qualitative picture of the electrical transport in SWNT arrays in terms of surface coverage, length scaling, and spatial orientation, and briefly discuss the validity of this model. However, the electronic properties of SWNT arrays are not only determined by geometrical arguments. The contact resistances at the nanotube-nanotube and nanotube-electrode (bulk metal) interfaces, and interactions with the local chemical groups and the underlying substrates are among other issues related to the electronic transport in SWNT arrays. Different aspects of these factors have been studied in detail by many groups. In fact, I have also included a brief discussion about electron injection onto semiconducting SWNTs by polymer dopants. On the other hand, we have compared the substrate-SWNT interactions for isotropic (in two dimensions) arrays of SWNTs grown on Si/SiO2 substrates and horizontally (on substrate) aligned arrays of SWNTs grown on single crystal quartz substrates. The anisotropic interactions associated with the quartz lattice between quartz and SWNTs that allow near perfect horizontal alignment on substrate along a particular crystallographic direction is examined by Raman spectroscopy, and shown to lead to uniaxial compressive strain in as-grown SWNTs on single crystal quartz. This is the first experimental demonstration of the hard-to-achieve uniaxial compression of SWNTs. Temperature dependence of Raman G-band spectra along the length of individual nanotubes reveals that the compressive strain is non-uniform and can be larger than 1% locally at room temperature. Effects of device fabrication steps on the non-uniform strain are also examined and implications on electrical performance are discussed. Based on our findings, there are discussions about device performances and designs included in this dissertation. The channel length dependences of device mobilities and on/off ratios are included for SWNT TFTs. Time response of polymer-electrolyte gated SWNT TFTs has been measured to be ~300 Hz, and a proof-of-concept logic inverter has been fabricated by using polymer electrolyte gated SWNT TFTs for macroelectronic applications. Finally, I dedicated a chapter on scalable device designs based on aligned arrays of SWNTs, including a design for SWNT memory devices.