Open and Standardized Resources for Smart Transducer Networking

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

A multimedia environment for supporting the teaching of robotics systems

This paper aims at describing an educational system for teaching and learning robotic systems. Multimedia resources were used to construct a virtual laboratory where users are able to use functionalities of a virtual robotic arm, by moving and clicking the mouse without caring about the detailed internal robot operation. Moreover through the multimedia system the user can interact with a real robot arm. The engineering students are the target public of the developed system. With its contents and interactive capabilities, it has been used as a support to the traditional face-to-face classes on the subject of robotics.. In the paper it is first introduced the metaphor of Virtual Laboratory used in the system. Next, it is described the Graphical and Multimedia Environment approach: an interactive graphic user interface with a 3D environment for simulation. Design and implementation issues of the real-time interactive multimedia learning system, which supports the W3C SMIL standard for presenting the real-time multimedia teaching material, are described. Finally, some preliminary conclusions and possible future works from this research are presented.

Static converter: didactic support software

Teaching a course of special electric loads in a continuing education program to power engineers is a difficult task because they are not familiarized with switching topology circuits. Normally, in a typical program, many hours are dedicated to explain the thyristors switching sequence and to draw the converter currents and terminal voltages waveforms for different operative conditions. This work presents teaching support software in order to optimize the time spent in this task and, mainly to benefit the assimilation of the proposed subjects, studying the static converter under different non-ideal operative conditions.

HW/SW for an intelligent transducer network based on IEEE 1451 standard

This work describes a hardware/software co-design system development, named IEEE 1451 platform, to be used in process automation. This platform intends to make easier the implementation of IEEE standards 1451.0, 1451.1, 1451.2 and 1451.5. The hardware was built using NIOS II processor resources on Alteras Cyclone II FPGA. The software was done using Java technology and C/C++ for the processors programming. This HW/SW system implements the IEEE 1451 based on a control module and supervisory software for industrial automation. © 2011 Elsevier B.V.

Population, human resources and development planning: need for multisectoral institutional network for population policy implementation

Includes bibliography

Population: human resources and development planning: need for multisectoral institutional network for population policy implementation

Includes bibliography

Practising Arithmetic Using Educational Video Games with an Interpersonal Computer

Studies show the positive effects that video games can have on student performance and attitude towards learning. In the past few years, strategies have been generated to optimize the use of technological resources with the aim of facilitating widespread adoption of technology in the classroom. Given its low acquisition and maintenance costs, the interpersonal computer allows individual interaction and simultaneous learning with large groups of students. The purpose of this work was to compare arithmetical knowledge acquired by third-grade students through the use of game-based activities and non-game-based activities using an interpersonal computer, with knowledge acquired through the use of traditional paper-and-pencil activities, and to analyze their impact in various socio-cultural contexts. To do this, a quasi-experimental study was conducted with 271 students in three different countries (Brazil, Chile, and Costa Rica), in both rural and urban schools. A set of educational games for practising arithmetic was developed and tested in six schools within these three countries. Results show that there were no significant differences (ANCOVA) in the learning acquired from game-based vs. non-game-based activities. However, both showed a significant difference when compared with the traditional method. Additionally, both groups using the interpersonal computer showed higher levels of student interest than the traditional method group, and these technological methods were seen to be especially effective in increasing learning among weaker students.

Recursos tecnológicos: uma abordagem educacional

This study aimed to analyze the use of technological resources by teachers during their daily practice, especially the computer, in public and private elementary schools in Botucatu - SP. We know that today's society, called the Information Society and Knowledge, changes the context of education, since students have access to various information a short time. For this purpose, we use literature as a methodology and data collection through the application of a questionnaire answered by 49 students in public schools, state and private network cited. The choice of the students took place because of the diversity of schools in which they live. Our intention was not to make generalizations, but knowing more about the use of technology in these contexts from the perspective of students. The choice of subject had reason for their timeliness and necessity of knowledge, thus contributing to a comprehensive education and quality. Through data analysis, was explicit the difference between public and private schools, however, student interest was unanimous by the technologies and equitably

Avaliação de um curso de informática para crianças

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Computer game-based and traditional learning method: a comparison regarding students’ knowledge retention

Abstract Background Educational computer games are examples of computer-assisted learning objects, representing an educational strategy of growing interest. Given the changes in the digital world over the last decades, students of the current generation expect technology to be used in advancing their learning requiring a need to change traditional passive learning methodologies to an active multisensory experimental learning methodology. The objective of this study was to compare a computer game-based learning method with a traditional learning method, regarding learning gains and knowledge retention, as means of teaching head and neck Anatomy and Physiology to Speech-Language and Hearing pathology undergraduate students. Methods Students were randomized to participate to one of the learning methods and the data analyst was blinded to which method of learning the students had received. Students’ prior knowledge (i.e. before undergoing the learning method), short-term knowledge retention and long-term knowledge retention (i.e. six months after undergoing the learning method) were assessed with a multiple choice questionnaire. Students’ performance was compared considering the three moments of assessment for both for the mean total score and for separated mean scores for Anatomy questions and for Physiology questions. Results Students that received the game-based method performed better in the pos-test assessment only when considering the Anatomy questions section. Students that received the traditional lecture performed better in both post-test and long-term post-test when considering the Anatomy and Physiology questions. Conclusions The game-based learning method is comparable to the traditional learning method in general and in short-term gains, while the traditional lecture still seems to be more effective to improve students’ short and long-term knowledge retention.

Design and Performance Evaluation of Network-on-Chip Communication Protocols and Architectures

The scale down of transistor technology allows microelectronics manufacturers such as Intel and IBM to build always more sophisticated systems on a single microchip. The classical interconnection solutions based on shared buses or direct connections between the modules of the chip are becoming obsolete as they struggle to sustain the increasing tight bandwidth and latency constraints that these systems demand. The most promising solution for the future chip interconnects are the Networks on Chip (NoC). NoCs are network composed by routers and channels used to inter- connect the different components installed on the single microchip. Examples of advanced processors based on NoC interconnects are the IBM Cell processor, composed by eight CPUs that is installed on the Sony Playstation III and the Intel Teraflops pro ject composed by 80 independent (simple) microprocessors. On chip integration is becoming popular not only in the Chip Multi Processor (CMP) research area but also in the wider and more heterogeneous world of Systems on Chip (SoC). SoC comprehend all the electronic devices that surround us such as cell-phones, smart-phones, house embedded systems, automotive systems, set-top boxes etc... SoC manufacturers such as ST Microelectronics , Samsung, Philips and also Universities such as Bologna University, M.I.T., Berkeley and more are all proposing proprietary frameworks based on NoC interconnects. These frameworks help engineers in the switch of design methodology and speed up the development of new NoC-based systems on chip. In this Thesis we propose an introduction of CMP and SoC interconnection networks. Then focusing on SoC systems we propose: • a detailed analysis based on simulation of the Spidergon NoC, a ST Microelectronics solution for SoC interconnects. The Spidergon NoC differs from many classical solutions inherited from the parallel computing world. Here we propose a detailed analysis of this NoC topology and routing algorithms. Furthermore we propose aEqualized a new routing algorithm designed to optimize the use of the resources of the network while also increasing its performance; • a methodology flow based on modified publicly available tools that combined can be used to design, model and analyze any kind of System on Chip; • a detailed analysis of a ST Microelectronics-proprietary transport-level protocol that the author of this Thesis helped developing; • a simulation-based comprehensive comparison of different network interface designs proposed by the author and the researchers at AST lab, in order to integrate shared-memory and message-passing based components on a single System on Chip; • a powerful and flexible solution to address the time closure exception issue in the design of synchronous Networks on Chip. Our solution is based on relay stations repeaters and allows to reduce the power and area demands of NoC interconnects while also reducing its buffer needs; • a solution to simplify the design of the NoC by also increasing their performance and reducing their power and area consumption. We propose to replace complex and slow virtual channel-based routers with multiple and flexible small Multi Plane ones. This solution allows us to reduce the area and power dissipation of any NoC while also increasing its performance especially when the resources are reduced. This Thesis has been written in collaboration with the Advanced System Technology laboratory in Grenoble France, and the Computer Science Department at Columbia University in the city of New York.

Reliable and Variation-Tolerant Interconnection Network for Low Power MPSOCS

Multi-Processor SoC (MPSOC) design brings to the foreground a large number of challenges, one of the most prominent of which is the design of the chip interconnection. With a number of on-chip blocks presently ranging in the tens, and quickly approaching the hundreds, the novel issue of how to best provide on-chip communication resources is clearly felt. Scaling down of process technologies has increased process and dynamic variations as well as transistor wearout. Because of this, delay variations increase and impact the performance of the MPSoCs. The interconnect architecture inMPSoCs becomes a single point of failure as it connects all other components of the system together. A faulty processing element may be shut down entirely, but the interconnect architecture must be able to tolerate partial failure and variations and operate with performance, power or latency overhead. This dissertation focuses on techniques at different levels of abstraction to face with the reliability and variability issues in on-chip interconnection networks. By showing the test results of a GALS NoC testchip this dissertation motivates the need for techniques to detect and work around manufacturing faults and process variations in MPSoCs’ interconnection infrastructure. As a physical design technique, we propose the bundle routing framework as an effective way to route the Network on Chips’ global links. For architecture-level design, two cases are addressed: (I) Intra-cluster communication where we propose a low-latency interconnect with variability robustness (ii) Inter-cluster communication where an online functional testing with a reliable NoC configuration are proposed. We also propose dualVdd as an orthogonal way of compensating variability at the post-fabrication stage. This is an alternative strategy with respect to the design techniques, since it enforces the compensation at post silicon stage.

Social network e capitale sociale degli ex-ospiti di Comunita' Liberta': Drug free e ricaduti a confronto

L'indagine condotta, avvalendosi del paradigma della social network analysis, offre una descrizione delle reti di supporto personale e del capitale sociale di un campione di 80 italiani ex post un trattamento terapeutico residenziale di lungo termine per problemi di tossicodipendenza. Dopo aver identificato i profili delle reti di supporto sociale degli intervistati, si è proceduto, in primis, alla misurazione e comparazione delle ego-centered support networks tra soggetti drug free e ricaduti e, successivamente, all'investigazione delle caratteristiche delle reti e delle forme di capitale sociale – closure e brokerage – che contribuiscono al mantenimento dell'astinenza o al rischio di ricaduta nel post-trattamento. Fattori soggettivi, come la discriminazione pubblica percepita e l'attitudine al lavoro, sono stati inoltre esplorati al fine di investigare la loro correlazione con la condotta di reiterazione nell'uso di sostanze. Dai risultati dello studio emerge che un più basso rischio di ricaduta è positivamente associato ad una maggiore attitudine al lavoro, ad una minore percezione di discriminazione da parte della società, all'avere membri di supporto con un più alto status socio-economico e che mobilitano risorse reputazionali e, infine, all'avere reti più eterogenee nell'occupazione e caratterizzate da più elevati livelli di reciprocità. Inoltre, il capitale sociale di tipo brokerage contribuisce al mantenimento dell'astinenza in quanto garantisce l'accesso del soggetto ad informazioni meno omogenee e la sua esposizione a opportunità più numerose e differenziate. I risultati dello studio, pertanto, dimostrano l'importante ruolo delle personal support networks nel prevenire o ridurre il rischio di ricaduta nel post-trattamento, in linea con precedenti ricerche che suggeriscono la loro incorporazione nei programmi terapeutici per tossicodipendenti.