Low loss HF band SOI wine glass bulk mode capacitive square-plate resonator

This paper reports on the design and electrical characterization of a single crystal silicon micromechanical square-plate resonator. The microresonator has been excited in the anti-symmetrical wine glass mode at a resonant frequency of 5.166 MHz and exhibits an impressive quality factor (Q) of 3.7 × 106 at a pressure of 33 mtorr. The device has been fabricated in a commercial foundry process. An associated motional resistance of approximately 50 kΩ using a dc bias voltage of 60 V is measured for a transduction gap of 2 νm due to the ultra-high Q of the resonator. This result corresponds to a frequency-Q product of 1.9 × 1013, the highest reported for a fundamental mode single-crystal silicon resonator and on par with some of the best quartz crystal resonators. The results are indicative of the superior performance of silicon as a mechanical material, and show that the wine glass resonant mode is beneficial for achieving high quality factors allowed by the material limit. © 2009 IOP Publishing Ltd.

Electric characteristics of pseudo-spark during breakdown phase

An analysis of the time-dependent resistive voltage and power deposition during the breakdown phase of pseudo-spark is presented. The voltage and current were measured by specially designed low-inductance capacitive voltage divider and current measuring resistor. The measured waveforms of voltage and current are digitized and processed by a computer program to remove the inductive component, so as to obtain resistive voltage and power deposition. The influence of pressure, cathode geometry and charging voltage of storage capacitors on the electrical properties in the breakdown phase are investigated. The results suggest that the breakdown phase of pseudo-spark consists of three stages. The first stage is mainly hollow cathode discharge. In the second stage, field-enhanced thermionic emission takes place, resulting in a fast voltage drop and sharp rise of discharge current. The third stage of discharge depends simply on the parameters of the discharge circuit.

Flower Garden Banks National Marine Sanctuary: A rapid assessment of coral, fish, and algae using the AGRRA Protocol

The Flower Garden Banks are topographic features on the edge of the continental shelf in the northwest Gulf of Mexico. These banks are approximately 175 km southeast of Galveston, Texas at 28° north latitude and support the northernmost coral reefs on the North American continental shelf. The East and West Flower Garden Banks (EFG and WFG) and Stetson Bank, a smaller sandstone bank approximately 110 km offshore, are managed and protected as the Flower Garden Banks National Marine Sanctuary (FGBNMS). As part of a region-wide initiative to assess coral reef condition, the benthic and fish communities of the EFG and WFG were assessed using the Atlantic and Gulf Rapid Reef Assessment (AGRRA) protocol. The AGRRA survey was conducted during a week-long cruise in August 1999 that was jointly sponsored by the FGBNMS and the Reef Environmental Education Foundation (REEF). A total of 25 coral transects, 132 algal quadrats, 24 fish transects, and 26 Roving Diver (REEF) surveys were conducted. These surveys revealed reefs with high coral cover, dominated by large, healthy corals, little macroalgae, and healthy fish populations. The percent live coral cover was 53.9 and 48.8 at the WFG and EFG, respectively, and the average colony diameter was 93 and 81 cm. Fish diversity was lower than most Caribbean reefs, but large abundances and size of many species reflected the low fishing pressure on the banks. The benthic and fish assemblages at the EFG and WFG were similar. Due to its near pristine conditions, the FGB data will prove to be a valuable component in the AGRRA database and its resulting scale of reef condition for the region. (PDF contains 22 pages.)

Design, analysis and implementation of a versatile low level radio frequency system for accelerating cavities

179 p.

Effects of anode temperature on working characteristics and performance of a low power arcjet thruster

An arc-heated thruster of 130–800 W input power is tested in a vacuum chamber at pressures lower than 20 Pa with argon or H2–N2 gas mixture as propellant. The time-dependent arc voltage-current curve, outside-surface temperature of the anode nozzle and the produced thrust of the firing arcjet thruster are measured in situ simultaneously, in order to analyze and evaluate the dependence of thruster working characteristics and output properties, such as specific impulse and thrust efficiency, on nozzle temperature.

Dielectric recovery of short A-C arcs between low-boiling-point electrodes

The re-ignition characteristics (variation of re-ignition voltage with time after current zero) of short alternating current arcs between plane brass electrodes in air were studied by observing the average re-ignition voltages on the screen of a cathode-ray oscilloscope and controlling the rates of rise of voltage by varying the shunting capacitance and hence the natural period of oscillation of the reactors used to limit the current. The shape of these characteristics and the effects on them of varying the electrode separation, air pressure, and current strength were determined.

The results show that short arc spaces recover dielectric strength in two distinct stages. The first stage agrees in shape and magnitude with a previously developed theory that all voltage is concentrated across a partially deionized space charge layer which increases its breakdown voltage with diminishing density of ionization in the field-tree space. The second stage appears to follow complete deionization by the electric field due to displacement of the field-free region by the space charge layer, its magnitude and shape appearing to be due simply to increase in gas density due to cooling. Temperatures calculated from this second stage and ion densities determined from the first stage by means of the space charge equation and an extrapolation of the temperature curve are consistent with recent measurements of arc value by other methods. Analysis or the decrease with time of the apparent ion density shows that diffusion alone is adequate to explain the results and that volume recombination is not. The effects on the characteristics of variations in the parameters investigated are found to be in accord with previous results and with the theory if deionization mainly by diffusion be assumed.

A fully integrated 660 MHz low-swing energy-recycling DC-DC converter

A fully integrated 0.18 μm DC-DC buck converter using a low-swing "stacked driver" configuration is reported in this paper. A high switching frequency of 660 MHz reduces filter components to fit on chip, but this suffers from high switching losses. These losses are reduced using: 1) low-swing drivers; 2) supply stacking; and 3) introducing a charge transfer path to deliver excess charge from the positive metal-oxide semiconductor drive chain to the load, thereby recycling the charge. The working prototype circuit converts 2.2 to 0.75-1.0 V at 40-55 mA. Design and simulation of an improved circuit is also included that further improves the efficiency by enhancing the charge recycling path, providing automated zero voltage switching (ZVS) operation, and synchronizing the half-swing gating signals. © 2009 IEEE.

Development of an electric shrimp trawl 1. Reaction of shrimps to low volt direct current

Preliminary attempts were made to assess the effect of direct current on shrimps and to see whether the shrimp could be guided in large numbers into the fishing net by using a current of appropriate voltage without scattering them away as it happens at present. This communication is the first in the series of studies and primarily deals with laboratory equipment and experimental procedures followed.

Real-time experimental demonstration of low-cost VCSEL intensity-modulated 11.25 Gb/s optical OFDM signal transmission over 25 km PON systems.

The feasibility of utilising low-cost, un-cooled vertical cavity surface-emitting lasers (VCSELs) as intensity modulators in real-time optical OFDM (OOFDM) transceivers is experimentally explored, for the first time, in terms of achievable signal bit rates, physical mechanisms limiting the transceiver performance and performance robustness. End-to-end real-time transmission of 11.25 Gb/s 64-QAM-encoded OOFDM signals over simple intensity modulation and direct detection, 25 km SSMF PON systems is experimentally demonstrated with a power penalty of 0.5 dB. The low extinction ratio of the VCSEL intensity-modulated OOFDM signal is identified to be the dominant factor determining the maximum obtainable transmission performance. Experimental investigations indicate that, in addition to the enhanced transceiver performance, adaptive power loading can also significantly improve the system performance robustness to variations in VCSEL operating conditions. As a direct result, the aforementioned capacity versus reach performance is still retained over a wide VCSEL bias (driving) current (voltage) range of 4.5 mA to 9 mA (275 mVpp to 320 mVpp). This work is of great value as it demonstrates the possibility of future mass production of cost-effective OOFDM transceivers for PON applications.

Metastability mechanisms in thin film transistors quantitatively resolved using post-stress relaxation of threshold voltage

A new approach is presented to resolve bias-induced metastability mechanisms in hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs). The post stress relaxation of threshold voltage (V(T)) was employed to quantitatively distinguish between the charge trapping process in gate dielectric and defect state creation in active layer of transistor. The kinetics of the charge de-trapping from the SiN traps is analytically modeled and a Gaussian distribution of gap states is extracted for the SiN. Indeed, the relaxation in V(T) is in good agreement with the theory underlying the kinetics of charge de-trapping from gate dielectric. For the TFTs used in this work, the charge trapping in the SiN gate dielectric is shown to be the dominant metastability mechanism even at bias stress levels as low as 10 V.

Dual gate photo-thin film transistor with high photoconductive gain for high reliability, and low noise flat panel transparent imager

In this presentation, we report excellent electrical and optical characteristics of a dual gate photo thin film transistor (TFT) with bi-layer oxide channel, which was designed to provide virgin threshold voltage (V T) control, improve the negative bias illumination temperature stress (NBITS) reliability, and offer high photoconductive gain. In order to address the photo-sensitivity of phototransistor for the incoming light, top transparent InZnO (IZO) gate was employed, which enables the independent gate control of dual gate photo-TFT without having any degradation of its photosensitivity. Considering optimum initial V T and NBITS reliability for the device operation, the top gate bias was judiciously chosen. In addition, the speed and noise performance of the photo-TFT is competitive with silicon photo-transistors, and more importantly, its superiority lies in optical transparency. © 2011 IEEE.

Low partial pressure chemical vapor deposition of graphene on copper

A systematic study of the Cu-catalyzed chemical vapor deposition of graphene under extremely low partial pressure is carried out. A carbon precursor supply of just P CH4∼ 0.009 mbar during the deposition favors the formation of large-area uniform monolayer graphene verified by Raman spectra. A diluted HNO 3 solution is used to remove Cu before transferring graphene onto SiO 2/Si substrates or carbon grids. The graphene can be made suspended over a ∼12 μm distance, indicating its good mechanical properties. Electron transport measurements show the graphene sheet resistance of ∼0.6 kΩ/□ at zero gate voltage. The mobilities of electrons and holes are ∼1800 cm 2/Vs at 4.2 K and ∼1200 cm 2/Vs at room temperature. © 2011 IEEE.

Near-ultraviolet zinc oxide nanowire sensor using low temperature hydrothermal growth.

Two near-ultraviolet (UV) sensors based on solution-grown zinc oxide (ZnO) nanowires (NWs) which are only sensitive to photo-excitation at or below 400 nm wavelength have been fabricated and characterized. Both devices keep all processing steps, including nanowire growth, under 100 °C for compatibility with a wide variety of substrates. The first device type uses a single optical lithography step process to allow simultaneous in situ horizontal NW growth from solution and creation of symmetric ohmic contacts to the nanowires. The second device type uses a two-mask optical lithography process to create asymmetric ohmic and Schottky contacts. For the symmetric ohmic contacts, at a voltage bias of 1 V across the device, we observed a 29-fold increase in current in comparison to dark current when the NWs were photo-excited by a 400 nm light-emitting diode (LED) at 0.15 mW cm(-2) with a relaxation time constant (τ) ranging from 50 to 555 s. For the asymmetric ohmic and Schottky contacts under 400 nm excitation, τ is measured between 0.5 and 1.4 s over varying time internals, which is ~2 orders of magnitude faster than the devices using symmetric ohmic contacts.

Compact three-dimensional silicon termination solutions for high voltage SOI SuperJunction

This paper demonstrates and discusses novel "three dimensional" silicon based junction isolation/termination solutions suitable for high density ultra-low-resistance Lateral Super-Junction structures. The proposed designs are both compact and effective in safely distributing the electrostatic potential away from the active device area. The designs are based on the utilization of existing layers in the device fabrication line, hence resulting in no extra complexity or cost increase. The study/demonstration is done through extensive experimental measurements and numerical simulations. © 2012 IEEE.

Energy recycling from multigigahertz clocks using fully integrated switching converters

Large digital chips use a significant amount of energy to broadcast a low-skew, multigigahertz clock to millions of latches located throughout the chip. Every clock cycle, the large aggregate capacitance of the clock network is charged from the supply and then discharged to ground. Instead of wasting this stored energy, it is possible to recycle the energy by controlling its delivery to another part of the chip using an on-chip dc-dc converter. The clock driver and switching converter circuits share many compatible characteristics that allow them to be merged into a single design and fully integrated on-chip. Our buck converter prototype, manufactured in 90-nm CMOS, provides a proof-of-concept that clock network energy can be recycled to other parts of the chip, thus lowering overall energy consumption. It also confirms that monolithic multigigahertz switching converters utilizing zero-voltage switching can be implemented in deep-submicrometer CMOS. With multigigahertz operation, fully integrated inductors and capacitors use a small amount of chip area with low losses. Combining the clock driver with the power converter can share the large MOSFET drivers necessary as well as being energy and space efficient. We present an analysis of the losses which we confirm by experimentally comparing the merged circuit with a conventional clock driver. © 2012 IEEE.