Characterisation of Large Disturbance Rotor Angle and Voltage Stability in Interconnected Power Networks with Distributed Wind Generation

Wind generation in highly interconnected power networks creates local and centralised stability issues based on their proximity to conventional synchronous generators and load centres. This paper examines the large disturbance stability issues (i.e. rotor angle and voltage stability) in power networks with geographically distributed wind resources in the context of a number of dispatch scenarios based on profiles of historical wind generation for a real power network. Stability issues have been analysed using novel stability indices developed from dynamic characteristics of wind generation. The results of this study show that localised stability issues worsen when significant penetration of both conventional and wind generation is present due to their non-complementary characteristics. In contrast, network stability improves when either high penetration of wind and synchronous generation is present in the network. Therefore, network regions can be clustered into two distinct stability groups (i.e. superior stability and inferior stability regions). Network stability improves when a voltage control strategy is implemented at wind farms, however both stability clusters remain unchanged irrespective of change in the control strategy. Moreover, this study has shown that the enhanced fault ride-through (FRT) strategy for wind farms can improve both voltage and rotor angle stability locally, but only a marginal improvement is evident in neighbouring regions.

Effects of menthol on rat tail artery mediated by TRPM8 and voltage-gated calcium channels

Transient receptor potential melastatin 8 (TRPM8) is the principal cold and menthol receptor channel. Characterized primarily for its cold sensing role in sensory neurons, it is expressed and functional in several non-neuronal tissues, including vasculature. We previously demonstrated that menthol causes vasoconstriction and vasodilatation in isolated arteries, depending on vascular tone. Here we investigated calcium's role in responses mediated by TRPM8 ligands in rat tail artery myocytes using patch-clamp electrophysiology and ratiometric Ca2+ recording. Isometric contraction studies examined actions of TRPM8 ligands in the presence/absence of L-type calcium channel blocker. Menthol (300 μM), a concentration typically used to induce TRPM8 currents, strongly inhibited L-type voltage-dependent Ca2+ current (L-ICa) in myocytes, especially it's sustained component, most relevant for depolarisation-induced vasoconstriction. In contraction studies, with nifedipine present (10 μM) to abolish L-ICa contribution to phenylephrine (PE)-induced vasoconstrictions of vascular rings, a marked increase in tone was observed with menthol. Menthol-induced increases in PE-induced vasoconstrictions were mediated predominantly by Ca2+-release from sarcoplasmic reticulum, since they were significantly inhibited by cyclopiazonic acid. Pre-incubation of vascular rings with a TRPM8 antagonist strongly inhibited menthol-induced increases in PE-induced vasoconstrictions, thus confirming specific role of TRPM8. Finally, two other common TRPM8 agonists, WS-12 and icilin, inhibited L-ICa. Thus, TRPM8 channels are functionally active in rat tail artery myocytes and play a distinct direct stimulatory role in control of vascular tone. However, indirect effects of TRPM8 agonists, which are unrelated to TRPM8, are mediated by inhibition of L-type Ca2+ channels, and largely obscure TRPM8-mediated vasoconstriction.

410 - Phase transitions induced by coloured voltage noise in nerve membranes

Quantitative conditions are derived under which electrically excitable membranes can undergo a phase transition induced by an externally applied voltage noise. The results obtained for a non-cooperative and a cooperative form of the two-state model are compared. © 1981.

Digital nonlinear equalization for optical transmission systems

This thesis focuses on digital equalization of nonlinear fiber impairments for coherent optical transmission systems. Building from well-known physical models of signal propagation in single-mode optical fibers, novel nonlinear equalization techniques are proposed, numerically assessed and experimentally demonstrated. The structure of the proposed algorithms is strongly driven by the optimization of the performance versus complexity tradeoff, envisioning the near-future practical application in commercial real-time transceivers. The work is initially focused on the mitigation of intra-channel nonlinear impairments relying on the concept of digital backpropagation (DBP) associated with Volterra-based filtering. After a comprehensive analysis of the third-order Volterra kernel, a set of critical simplifications are identified, culminating in the development of reduced complexity nonlinear equalization algorithms formulated both in time and frequency domains. The implementation complexity of the proposed techniques is analytically described in terms of computational effort and processing latency, by determining the number of real multiplications per processed sample and the number of serial multiplications, respectively. The equalization performance is numerically and experimentally assessed through bit error rate (BER) measurements. Finally, the problem of inter-channel nonlinear compensation is addressed within the context of 400 Gb/s (400G) superchannels for long-haul and ultra-long-haul transmission. Different superchannel configurations and nonlinear equalization strategies are experimentally assessed, demonstrating that inter-subcarrier nonlinear equalization can provide an enhanced signal reach while requiring only marginal added complexity.

Low-power high-performance SAR ADC design with digital calibration techniques

This dissertation presents the design of three high-performance successive-approximation-register (SAR) analog-to-digital converters (ADCs) using distinct digital background calibration techniques under the framework of a generalized code-domain linear equalizer. These digital calibration techniques effectively and efficiently remove the static mismatch errors in the analog-to-digital (A/D) conversion. They enable aggressive scaling of the capacitive digital-to-analog converter (DAC), which also serves as sampling capacitor, to the kT/C limit. As a result, outstanding conversion linearity, high signal-to-noise ratio (SNR), high conversion speed, robustness, superb energy efficiency, and minimal chip-area are accomplished simultaneously. The first design is a 12-bit 22.5/45-MS/s SAR ADC in 0.13-μm CMOS process. It employs a perturbation-based calibration based on the superposition property of linear systems to digitally correct the capacitor mismatch error in the weighted DAC. With 3.0-mW power dissipation at a 1.2-V power supply and a 22.5-MS/s sample rate, it achieves a 71.1-dB signal-to-noise-plus-distortion ratio (SNDR), and a 94.6-dB spurious free dynamic range (SFDR). At Nyquist frequency, the conversion figure of merit (FoM) is 50.8 fJ/conversion step, the best FoM up to date (2010) for 12-bit ADCs. The SAR ADC core occupies 0.06 mm2, while the estimated area the calibration circuits is 0.03 mm2. The second proposed digital calibration technique is a bit-wise-correlation-based digital calibration. It utilizes the statistical independence of an injected pseudo-random signal and the input signal to correct the DAC mismatch in SAR ADCs. This idea is experimentally verified in a 12-bit 37-MS/s SAR ADC fabricated in 65-nm CMOS implemented by Pingli Huang. This prototype chip achieves a 70.23-dB peak SNDR and an 81.02-dB peak SFDR, while occupying 0.12-mm2 silicon area and dissipating 9.14 mW from a 1.2-V supply with the synthesized digital calibration circuits included. The third work is an 8-bit, 600-MS/s, 10-way time-interleaved SAR ADC array fabricated in 0.13-μm CMOS process. This work employs an adaptive digital equalization approach to calibrate both intra-channel nonlinearities and inter-channel mismatch errors. The prototype chip achieves 47.4-dB SNDR, 63.6-dB SFDR, less than 0.30-LSB differential nonlinearity (DNL), and less than 0.23-LSB integral nonlinearity (INL). The ADC array occupies an active area of 1.35 mm2 and dissipates 30.3 mW, including synthesized digital calibration circuits and an on-chip dual-loop delay-locked loop (DLL) for clock generation and synchronization.

Projeto, implementação e análise de um conversor CC-CC de alto ganho e alto rendimento para aplicações fotovoltaicas

In recent years the photovoltaic generation has had greater insertion in the energy mix of the most developed countries, growing at annual rates of over 30%. The pressure for the reduction of pollutant emissions, diversification of the energy mix and the drop in prices are the main factors driving this growth. Grid tied systems plays an important role in alleviating the energy crisis and diversification of energy sources. Among the grid tied systems, building integrated photovoltaic systems suffers from partial shading of the photovoltaic modules and consequently the energy yield is reduced. In such cases, classical forms of modules connection do not produce good results and new techniques have been developed to increase the amount of energy produced by a set of modules. In the parallel connection technique of photovoltaic modules, a high voltage gain DC-DC converter is required, which is relatively complex to build with high efficiency. The current-fed isolated converters explored in this work have some desirable characteristics for this type of application, such as: low input current ripple and input voltage ripple, high voltage gain, galvanic isolation, feature high power capacity and it achieve soft switching in a wide operating range. This study presents contributions to the study of a high gain and high efficiency DC-DC converter for use in a parallel system of photovoltaic generation, being possible the use in a microinverter or with central inverter. The main contributions of this work are: analysis of the active clamping circuit operation proposing that the clamp capacitor connection must be done on the negative node of the power supply to reduce the input current ripple and thus reduce the filter requirements; use of a voltage doubler in the output rectifier to reduce the number of components and to extend the gain of the converter; detailed study of the converter components in order to raise the efficiency; obtaining the AC equivalent model and control system design. As a result, a DC-DC converter with high gain, high efficiency and without electrolytic capacitors in the power stage was developed. In the final part of this work the DC-DC converter operation connected to an inverter is presented. Besides, the DC bus controller is designed and are implemented two maximum power point tracking algorithms. Experimental results of full system operation connected to an emulator and subsequently to a real photovoltaic module are also given.

Fabrication and Pseudo-Analog Characteristics of Ta2O5 -Based ReRAM Cell

Memristori on yksi elektroniikan peruskomponenteista vastuksen, kondensaattorin ja kelan lisäksi. Se on passiivinen komponentti, jonka teorian kehitti Leon Chua vuonna 1971. Kesti kuitenkin yli kolmekymmentä vuotta ennen kuin teoria pystyttiin yhdistämään kokeellisiin tuloksiin. Vuonna 2008 Hewlett Packard julkaisi artikkelin, jossa he väittivät valmistaneensa ensimmäisen toimivan memristorin. Memristori eli muistivastus on resistiivinen komponentti, jonka vastusarvoa pystytään muuttamaan. Nimens mukaisesti memristori kykenee myös säilyttämään vastusarvonsa ilman jatkuvaa virtaa ja jännitettä. Tyypillisesti memristorilla on vähintään kaksi vastusarvoa, joista kumpikin pystytään valitsemaan syöttämällä komponentille jännitettä tai virtaa. Tämän vuoksi memristoreita kutsutaankin usein resistiivisiksi kytkimiksi. Resistiivisiä kytkimiä tutkitaan nykyään paljon erityisesti niiden mahdollistaman muistiteknologian takia. Resistiivisistä kytkimistä rakennettua muistia kutsutaan ReRAM-muistiksi (lyhenne sanoista resistive random access memory). ReRAM-muisti on Flash-muistin tapaan haihtumaton muisti, jota voidaan sähköisesti ohjelmoida tai tyhjentää. Flash-muistia käytetään tällä hetkellä esimerkiksi muistitikuissa. ReRAM-muisti mahdollistaa kuitenkin nopeamman ja vähävirtaiseman toiminnan Flashiin verrattuna, joten se on tulevaisuudessa varteenotettava kilpailija markkinoilla. ReRAM-muisti mahdollistaa myös useammin bitin tallentamisen yhteen muistisoluun binäärisen (”0” tai ”1”) toiminnan sijaan. Tyypillisesti ReRAM-muistisolulla on kaksi rajoittavaa vastusarvoa, mutta näiden kahden tilan välille pystytään mahdollisesti ohjelmoimaan useampia tiloja. Muistisoluja voidaan kutsua analogisiksi, jos tilojen määrää ei ole rajoitettu. Analogisilla muistisoluilla olisi mahdollista rakentaa tehokkaasti esimerkiksi neuroverkkoja. Neuroverkoilla pyritään mallintamaan aivojen toimintaa ja suorittamaan tehtäviä, jotka ovat tyypillisesti vaikeita perinteisille tietokoneohjelmille. Neuroverkkoja käytetään esimerkiksi puheentunnistuksessa tai tekoälytoteutuksissa. Tässä diplomityössä tarkastellaan Ta2O5 -perustuvan ReRAM-muistisolun analogista toimintaa pitäen mielessä soveltuvuus neuroverkkoihin. ReRAM-muistisolun valmistus ja mittaustulokset käydään läpi. Muistisolun toiminta on harvoin täysin analogista, koska kahden rajoittavan vastusarvon välillä on usein rajattu määrä tiloja. Tämän vuoksi toimintaa kutsutaan pseudoanalogiseksi. Mittaustulokset osoittavat, että yksittäinen ReRAM-muistisolu kykenee binääriseen toimintaan hyvin. Joiltain osin yksittäinen solu kykenee tallentamaan useampia tiloja, mutta vastusarvoissa on peräkkäisten ohjelmointisyklien välillä suurta vaihtelevuutta, joka hankaloittaa tulkintaa. Valmistettu ReRAM-muistisolu ei sellaisenaan kykene toimimaan pseudoanalogisena muistina, vaan se vaati rinnalleen virtaa rajoittavan komponentin. Myös valmistusprosessin kehittäminen vähentäisi yksittäisen solun toiminnassa esiintyvää varianssia, jolloin sen toiminta muistuttaisi enemmän pseudoanalogista muistia.

Estudo e desenvolvimento de um capacitor eletrolítico de nióbio

It seeks to find an alternative to the current tantalum electrolytic capacitors in the market due to its high cost. Niobium is a potential substitute, since both belong to the same group of the periodic table and because of this have many similar physical and chemical properties. Niobium has several technologically important applications, and Brazil has the largest reserves, around 96%. There are including niobium in reserves of tantalite and columbite in Rio Grande do Norte. These electrolytic capacitors have high capacitance specifies, ie they can store high energy in small volumes compared to other types of capacitors. This is the main attraction of this type of capacitor because is growing demand in the production of capacitors with capacitance specifies increasingly high, this because of the miniaturization of various devices such as GPS devices, televisions, computers, phones and many others. The production route of the capacitor was made by powder metallurgy. The initial niobium powder supplied by EEL-USP was first characterized by XRD, SEM, XRF and laser particle size, to then be sieved into three particle size, 200, 400 e 635mesh. The powders were then compacted and sintered at 1350, 1450 and 1550°C using two sintering time 30 and 60min. Sintering is one of the most important parts of the process as it affects properties as porosity and surface cleaning of the samples, which greatly affected the quality of the capacitor. The sintered samples then underwent a process of anodic oxidation, which created a thin film of niobium pentóxido over the whole porous surface of the sample, this film is the dielectric capacitor. The oxidation process variables influence the performance of the film and therefore the capacitor. The samples were characterized by electrical measurements of capacitance, loss factor, ESR, relative density, porosity and surface area. After the characterizations was made an annealing in air ate 260ºC for 60min. After this treatment were made again the electrical measurements. The particle size of powders and sintering affected the porosity and in turn the specific area of the samples. The larger de area of the capacitor, greater is the capacitance. The powder showed the highest capacitance was with the smallest particle size. Higher temperatures and times of sintering caused samples with smaller surface area, but on the other hand the cleaning surface impurities was higher for this cases. So a balance must be made between the gain that is achieved with the cleaning of impurities and the loss with the decreased in specific area. The best results were obtained for the temperature of 1450ºC/60min. The influence of annealing on the loss factor and ESR did not follow a well-defined pattern, because their values increased in some cases and decreased in others. The most interesting results due to heat treatment were with respect to capacitance, which showed an increase for all samples after treatment

Voltage and current spectra for matrix power converters

Matrix power converters are used for transforming one alternating-current power supply to another, with different peak voltage and frequency. There are three input lines, with sinusoidally varying voltages which are 120◦ out of phase one from another, and the output is to be delivered as a similar three-phase supply. The matrix converter switches rapidly, to connect each output line in sequence to each of the input lines in an attempt to synthesize the prescribed output voltages. The switching is carried out at high frequency and it is of practical importance to know the frequency spectra of the output voltages and of the input and output currents. We determine in this paper these spectra using a new method, which has significant advantages over the prior default method (a multiple Fourier series technique), leading to a considerably more direct calculation. In particular, the determination of the input current spectrum is feasible here, whereas it would be a significantly more daunting procedure using the prior method instead.

Interface properties and capacitance-voltage behaviour of diamond devices prepared by microwave-assisted CVD

Free standing diamond films were used to study the effect of diamond surface morphology and microstructure on the electrical properties of Schottky barrier diodes. By using free standing films both the rough top diamond surface and the very smooth bottom surface are available for post-metal deposition. Rectifying electrical contacts were then established either with the smooth or the rough surface. The estimate of doping density from the capacitance-voltage plots shows that the smooth surface has a lower doping density when compared with the top layers of the same film. The results also show that surface roughness does not contribute significantly to the frequency dispersion of the small signal capacitance. The electrical properties of an abrupt asymmetric n(+)(silicon)-p(diamond) junction have also been measured. The I-V curves exhibit at low temperatures a plateau near zero bias, and show inversion of rectification. Capacitance-voltage characteristics show a capacitance minimum with forward bias, which is dependent on the environment conditions. It is proposed that this anomalous effect arises from high level injection of minority carriers into the bulk.