868 resultados para Cache Memories


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This article attempts to analyze the definition of "electronic literature" as given by the Electronic Literature Organization and to understand the relationship between electronic literature and digital literature. The thesis defended here is that this change of adjective hides a change in the theoretical status of the object that it attempts to define. The definition of electronic literature once concentrated on the tools used in the production of literary works and the critical analysis concentrating on the objects produced with the aid of new technologies. The move to the adjective "digital" marks a change in perception: now, from this perspective, the challenge is no longer to study works produced thanks to computers, but to understand the new status of literature in the age of the digital. To demonstrate this thesis, the article proposes to analyze one recent literary example: the 1984 trilogy by Eric Plamondon.

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Pour comprendre l’origine des différentes interprétations féministes portant sur la famille et le patriarcat chez Hobbes, il faut avoir pour clé de lecture la double compréhension possible de l’état de nature. Une première lecture fait de l’état de nature un outil démonstratif dans un système logique, alors qu’une seconde lecture en fait une hypothèse historique sur la genèse de nos institutions. Comprendre la distinction entre une lecture purement logique et une lecture plus historisante de l’état de nature peut permettre une meilleure compréhension des différentes interprétations féministes. En effet, nous tenterons de démontrer que derrière ces positions polarisées se cache une lecture différente de l’état de nature chez Hobbes.

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La déficience intellectuelle est la cause d’handicap la plus fréquente chez l’enfant. De nombreuses évidences convergent vers l’idée selon laquelle des altérations dans les gènes synaptiques puissent expliquer une fraction significative des affections neurodéveloppementales telles que la déficience intellectuelle ou encore l’autisme. Jusqu’à récemment, la majorité des mutations associées à la déficience intellectuelle a été liée au chromosome X ou à la transmission autosomique récessive. D’un autre côté, plusieurs études récentes suggèrent que des mutations de novo dans des gènes à transmission autosomique dominante, requis dans les processus de la plasticité synaptique peuvent être à la source d’une importante fraction des cas de déficience intellectuelle non syndromique. Par des techniques permettant la capture de l’exome et le séquençage de l’ADN génomique, notre laboratoire a précédemment reporté les premières mutations pathogéniques dans le gène à transmission autosomique dominante SYNGAP1. Ces dernières ont été associées à des troubles comportementaux tels que la déficience intellectuelle, l’inattention, des problèmes d’humeur, d’impulsivité et d’agressions physiques. D’autres patients sont diagnostiqués avec des troubles autistiques et/ou des formes particulières d’épilepsie généralisée. Chez la souris, le knock-out constitutif de Syngap1 (souris Syngap1+/-) résulte en des déficits comme l’hyperactivité locomotrice, une réduction du comportement associée à l’anxiété, une augmentation du réflexe de sursaut, une propension à l’isolation, des problèmes dans le conditionnement à la peur, des troubles dans les mémoires de travail, de référence et social. Ainsi, la souris Syngap1+/- représente un modèle approprié pour l’étude des effets délétères causés par l’haploinsuffisance de SYNGAP1 sur le développement de circuits neuronaux. D’autre part, il est de première importance de statuer si les mutations humaines aboutissent à l’haploinsuffisance de la protéine. SYNGAP1 encode pour une protéine à activité GTPase pour Ras. Son haploinsuffisance entraîne l’augmentation des niveaux d’activité de Ras, de phosphorylation de ERK, cause une morphogenèse anormale des épines dendritiques et un excès dans la concentration des récepteurs AMPA à la membrane postsynaptique des neurones excitateurs. Plusieurs études suggèrent que l’augmentation précoce de l’insertion des récepteurs AMPA au sein des synapses glutamatergiques contribue à certains phénotypes observés chez la souris Syngap1+/-. En revanche, les conséquences de l’haploinsuffisance de SYNGAP1 sur les circuits neuronaux GABAergiques restent inconnues. Les enjeux de mon projet de PhD sont: 1) d’identifier l’impact de mutations humaines dans la fonction de SYNGAP1; 2) de déterminer si SYNGAP1 contribue au développement et à la fonction des circuits GABAergiques; 3) de révéler comment l’haploinsuffisance de Syngap1 restreinte aux circuits GABAergiques affecte le comportement et la cognition. Nous avons publié les premières mutations humaines de type faux-sens dans le gène SYNGAP1 (c.1084T>C [p.W362R]; c.1685C>T [p.P562L]) ainsi que deux nouvelles mutations tronquantes (c.2212_2213del [p.S738X]; c.283dupC [p.H95PfsX5]). Ces dernières sont toutes de novo à l’exception de c.283dupC, héritée d’un père mosaïque pour la même mutation. Dans cette étude, nous avons confirmé que les patients pourvus de mutations dans SYNGAP1 présentent, entre autre, des phénotypes associés à des troubles comportementaux relatifs à la déficience intellectuelle. En culture organotypique, la transfection biolistique de l’ADNc de Syngap1 wild-type dans des cellules pyramidales corticales réduit significativement les niveaux de pERK, en fonction de l’activité neuronale. Au contraire les constructions plasmidiques exprimant les mutations W362R, P562L, ou celle précédemment répertoriée R579X, n’engendre aucun effet significatif sur les niveaux de pERK. Ces résultats suggèrent que ces mutations faux-sens et tronquante résultent en la perte de la fonction de SYNGAP1 ayant fort probablement pour conséquences d’affecter la régulation du développement cérébral. Plusieurs études publiées suggèrent que les déficits cognitifs associés à l’haploinsuffisance de SYNGAP1 peuvent émerger d’altérations dans le développement des neurones excitateurs glutamatergiques. Toutefois, si, et auquel cas, de quelle manière ces mutations affectent le développement des interneurones GABAergiques résultant en un déséquilibre entre l’excitation et l’inhibition et aux déficits cognitifs restent sujet de controverses. Par conséquent, nous avons examiné la contribution de Syngap1 dans le développement des circuits GABAergiques. A cette fin, nous avons généré une souris mutante knockout conditionnelle dans laquelle un allèle de Syngap1 est spécifiquement excisé dans les interneurones GABAergiques issus de l’éminence ganglionnaire médiale (souris Tg(Nkx2.1-Cre);Syngap1flox/+). En culture organotypique, nous avons démontré que la réduction de Syngap1 restreinte aux interneurones inhibiteurs résulte en des altérations au niveau de leur arborisation axonale et dans leur densité synaptique. De plus, réalisés sur des coupes de cerveau de souris Tg(Nkx2.1-Cre);Syngap1flox/+, les enregistrements des courants inhibiteurs postsynaptiques miniatures (mIPSC) ou encore de ceux évoqués au moyen de l’optogénétique (oIPSC) dévoilent une réduction significative de la neurotransmission inhibitrice corticale. Enfin, nous avons comparé les performances de souris jeunes adultes Syngap1+/-, Tg(Nkx2.1-Cre);Syngap1flox/+ à celles de leurs congénères contrôles dans une batterie de tests comportementaux. À l’inverse des souris Syngap1+/-, les souris Tg(Nkx2.1-Cre);Syngap1flox/+ ne présentent pas d’hyperactivité locomotrice, ni de comportement associé à l’anxiété. Cependant, elles démontrent des déficits similaires dans la mémoire de travail et de reconnaissance sociale, suggérant que l’haploinsuffisance de Syngap1 restreinte aux interneurones GABAergiques dérivés de l’éminence ganglionnaire médiale récapitule en partie certains des phénotypes cognitifs observés chez la souris Syngap1+/-. Mes travaux de PhD établissent pour la première fois que les mutations humaines dans le gène SYNGAP1 associés à la déficience intellectuelle causent la perte de fonction de la protéine. Mes études dévoilent, également pour la première fois, l’influence significative de ce gène dans la régulation du développement et de la fonction des interneurones. D’admettre l’atteinte des cellules GABAergiques illustre plus réalistement la complexité de la déficience intellectuelle non syndromique causée par l’haploinsuffisance de SYNGAP1. Ainsi, seule une compréhension raffinée de cette condition neurodéveloppementale pourra mener à une approche thérapeutique adéquate.

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Polymer materials find application in optical storage technology, namely in the development of high information density and fast access type memories. A new polymer blend of methylene blue sensitized polyvinyl alcohol (PVA) and polyacrylic acid (PAA) in methanol is prepared and characterized and its comparison with methylene blue sensitized PVA in methanol and complexed methylene blue sensitized polyvinyl chloride (CMBPVC) is presented. The optical absorption spectra of the thin films of these polymers showed a strong and broad absorption region at 670-650 nm, matching the wavelength of the laser used. A very slow recovery of the dye on irradiation was observed when a 7:3 blend of polyvinyl alcohol/polyacrylic acid at a pHof 3.8 and a sensitizer concentration of 4.67 10 5 g/ml were used. A diffraction efficiency of up to 20% was observed for the MBPVA/alcohol system and an energetic sensitivity of 2000 mJ/cm2 was obtained in the photosensitive films with a spatial frequency of 588 lines/mm.

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Polymer materials find application in optical storage technology, namely in the development of high information density and fast access type memories. A new polymer blend of methylene blue sensitized polyvinyl alcohol (PVA) and polyacrylic acid (PAA) in methanol is prepared and characterized and its comparison with methylene blue sensitized PVA in methanol and complexed methylene blue sensitized polyvinyl chloride (CMBPVC) is presented. The optical absorption spectra of the thin films of these polymers showed a strong and broad absorption region at 670-650 nm, matching the wavelength of the laser used. A very slow recovery of the dye on irradiation was observed when a 7:3 blend of polyvinyl alcohol/polyacrylic acid at a pHof 3.8 and a sensitizer concentration of 4.67 10 5 g/ml were used. A diffraction efficiency of up to 20% was observed for the MBPVA/alcohol system and an energetic sensitivity of 2000 mJ/cm2 was obtained in the photosensitive films with a spatial frequency of 588 lines/mm.

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Magnetism and magnetic materials have been an ever-attractive subject area for engineers and scientists alike because of its versatility in finding applications in useful devices. They find applications in a host of devices ranging from rudimentary devices like loud speakers to sophisticated gadgets like waveguides and Magnetic Random Access Memories (MRAM).The one and only material in the realm of magnetism that has been at the centre stage of applications is ferrites and in that spinel ferrites received the lions share as far as practical applications are concerned.It has been the endeavour of scientists and engineers to remove obsolescence and improve upon the existing so as to save energy and integrate in to various other systems. This has been the hallmark of material scientists and this has led to new materials and new technologies.In the field of ferrites too there has been considerable interest to devise new materials based on iron oxides and other compounds. This means synthesising ultra fine particles and tuning its properties to device new materials. There are various preparation techniques ranging from top- down to bottom-up approaches. This includes synthesising at molecular level, self assembling,gas based condensation. Iow temperature eo-precipitation, solgel process and high energy ball milling. Among these methods sol-gel process allows good control of the properties of ceramic materials. The advantage of this method includes processing at low temperature. mixing at the molecular level and fabrication of novel materials for various devices.Composites are materials. which combine the good qualities of one or more components. They can be prepared in situ or by mechanical means by the incorporation of fine particles in appropriate matrixes. The size of the magnetic powders as well as the nature of matrix affect the processability and other physical properties of the final product. These plastic/rubber magnets can in turn be useful for various applications in different devices. In applications involving ferrites at high frequencies, it is essential that the material possesses an appropriate dielectric permittivity and suitable magnetic permeability. This can be achieved by synthesizing rubber ferrite composites (RFC's). RFCs are very useful materials for microwave absorptions. Hence the synthesis of ferrites in the nanoregirne.investigations on their size effects on the structural, magnetic, and electrical properties and the incorporation of these ferrites into polymer matrixes assume significance.In the present study, nano particles of NiFe204, Li(!5Fe2S04 and Col-e-O, are prepared by sol gel method. By appropriate heat treatments, particles of different grain sizes are obtained. The structural, magnetic and electrical measurements are evaluated as a function of grain size and temperature. NiFel04 prepared in the ultrafine regime are then incorporated in nitrile rubber matrix. The incorporation was carried out according to a specific recipe and for various loadings of magnetic fillers. The cure characteristics, magnetic properties, electrical properties and mechanical properties of these elastomer blends are carried out. The electrical permittivity of all the rubber samples in the X - band are also conducted.

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This thesis has discussed the development of a new metal ion doped panchromatic photopolymer for various holographic applications. High-quality panchromatic holographic recording material with high diffraction efficiency, high photosensitivity and high spatial resolution is one of the key factors for the successful recording of true colour holograms. The capability of the developed material for multicolour holography can be investigated.In the present work, multiplexing studies were carried out using He-Ne laser (632.8 nm). Multiplexing can be done using low wavelength lasers like Ar+ ion (488 nm) and frequency doubled Nd: YAG (532 nm) lasers, so as to increase the storage capacity. The photopolymer film studied had a thickness of only 130 Cm. Films with high thickness (~500 Cm) is highly essential for competitive holographic memories . Hence films with high thickness can be fabricated and efforts can be made to record more holograms or gratings in the material.In the present study, attempts were made to record data page in silver doped MBPVA/AA photopolymer film. Image of a checkerboard pattern was recorded in the film, which could be reconstructed with good image fidelity. Efforts can be made to determine the bit error rate (BER) which provides a quantitative measure of the image quality of the reconstructed image . Multiple holographic data pages can also be recorded in the material making use of different multiplexing techniques.Holographic optical elements (HOEs) are widely used in optical sensors, optical information processing, fibre optics, optical scanners and solar concentrators . The suitability of the developed film for recording holographic optical elements like lenses, beam splitters and filters can be studied.The suitability of a reflection hologram recorded in acrylamide based photopolymer for visual indication of environmental humidity is reported . Studies can be done to optimize the film composition for recording of reflection holograms.An improvement in the spatial resolution of PVA/acrylamide based photopolymer by using a low molecular-weight poly (vinyl alcohol) binder was recently reported . Effect of the molecular weight of the binder matrix on the holographic properties of the developed photopolymer system can be investigated.Incorporation of nanoparticles into photopolymer system is reported to enhance the resolution and improve the dimensional stability of the system . Hence efforts can be made to incorporate silver nanoparticles into the photopolymer and its influence on the holographic properties can be studied.This thesis was a small venture towards the realization of a big goal, a competent holographic recording material with excellent properties for practical holographic applications. As a result of the present research, we could successfully develop an efficient panchromatic photopolymer system and could demonstrate its suitability for recording transmission holograms and holographic data page. The developed photopolymer system is expected to have significant applications in the fields of true-color display holography, wavelength multiplexing holographic storage, and holographic optical elements. Highly concentrated and determined effort has yet to be put forth for this expectation to become a reality.

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Data caching can remarkably improve the efficiency of information access in a wireless ad hoc network by reducing the access latency and bandwidth usage. The cache placement problem minimizes total data access cost in ad hoc networks with multiple data items. The ad hoc networks are multi hop networks without a central base station and are resource constrained in terms of channel bandwidth and battery power. By data caching the communication cost can be reduced in terms of bandwidth as well as battery energy. As the network node has limited memory the problem of cache placement is a vital issue. This paper attempts to study the existing cooperative caching techniques and their suitability in mobile ad hoc networks.

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Cache look up is an integral part of cooperative caching in ad hoc networks. In this paper, we discuss a cooperative caching architecture with a distributed cache look up protocol which relies on a virtual backbone for locating and accessing data within a cooperate cache. Our proposal consists of two phases: (i) formation of a virtual backbone and (ii) the cache look up phase. The nodes in a Connected Dominating Set (CDS) form the virtual backbone. The cache look up protocol makes use of the nodes in the virtual backbone for effective data dissemination and discovery. The idea in this scheme is to reduce the number of nodes involved in cache look up process, by constructing a CDS that contains a small number of nodes, still having full coverage of the network. We evaluated the effect of various parameter settings on the performance metrics such as message overhead, cache hit ratio and average query delay. Compared to the previous schemes the proposed scheme not only reduces message overhead, but also improves the cache hit ratio and reduces the average delay

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Due to the advancement in mobile devices and wireless networks mobile cloud computing, which combines mobile computing and cloud computing has gained momentum since 2009. The characteristics of mobile devices and wireless network makes the implementation of mobile cloud computing more complicated than for fixed clouds. This section lists some of the major issues in Mobile Cloud Computing. One of the key issues in mobile cloud computing is the end to end delay in servicing a request. Data caching is one of the techniques widely used in wired and wireless networks to improve data access efficiency. In this paper we explore the possibility of a cooperative caching approach to enhance data access efficiency in mobile cloud computing. The proposed approach is based on cloudlets, one of the architecture designed for mobile cloud computing.

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Cooperative caching is an attractive solution for reducing bandwidth demands and network latency in mobile ad hoc networks. Deploying caches in mobile nodes can reduce the overall traffic considerably. Cache hits eliminate the need to contact the data source frequently, which avoids additional network overhead. In this paper we propose a data discovery and cache management policy for cooperative caching, which reduces the caching overhead and delay by reducing the number of control messages flooded in to the network. A cache discovery process based on location of neighboring nodes is developed for this. The cache replacement policy we propose aims at increasing the cache hit ratio. The simulation results gives a promising result based on the metrics of studies

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In this computerized, globalised and internet world our computer collects various types of information’s about every human being and stores them in files secreted deep on its hard drive. Files like cache, browser history and other temporary Internet files can be used to store sensitive information like logins and passwords, names addresses, and even credit card numbers. Now, a hacker can get at this information by wrong means and share with someone else or can install some nasty software on your computer that will extract your sensitive and secret information. Identity Theft posses a very serious problem to everyone today. If you have a driver’s license, a bank account, a computer, ration card number, PAN card number, ATM card or simply a social security number you are more than at risk, you are a target. Whether you are new to the idea of ID Theft, or you have some unanswered questions, we’ve compiled a quick refresher list below that should bring you up to speed. Identity theft is a term used to refer to fraud that involves pretending to be someone else in order to steal money or get other benefits. Identity theft is a serious crime, which is increasing at tremendous rate all over the world after the Internet evolution. There is widespread agreement that identity theft causes financial damage to consumers, lending institutions, retail establishments, and the economy as a whole. Surprisingly, there is little good public information available about the scope of the crime and the actual damages it inflicts. Accounts of identity theft in recent mass media and in film or literature have centered on the exploits of 'hackers' - variously lauded or reviled - who are depicted as cleverly subverting corporate firewalls or other data protection defenses to gain unauthorized access to credit card details, personnel records and other information. Reality is more complicated, with electronic identity fraud taking a range of forms. The impact of those forms is not necessarily quantifiable as a financial loss; it can involve intangible damage to reputation, time spent dealing with disinformation and exclusion from particular services because a stolen name has been used improperly. Overall we can consider electronic networks as an enabler for identity theft, with the thief for example gaining information online for action offline and the basis for theft or other injury online. As Fisher pointed out "These new forms of hightech identity and securities fraud pose serious risks to investors and brokerage firms across the globe," I am a victim of identity theft. Being a victim of identity theft I felt the need for creating an awareness among the computer and internet users particularly youngsters in India. Nearly 70 per cent of Indian‘s population are living in villages. Government of India already started providing computer and internet facilities even to the remote villages through various rural development and rural upliftment programmes. Highly educated people, established companies, world famous financial institutions are becoming victim of identity theft. The question here is how vulnerable the illiterate and innocent rural people are if they suddenly exposed to a new device through which some one can extract and exploit their personal data without their knowledge? In this research work an attempt has been made to bring out the real problems associated with Identity theft in developed countries from an economist point of view.

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Scheduling tasks to efficiently use the available processor resources is crucial to minimizing the runtime of applications on shared-memory parallel processors. One factor that contributes to poor processor utilization is the idle time caused by long latency operations, such as remote memory references or processor synchronization operations. One way of tolerating this latency is to use a processor with multiple hardware contexts that can rapidly switch to executing another thread of computation whenever a long latency operation occurs, thus increasing processor utilization by overlapping computation with communication. Although multiple contexts are effective for tolerating latency, this effectiveness can be limited by memory and network bandwidth, by cache interference effects among the multiple contexts, and by critical tasks sharing processor resources with less critical tasks. This thesis presents techniques that increase the effectiveness of multiple contexts by intelligently scheduling threads to make more efficient use of processor pipeline, bandwidth, and cache resources. This thesis proposes thread prioritization as a fundamental mechanism for directing the thread schedule on a multiple-context processor. A priority is assigned to each thread either statically or dynamically and is used by the thread scheduler to decide which threads to load in the contexts, and to decide which context to switch to on a context switch. We develop a multiple-context model that integrates both cache and network effects, and shows how thread prioritization can both maintain high processor utilization, and limit increases in critical path runtime caused by multithreading. The model also shows that in order to be effective in bandwidth limited applications, thread prioritization must be extended to prioritize memory requests. We show how simple hardware can prioritize the running of threads in the multiple contexts, and the issuing of requests to both the local memory and the network. Simulation experiments show how thread prioritization is used in a variety of applications. Thread prioritization can improve the performance of synchronization primitives by minimizing the number of processor cycles wasted in spinning and devoting more cycles to critical threads. Thread prioritization can be used in combination with other techniques to improve cache performance and minimize cache interference between different working sets in the cache. For applications that are critical path limited, thread prioritization can improve performance by allowing processor resources to be devoted preferentially to critical threads. These experimental results show that thread prioritization is a mechanism that can be used to implement a wide range of scheduling policies.

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General-purpose computing devices allow us to (1) customize computation after fabrication and (2) conserve area by reusing expensive active circuitry for different functions in time. We define RP-space, a restricted domain of the general-purpose architectural space focussed on reconfigurable computing architectures. Two dominant features differentiate reconfigurable from special-purpose architectures and account for most of the area overhead associated with RP devices: (1) instructions which tell the device how to behave, and (2) flexible interconnect which supports task dependent dataflow between operations. We can characterize RP-space by the allocation and structure of these resources and compare the efficiencies of architectural points across broad application characteristics. Conventional FPGAs fall at one extreme end of this space and their efficiency ranges over two orders of magnitude across the space of application characteristics. Understanding RP-space and its consequences allows us to pick the best architecture for a task and to search for more robust design points in the space. Our DPGA, a fine- grained computing device which adds small, on-chip instruction memories to FPGAs is one such design point. For typical logic applications and finite- state machines, a DPGA can implement tasks in one-third the area of a traditional FPGA. TSFPGA, a variant of the DPGA which focuses on heavily time-switched interconnect, achieves circuit densities close to the DPGA, while reducing typical physical mapping times from hours to seconds. Rigid, fabrication-time organization of instruction resources significantly narrows the range of efficiency for conventional architectures. To avoid this performance brittleness, we developed MATRIX, the first architecture to defer the binding of instruction resources until run-time, allowing the application to organize resources according to its needs. Our focus MATRIX design point is based on an array of 8-bit ALU and register-file building blocks interconnected via a byte-wide network. With today's silicon, a single chip MATRIX array can deliver over 10 Gop/s (8-bit ops). On sample image processing tasks, we show that MATRIX yields 10-20x the computational density of conventional processors. Understanding the cost structure of RP-space helps us identify these intermediate architectural points and may provide useful insight more broadly in guiding our continual search for robust and efficient general-purpose computing structures.

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The furious pace of Moore's Law is driving computer architecture into a realm where the the speed of light is the dominant factor in system latencies. The number of clock cycles to span a chip are increasing, while the number of bits that can be accessed within a clock cycle is decreasing. Hence, it is becoming more difficult to hide latency. One alternative solution is to reduce latency by migrating threads and data, but the overhead of existing implementations has previously made migration an unserviceable solution so far. I present an architecture, implementation, and mechanisms that reduces the overhead of migration to the point where migration is a viable supplement to other latency hiding mechanisms, such as multithreading. The architecture is abstract, and presents programmers with a simple, uniform fine-grained multithreaded parallel programming model with implicit memory management. In other words, the spatial nature and implementation details (such as the number of processors) of a parallel machine are entirely hidden from the programmer. Compiler writers are encouraged to devise programming languages for the machine that guide a programmer to express their ideas in terms of objects, since objects exhibit an inherent physical locality of data and code. The machine implementation can then leverage this locality to automatically distribute data and threads across the physical machine by using a set of high performance migration mechanisms. An implementation of this architecture could migrate a null thread in 66 cycles -- over a factor of 1000 improvement over previous work. Performance also scales well; the time required to move a typical thread is only 4 to 5 times that of a null thread. Data migration performance is similar, and scales linearly with data block size. Since the performance of the migration mechanism is on par with that of an L2 cache, the implementation simulated in my work has no data caches and relies instead on multithreading and the migration mechanism to hide and reduce access latencies.