Design and Implementation of a Flexible and Memory Efficient Operating System for Sensor Nodes

Sensor network nodes exhibit characteristics of both embedded systems and general-purpose systems.A sensor network operating system is a kind of embedded operating system, but unlike a typical embedded operating system, sensor network operatin g system may not be real time, and is constrained by memory and energy constraints. Most sensor network operating systems are based on event-driven approach. Event-driven approach is efficient in terms of time and space.Also this approach does not require a separate stack for each execution context. But using this model, it is difficult to implement long running tasks, like cryptographic operations. A thread based computation requires a separate stack for each execution context, and is less efficient in terms of time and space. In this paper, we propose a thread based execution model that uses only a fixed number of stacks. In this execution model, the number of stacks at each priority level are fixed. It minimizes the stack requirement for multi-threading environment and at the same time provides ease of programming. We give an implementation of this model in Contiki OS by separating thread implementation from protothread implementation completely. We have tested our OS by implementing a clock synchronization protocol using it.

Micro stepping of Shape Memory Alloy based Poly Phase motor

In literature we find broadly two types of shape memory alloy based motors namely limited rotation motor and unlimited rotation motor. The unlimited rotation type SMA based motor reported in literature uses SMA springs for actuation. An attempt has been made in this paper to develop an unlimited rotation type balanced poly phase motor based on SMA wire in series with a spring in each phase. By isolating SMA actuation and spring action we are able achieve a constant force by the SMA wire through out its range of operation. The Poly phase motor can be used in stepping mode for generating incremental motion and servo mode for generating continuous motion. A method of achieving servo motion by micro stepping is presented. Micro stepping consists of controlling single-phase temperature with a position feedback. The motor has been modeled with a new approach to the SMA wire Hysterysis model. Motor is simulated for different responses and the results are compared with the experimental data.

Java Memory Model aware Software validation

The Java Memory Model (JMM) provides a semantics of Java multithreading for any implementation platform. The JMM is defined in a declarative fashion with an allowed program execution being defined in terms of existence of "commit sequences" (roughly, the order in which actions in the execution are committed). In this work, we develop OpMM, an operational under-approximation of the JMM. The immediate motivation of this work lies in integrating a formal specification of the JMM with software model checkers. We show how our operational memory model description can be integrated into a Java Path Finder (JPF) style model checker for Java programs.

Memory Architecture Exploration Framework for Cache Based Embedded SoC

Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and lower energy consumption. The memory architecture of the embedded system strongly influences critical system design objectives like area, power and performance. Hence the embedded system designer performs a complete memory architecture exploration to custom design a memory architecture for a given set of applications. Further, the designer would be interested in multiple optimal design points to address various market segments. However, tight time-to-market constraints enforces short design cycle time. In this paper we address the multi-level multi-objective memory architecture exploration problem through a combination of exhaustive-search based memory exploration at the outer level and a two step based integrated data layout for SPRAM-Cache based architectures at the inner level. We present a two step integrated approach for data layout for SPRAM-Cache based hybrid architectures with the first step as data-partitioning that partitions data between SPRAM and Cache, and the second step is the cache conscious data layout. We formulate the cache-conscious data layout as a graph partitioning problem and show that our approach gives up to 34% improvement over an existing approach and also optimizes the off-chip memory address space. We experimented our approach with 3 embedded multimedia applications and our approach explores several hundred memory configurations for each application, yielding several optimal design points in a few hours of computation on a standard desktop.

Shape memory alloy based motor

Design and characterization of a new shape memory alloy wire based Poly Phase Motor has been reported in this paper. The motor can be used either in stepping mode or in servo mode of operation. Each phase of the motor consists of an SMA wire with a spring in series. The principle of operation of the poly phase motor is presented. The motor resembles a stepper motor in its functioning though the actuation principles are different and hence has been characterized similar to a stepper motor. The motor can be actuated in either direction with different phase sequencing methods, which are presented in this work. The motor is modelled and simulated and the results of simulations and experiments are presented. The experimental model of the motor is of dimension 150mm square, 20mm thick and uses SMA wire of 0·4mm diameter and 125mm of length in each phase.

Bit Steering In The Minimization Of Control Memory In Microprogrammed Digital-Computers

This correspondence presents an algorithm for microprogram control memory width minimization with the bit steering technique. The necessary and sufficient conditions to detect the steerability of two mutually exclusive sets of microcommands are established. The algorithm encodes the microcommands of the sets with a bit steering common part and also extends the theory to multiple (more than two) sets of microcommands.

Aerodynamic pressure variation over SMA wire integrated morphing aerofoil

An analysis of the pressure variation over an aerofoil with integrated Shape Memory Alloy (SMA) wire is reported. A computational model based on finite elements and potential flow computation is proposed to obtain the deflections of the upper and the lower skins of the aerofoil subjected to aerodynamic pressure and hysteretic deformation of the SMA wire. The computational model couples a one-dimensional phenomenological constitutive model of SMA wire with the laminar incompressible aerodynamic pressure induced deformation of the aerofoil skins. The SMA wires are actuated by thermoelectric control system with auxiliary compensator feeding the piezoelectric stack actuators to adjust the hysteretic dynamics of the SMA wire. At each step of this coupled deformation process, the deflected/morphed shape of the aerofoil is d while recalculating to get the pressure distribution. Panel method based on incompressible and inviscid flow is employed for this purpose. The aerodynamic lift is then obtained from the pressure distributions. Numerical results on the variation of coefficient of pressure are reported.

Scalable Context-Sensitive Points-To Analysis Using Multi-Dimensional Bloom Filters

Context-sensitive points-to analysis is critical for several program optimizations. However, as the number of contexts grows exponentially, storage requirements for the analysis increase tremendously for large programs, making the analysis non-scalable. We propose a scalable flow-insensitive context-sensitive inclusion-based points-to analysis that uses a specially designed multi-dimensional bloom filter to store the points-to information. Two key observations motivate our proposal: (i) points-to information (between pointer-object and between pointer-pointer) is sparse, and (ii) moving from an exact to an approximate representation of points-to information only leads to reduced precision without affecting correctness of the (may-points-to) analysis. By using an approximate representation a multi-dimensional bloom filter can significantly reduce the memory requirements with a probabilistic bound on loss in precision. Experimental evaluation on SPEC 2000 benchmarks and two large open source programs reveals that with an average storage requirement of 4MB, our approach achieves almost the same precision (98.6%) as the exact implementation. By increasing the average memory to 27MB, it achieves precision upto 99.7% for these benchmarks. Using Mod/Ref analysis as the client, we find that the client analysis is not affected that often even when there is some loss of precision in the points-to representation. We find that the NoModRef percentage is within 2% of the exact analysis while requiring 4MB (maximum 15MB) memory and less than 4 minutes on average for the points-to analysis. Another major advantage of our technique is that it allows to trade off precision for memory usage of the analysis.