Towards Educational Inclusion in a Transforming Society: Some Lessons from Community Relations and Special Needs Education in Northern Ireland

This paper takes an original approach to an important aspect of educational research and its role in transforming societies, namely that of educational inclusion. It brings together what some might consider two rather strange bedfellows i.e. community relations and special needs education. It also draws upon new tools for theorising educational inclusion, which give a central role to the discursive nature of human conduct and which take a view of human behaviour as socially embedded and meaningful.

Millimeter-wave stealth radio for special operations forces

For Special Operations Forces, an important attribute of any future radio will be the ability to conceal transmissions from the enemy while transmitting large amounts of data for situational awareness and communications. These requirements will mean that military wireless systems designers will need to consider operating frequencies in the mm-wave bands: The high data rates that are achievable at these frequencies and the propagation characteristics at this wavelength will provide many benefits for the implementation of 'stealth radio'. This article discusses some of the recent advances in RF front-end technology, alongside physical layer transmission schemes that could be employed for millimeter-wave soldier-mounted radio. The operation of a hypothetical millimeter-wave soldier-to-soldier communications system that makes use of smart antenna technology is also described.

Introduction to Domain-Driven Data Mining Special Section

In the last decade, data mining has emerged as one of the most dynamic and lively areas in information technology. Although many algorithms and techniques for data mining have been proposed, they either focus on domain independent techniques or on very specific domain problems. A general requirement in bridging the gap between academia and business is to cater to general domain-related issues surrounding real-life applications, such as constraints, organizational factors, domain expert knowledge, domain adaption, and operational knowledge. Unfortunately, these either have not been addressed, or have not been sufficiently addressed, in current data mining research and development.Domain-Driven Data Mining (D3M) aims to develop general principles, methodologies, and techniques for modeling and merging comprehensive domain-related factors and synthesized ubiquitous intelligence surrounding problem domains with the data mining process, and discovering knowledge to support business decision-making. This paper aims to report original, cutting-edge, and state-of-the-art progress in D3M. It covers theoretical and applied contributions aiming to: 1) propose next-generation data mining frameworks and processes for actionable knowledge discovery, 2) investigate effective (automated, human and machine-centered and/or human-machined-co-operated) principles and approaches for acquiring, representing, modelling, and engaging ubiquitous intelligence in real-world data mining, and 3) develop workable and operational systems balancing technical significance and applications concerns, and converting and delivering actionable knowledge into operational applications rules to seamlessly engage application processes and systems.

SoC memory hierarchy derivation from dataflow graphs

Hardware synthesis from dataflow graphs of signal processing systems is a growing research area as focus shifts to high level design methodologies. For data intensive systems, dataflow based synthesis can lead to an inefficient usage of memory due to the restrictive nature of synchronous dataflow and its inability to easily model data reuse. This paper explores how dataflow graph changes can be used to drive both the on-chip and off-chip memory organisation and how these memory architectures can be mapped to a hardware implementation. By exploiting the data reuse inherent to many image processing algorithms and by creating memory hierarchies, off-chip memory bandwidth can be reduced by a factor of a thousand from the original dataflow graph level specification of a motion estimation algorithm, with a minimal increase in memory size. This analysis is verified using results gathered from implementation of the motion estimation algorithm on a Xilinx Virtex-4 FPGA, where the delay between the memories and processing elements drops from 14.2 ns down to 1.878 ns through the refinement of the memory architecture. Care must be taken when modeling these algorithms however, as inefficiencies in these models can be easily translated into overuse of hardware resources.