Dinâmica da comunidade de macrófitas aquáticas no reservatório de Santana, RJ

Apesar da importância na dinâmica dos ecossistemas aquáticos, as macrófitas podem formar densas e extensas colonizações em corpos hídricos cujos equilíbrios ecológicos foram rompidos. Nessas condições, essas plantas promovem uma série de problemas que as tornam alvos de controle. Para elaboração de planos adequados de manejo dessa vegetação, é fundamental o conhecimento das dinâmicas relativas das populações que a compõem. O objetivo deste trabalho foi realizar levantamentos mensais da composição específica da comunidade de macrófitas que coloniza o reservatório de Santana, localizado no município de Piraí/RJ, monitorando 97 pontos georreferenciados, abrangendo toda a lâmina d'água. Foram identificadas 41 espécies, inseridas em 21 famílias botânicas. As famílias Poaceae, Pontederiaceae e Cyperacae foram as que apresentaram os maiores números de espécies ao longo do ano. Salvinia herzogii e Egeria densa apresentaram as maiores notas anuais de colonização do reservatório. As populações de Eichhornia azurea, Brachiaria arrecta e Paspalum repens completaram o grupo das espécies numericamente mais relevantes. As plantas de hábito flutuante tenderam a apresentar populações com padrão de distribuição geográfica casualizado, enquanto as espécies fixadas no sedimento e as submersas apresentaram populações com padrão agregado. Não houve expressivas variações mensais dos valores dos índices de diversidade (H') e de equitabilidade (E') das comunidades de macrófitas aquáticas ao longo do ano. O dendrograma construído com o coeficiente de Odum mostrou uma seqüência lógica dos meses, evidenciando uma definida sucessão de populações divididas em dois grupos de similaridade separados pelo mês de junho. Nessa época, o nível de água do reservatório foi reduzido e o sedimento ficou exposto, favorecendo as espécies de hábito emergente.

Sensor array made with nanostructured films to detect a phenothiazine compound

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

A fuzzy logic system applied in lightning models

This paper describes a novel approach for mapping lightning processes using fuzzy logic. The estimation process is carried out using a fuzzy system based on Sugeno's architecture. Simulation results confirm that proposed approach can be efficiently used in these types of problem.

Fuzzy Logic and Geostatistical Techniques for Spatialization of Soil Texture in Region with Rough Terrains

From the geotechnical standpoint, it is interesting to analyse the soil texture in regions with rough terrain due to its relation with the infiltration and runoff processes and, consequently, the effect on erosion processes. The purpose of this paper is to present a methodology that provides the soil texture spatialization by using Fuzzy logic and Geostatistic. The results were correlated with maps drawn specifically for the study area. The knowledge of the spatialization of soil properties, such as the texture, can be an important tool for land use planning in order to reduce the potential soil losses during rain seasons. (c) 2011 Published by Elsevier Ltd. Selection and peer-review under responsibility of Spatial Statistics 2011

Fibroblast functionality on novel Ti-30Ta nanotube array

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

A 2kW interleaved ZCS-FM boost rectifier digitally controlled by FPGA device

This paper presents a 2kW single-phase high power factor boost rectifier with four cells in interleave connection, operating in critical conduction mode, and employing a soft-switching technique, controlled by Field Programmable Gate Array (FPGA). The soft-switching technique Is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-voltage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related 'to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the Interleaving technique, the rectifer's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) In the input current, in compliance with the TEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for four interleaved cells, and a closed-loop to provide the output voltage regulation, like as a pre-regulator rectifier. Experimental results are presented for a 2kW implemented prototype with four interleaved cells, 400V nominal output voltage and 220V(rms) nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device.

A novel HPF voltage source rectifier for variable speed refrigeration systems

A novel single-phase voltage source rectifier capable to achieve High-Power-Factor (HPF) for variable speed refrigeration system application, is proposed in this paper. The proposed system is composed by a single-phase high-power-factor boost rectifier, with two cells in interleave connection, operating in critical conduction mode, and employing a soft-switching technique, controlled by a Field Programmable Gate Array (FPGA), associated with a conventional three-phase IGBT bridge inverter (VSI - Voltage Source Inverter), controlled by a Digital Signal Processor (DSP). The soft-switching technique for the input stage is based on zero-current-switching (ZCS) cells. The rectifier's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) in the input current, in compliance with the EEC61000-3-2 standards. The digital controller for the output stage has been developed using a conventional voltage-frequency control (scalar V/f control), and a simplified stator oriented Vector control, in order to verify the feasibility and performance of the proposed digital controls for continuous temperature control applied at a refrigerator prototype.

A VHDL-based protocol controller for NCAP processors

This work presents the development of an IEEE 1451.2 protocol controller based on a low-cost FPGA that is directly connected to the parallel port of a conventional personal computer. In this manner it is possible to implement a Network Capable Application Processor (NCAP) based on a personal computer, without parallel port modifications. This approach allows supporting the ten signal lines of the 10-wire IEEE 1451.2 Transducer Independent Interface (TII), that connects the network processor to the Smart Transducer Interface Module (STIM) also defined in the IEEE 1451.2 standard. The protocol controller is connected to the STIM through the TII's physical interface, enabling the portability of the application at the transducer and network processor level. The protocol controller architecture was fully developed in VHDL language and we have projected a special prototype configured in a general-purpose programmable logic device. We have implemented two versions of the protocol controller, which is based on IEEE 1451 standard, and we have obtained results using simulation and experimental tests. (c) 2008 Elsevier B.V. All rights reserved.

Open and Standardized Resources for Smart Transducer Networking

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Deciding difference logic in a Nelson-Oppen combination framework

O método de combinação de Nelson-Oppen permite que vários procedimentos de decisão, cada um projetado para uma teoria específica, possam ser combinados para inferir sobre teorias mais abrangentes, através do princípio de propagação de igualdades. Provadores de teorema baseados neste modelo são beneficiados por sua característica modular e podem evoluir mais facilmente, incrementalmente. Difference logic é uma subteoria da aritmética linear. Ela é formada por constraints do tipo x − y ≤ c, onde x e y são variáveis e c é uma constante. Difference logic é muito comum em vários problemas, como circuitos digitais, agendamento, sistemas temporais, etc. e se apresenta predominante em vários outros casos. Difference logic ainda se caracteriza por ser modelada usando teoria dos grafos. Isto permite que vários algoritmos eficientes e conhecidos da teoria de grafos possam ser utilizados. Um procedimento de decisão para difference logic é capaz de induzir sobre milhares de constraints. Um procedimento de decisão para a teoria de difference logic tem como objetivo principal informar se um conjunto de constraints de difference logic é satisfatível (as variáveis podem assumir valores que tornam o conjunto consistente) ou não. Além disso, para funcionar em um modelo de combinação baseado em Nelson-Oppen, o procedimento de decisão precisa ter outras funcionalidades, como geração de igualdade de variáveis, prova de inconsistência, premissas, etc. Este trabalho apresenta um procedimento de decisão para a teoria de difference logic dentro de uma arquitetura baseada no método de combinação de Nelson-Oppen. O trabalho foi realizado integrando-se ao provador haRVey, de onde foi possível observar o seu funcionamento. Detalhes de implementação e testes experimentais são relatados

Formal verification of PLC programs using the B Method

PLCs (acronym for Programmable Logic Controllers) perform control operations, receiving information from the environment, processing it and modifying this same environment according to the results produced. They are commonly used in industry in several applications, from mass transport to petroleum industry. As the complexity of these applications increase, and as various are safety critical, a necessity for ensuring that they are reliable arouses. Testing and simulation are the de-facto methods used in the industry to do so, but they can leave flaws undiscovered. Formal methods can provide more confidence in an application s safety, once they permit their mathematical verification. We make use of the B Method, which has been successfully applied in the formal verification of industrial systems, is supported by several tools and can handle decomposition, refinement, and verification of correctness according to the specification. The method we developed and present in this work automatically generates B models from PLC programs and verify them in terms of safety constraints, manually derived from the system requirements. The scope of our method is the PLC programming languages presented in the IEC 61131-3 standard, although we are also able to verify programs not fully compliant with the standard. Our approach aims to ease the integration of formal methods in the industry through the abbreviation of the effort to perform formal verification in PLCs

Development of an AMR-ACB Array for Gastrointestinal Motility Studies

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Design of a reconfigurable pseudorandom number generator for use in intelligent systems

This paper deals with the design of a network-on-chip reconfigurable pseudorandom number generation unit that can map and execute meta-heuristic algorithms in hardware. The unit can be configured to implement one of the following five linear generator algorithms: a multiplicative congruential, a mixed congruential, a standard multiple recursive, a mixed multiple recursive, and a multiply-with-carry. The generation unit can be used both as a pseudorandom and a message passing-based server, which is able to produce pseudorandom numbers on demand, sending them to the network-on-chip blocks that originate the service request. The generator architecture has been mapped to a field programmable gate array, and showed that millions of numbers in 32-, 64-, 96-, or 128-bit formats can be produced in tens of milliseconds. (C) 2011 Elsevier B.V. All rights reserved.

Toxicity assessment and degradation of disperse azo dyes by photoelectrocatalytic oxidation on Ti/TiO2 nanotubular array electrodes

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Bisphenol A removal from wastewater using self-organized TIO2 nanotubular array electrodes

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)