Model for electrodes' filaments of hot cathode fluorescent lamps, during preheating with constant rms current

This paper presents a new model for the representation of electrodes' filaments of hot-cathode fluorescent lamps, during preheating processes based on the injection of currents with constant root mean square (rms) values. The main improvement obtained with this model is the prediction of the R-h/R-c ratio during the preheating process, as a function of the preheating time and of the rms current injected in the electrodes. Using the proposed model, it is possible to obtain an estimate of the time interval and the current that should be provided by the electronic ballast, in order to ensure a suitable preheating process. is estimate of time and current can be used as input data in the design of electronic ballasts with programmed lamp start, permitting the prediction of the R-h/R-c ratio during the initial steps of the design (theoretical analysis and digital simulation). Therefore, the use of the proposed model permits to reduce the necessity of several empirical adjustments in the prototype, in order to set the operation of electronic ballasts during the preheating process. This fact reduces time and costs associated to the global design procedure of electronic ballasts.

Mnltiloop Controller and Reference Generator for a Dynamic Voltage Restorer Implementation

This paper deals with the design and analysis of a Dynamic Voltage Restorer output voltage control. Such control is based on a multiloop strategy, with an inner current PID regulator and an outer P+Resonant voltage controller. The inner regulator is applied on the output inductor current. It will be also demonstrated how the load current behavior may influence in the DVR output voltage, which. justifies the need for the resonant controller. Additionally, it will be discussed the application of a modified algorithm for the identification of the DVR voltage references, which is based on a previously presented positive sequence detector. Since the studied three-phase DVR is assumed to be based on three identical H-bridge converters, all the analysis and design procedures were realized by means of single-phase equivalent circuits. The discussions and conclusions are supported by theoretical calculations, nonlinear simulations and some experimental results.

A Family of Autoconnected Transformers for 12-and 18-Pulse Converters-Generalization for Delta and Wye Topologies

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Harmonic identification using parallel neural networks in single-phase systems

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

The ZVS-PWM commutation cell applied to the DC-AC converter

This paper presents the analysis of a dc-ac converter using a zero-voltage-switching (ZVS) commutation cell. First, we show the cell applied to the buck converter. The stages of operation are presented along with the main current and voltage equations. Next, we adapt the converter to the regenerative-operation mode. Hence, the full-bridge converter at low-frequency operation is connected in the dc-dc output stage (at high frequency). The main switches commute at zero voltage. The converter operated at constant frequency with pulse-width modulation (PWM), and neither overvoltage nor additional current stress was observed by digital simulation. A design example and experimental results obtained by prototype, rated at 275 V and 1 kW, are also presented. © 1997 IEEE.

New family of zero-current-switching PWM converter

A new family of dc-to-dc pulse-width-modulated (PWM) converters is presented. These converters feature soft-commutation at zero-current (ZC) in the active switches. The new ZCS-PWM Boost and new ZCS-PWM Zeta converters, both based on the new ZCS-PWM soft-commutation cell proposed, are used as examples to illustrate the operation of the new family of converters.

A high efficiency HPF-ZCS-PWM Sepic for electronic ballast with multiple tubular fluorescent lamps

This paper presents a high efficiency Sepic rectifier for an electronic ballast application with multiple fluorescent lamps. The proposed Sepic rectifier is based on a Zero-Current-Switching (ZCS) Pulse-Width-Modulated (PWM) soft-commutation cell. The high power-factor of this structure is obtained using the instantaneous average-current control technique, in order to attend properly IEC61000-3-2 standards. The inverting stage of this new electronic ballast is a classical Zero-Voltage-Switching (ZVS) Half-Bridge inverter. A proper design methodology is developed for this new electronic ballast, and a design example is presented for an application with five fluorescent lamps 40W-T12 (200W output power), 220Vrms input voltage, 130Vdc dc link voltage, with rectifier and inverter stages operating at 50kHz. Experimental results are also presented. The THD at input current is equal to 6.41%, for an input voltage THD equal to 2.14%, and the measured overall efficiency is about 92.8%, at rated load.

An improved design procedure for LCC resonant filter of dimmable electronic ballasts for fluorescent lamps, based on lamp model

This paper presents an improved design methodology for the determination of the parameters used in the classical series-resonant parallel-loaded (SRPL) filter employed in the switching frequency controlled dimmable electronic ballasts. According to the analysis developed in this paper, it is possible to evaluate some important characteristics of the resonant filter during the dimming operation, such as: range of switching frequency, phase shift, and rms value of the current drained by the resonant filter + fluorescent lamp set. Experimental results are presented in order to validate the analyses developed in this paper. © 2005 IEEE.

Analysis of numeric conditioning of Hessian matrix of Lagrangian via singular values

This paper presents an analyze of numeric conditioning of the Hessian matrix of Lagrangian of modified barrier function Lagrangian method (MBFL) and primal-dual logarithmic barrier method (PDLB), which are obtained in the process of solution of an optimal power flow problem (OPF). This analyze is done by a comparative study through the singular values decomposition (SVD) of those matrixes. In the MBLF method the inequality constraints are treated by the modified barrier and PDLB methods. The inequality constraints are transformed into equalities by introducing positive auxiliary variables and are perturbed by the barrier parameter. The first-order necessary conditions of the Lagrangian function are solved by Newton's method. The perturbation of the auxiliary variables results in an expansion of the feasible set of the original problem, allowing the limits of the inequality constraints to be reached. The electric systems IEEE 14, 162 and 300 buses were used in the comparative analysis. ©2007 IEEE.

Variable speed refrigeration system with HPF input rectifier stage

This paper is based on the analysis and implementation of a new drive system applied to refrigeration systems, complying with the restrictions imposed by the IEC standards (Harmonic/Flicker/EMI-Electromagnetic Interference restrictions), in order to obtain high efficiency, high power factor, reduced harmonic distortion in the input current and reduced electromagnetic interference, with excellent performance in temperature control of a refrigeration prototype system (automatic control, precision and high dynamic response). The proposal is replace the single-phase motor by a three-phase motor, in the conventional refrigeration system. In this way, a proper control technique can be applied, using a closed-loop (feedback control), that will allow an accurate adjustment of the desirable temperature. The proposed refrigeration prototype uses a 0.5Hp three-phase motor and an open (Belt-Drive) Bitzer IY type compressor. The input rectifier stage's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) in the input current, in compliance with the IEC61000-3-2 standards. The digital controller for the output three-phase inverter stage has been developed using a conventional voltage-frequency control (scalar V/f control), and a simplified stator oriented Vector control, in order to verify the feasibility and performance of the proposed digital controls for continuous temperature control applied at the refrigerator prototype. ©2008 IEEE.

A true programmable HPF hybrid three-phase rectifier

In this paper is proposed and analyzed a digital hysteresis modulation using a FPGA (Field Programmable Gate Array) device and VHDL (Hardware Description Language), applied at a hybrid three-phase rectifier with almost unitary input power factor, composed by parallel SEPIC controlled single-phase rectifiers connected to each leg of a standard 6-pulses uncontrolled diode rectifier. The digital control allows a programmable THD (Total Harmonic Distortion) at the input currents, and it makes possible that the power rating of the switching-mode converters, connected in parallel, can be a small fraction of the total average output power, in order to obtain a compact converter, reduced input current THD and almost unitary input power factor. The proposed digital control, using a FPGA device and VHDL, offers an important flexibility for the associated control technique, in order to obtain a programmable PFC (Power Factor Correction) hybrid three-phase rectifier, in agreement with the international standards (IEC, and IEEE), which impose limits for the THD of the AC (Alternate Current) line input currents. Finally, the proposed control strategy is verified through experimental results from an implemented prototype. ©2008 IEEE.

Hybrid three-phase HPF rectifier with programmable input current THD, using FPGA device and VHDL language

In this paper is proposed and analyzed a digital hysteresis modulation using a FPGA (Field Programmable Gate Array) device and VHDL (Hardware Description Language), applied at a hybrid three-phase rectifier with almost unitary input power factor, composed by parallel SEPIC controlled single-phase rectifiers connected to each leg of a standard 6-pulses uncontrolled diode rectifier. The digital control allows a programmable THD (Total Harmonic Distortion) at the input currents, and it makes possible that the power rating of the switching-mode converters, connected in parallel, can be a small fraction of the total average output power, in order to obtain a compact converter, reduced input current THD and almost unitary input power factor. Finally, the proposed digital control, using a FPGA device and VHDL, offers an important flexibility for the associated control technique, in order to obtain a programmable PFC (Power Factor Correction) hybrid three-phase rectifier, in agreement with the international standards (IEC, and IEEE), which impose limits for the THD of the AC (Alternate Current) line input currents. The proposed strategy is verified by experiments. © 2008 IEEE.

Multiloop controller and reference generator for a dynamic voltage restorer implementation

This paper deals with the design and analysis of a Dynamic Voltage Restorer output voltage control. Such control is based on a multiloop strategy, with an inner current PID regulator and an outer P+Resonant voltage controller. The inner regulator is applied on the output inductor current. It will be also demonstrated how the load current behavior may influence in the DVR output voltage, which justifies the need for the resonant controller. Additionally, it will be discussed the application of a modified algorithm for the identification of the DVR voltage references, which is based on a previously presented positive sequence detector. Since the studied three-phase DVR is assumed to be based on three identical H-bridge converters, all the analysis and design procedures were realized by means of single-phase equivalent circuits. The discussions and conclusions are supported by theoretical calculations, nonlinear simulations and some experimental results. ©2008 IEEE.

Critical evaluation of FBD, pq and CPT current decompositions for four-wire circuits

This paper investigates the major similarities and discrepancies of three important current decompositions proposed for the interpretation of unbalanced and/or non linear three-phase four-wire circuits. The considered approaches were the so-called FBD Theory, the pq-Theory and the CPT. Although the methods are based on different concepts, the results obtained under ideal conditions (sinusoidal and balanced signals) are very similar. The main differences appear in the presence of unbalanced and non linear load conditions. It will be demonstrated and discussed how the choice of the voltage referential and the return conductor impedance can influence in the resulting current components, as well as, the way of interpreting a power circuit with return conductor. Under linear unbalanced conditions, both FBD and pq-Theory suggest that the some current components contain a third-order harmonic. Besides, neither pq-Theory nor FBD method are able to provide accurate information for reactive current under unbalanced and distorted conditions, what seems to be done by means of the CPT. © 2009 IEEE.

Harmonic, reactive and unbalance compensation by means of CPT framework

This paper presents possible selective current compensation strategies based on the Conservative Power Theory (CPT). This recently proposed theory, introduces the concept of complex power conservation under non-sinusoidal conditions. Moreover, the related current decompositions results in several current terms, which are associated with a specific physical phenomena (power absorption P, energy storage Q, voltage and current distortion D). Such current components are used in this work for the definition of different current compensators, which can be selective in terms of minimizing particular disturbing effects. The choice of one or other current component for compensation directly affects the sizing and cost of active and/or passive devices and it will be demonstrated that it can be done to attend predefined limits for harmonic distortion, unbalances and/or power factor. Single and three-phase compensation strategies will be discussed by means of the CPT Framework. Simulation and experimental results will be demonstrated in order to validate their performance. © 2009 IEEE.