Anomalous Temperature dependence of Fermi-edge Singularity in Modulation-doped AlGaAs/InGaAs/GaAs hetero-structures

The temperature and power dependence of Fermi-edge singularity (FES) in high-density two-dimensional electron gas, specific to pseudomorphic AlxGa1-xAs/InyGa1-yAs/GaAs heterostructures is studied by photoluminescence (PL). In all these structures, there are two prominent transitions E11 and E21 considered to be the result of electron-hole recombination from first and second electron sub-bands with that of first heavy-hole sub-band. FES is observed approximately 5 -10 meV below the E21 transition. At 4.2 K, FES appears as a lower energy shoulder to the E21 transition. The PL intensity of all the three transitions E11, FES and E21 grows linearly with excitation power. However, we observe anomalous behavior of FES with temperature. While PL intensity of E11 and E21 decrease with increasing temperature, FES transition becomes stronger initially and then quenches-off slowly (till 40K). Though it appears as a distinct peak at about 20 K, its maximum is around 7 - 13 K.

Understanding the building-up process of three dimensional open-framework metal phosphates: Acid degradation of the 3D structures to lower dimensional structures

Acid degradation of 3D zinc phosphates primarily yields a one-dimensional ladder compound, an observation that is significant considering that the latter forms 3D structures on heating in water.

Band Structures of Bilayer Graphene Superlattices

We formulate a low energy effective Hamiltonian to study superlattices in bilayer graphene (BLG) using a minimal model which supports quadratic band touching points. We show that a one dimensional (1D) periodic modulation of the chemical potential or the electric field perpendicular to the layers leads to the generation of zero-energy anisotropic massless Dirac fermions and finite energy Dirac points with tunable velocities. The electric field superlattice maps onto a coupled chain model comprised of ``topological'' edge modes. 2D superlattice modulations are shown to lead to gaps on the mini-Brillouin zone boundary but do not, for certain symmetries, gap out the quadratic band touching point. Such potential variations, induced by impurities and rippling in biased BLG, could lead to subgap modes which are argued to be relevant to understanding transport measurements.

Photocatalytic properties of KBiO(3) and LiBiO(3) with tunnel structures

In the present study, KBiO(3) is synthesized by a standard oxidation technique while LiBiO(3) is prepared by hydrothermal method. The synthesized catalysts are characterized by X-ray diffraction (XRD), Scanning Electron Microscopy (SEM), BET surface area analysis and Diffuse Reflectance Spectroscopy (DRS). The XRD patterns suggest that KBiO(3) crystallizes in the cubic structure while LiBiO(3) crystallizes in orthorhombic structure and both of these adopt the tunnel structure. The SEM images reveal micron size polyhedral shaped KBiO(3) particles and rod-like or prismatic shape particles for LiBiO(3). The band gap is calculated from the diffuse reflectance spectrum and is found to be 2.1 eV and 1.8 eV for KBiO(3) and LiBiO(3), respectively. The band gap and the crystal structure data suggest that these materials can be used as photocatalysts. The photocatalytic activity of KBiO(3) and LiBiO(3) are evaluated for the degradation of anionic and cationic dyes, respectively, under UV and solar radiations.

Analysis of Serpentine folded-waveguide slow-wave structures by elliptical conformal transformation

Analysis of the serpentine folded-waveguide slow-wave structure was carried out using elliptical conformal transformation, for the dispersion and interaction impedance characteristics of the structure. The results obtained from the present analysis were compared with those from 3D electromagnetic simulation using MAFIA.

Topology Optimization of Micromachined Structures with the Manufacturing Constraints of KOH Etching of (110) Silicon

The focus of this paper is on designing useful compliant micro-mechanisms of high-aspect-ratio which can be microfabricated by the cost-effective wet etching of (110) orientation silicon (Si) wafers. Wet etching of (110) Si imposes constraints on the geometry of the realized mechanisms because it allows only etch-through in the form of slots parallel to the wafer's flat with a certain minimum length. In this paper, we incorporate this constraint in the topology optimization and obtain compliant designs that meet the specifications on the desired motion for given input forces. Using this design technique and wet etching, we show that we can realize high-aspect-ratio compliant micro-mechanisms. For a (110) Si wafer of 250 µm thickness, the minimum length of the etch opening to get a slot is found to be 866 µm. The minimum achievable width of the slot is limited by the resolution of the lithography process and this can be a very small value. This is studied by conducting trials with different mask layouts on a (110) Si wafer. These constraints are taken care of by using a suitable design parameterization rather than by imposing the constraints explicitly. Topology optimization, as is well known, gives designs using only the essential design specifications. In this work, we show that our technique also gives manufacturable mechanism designs along with lithography mask layouts. Some designs obtained are transferred to lithography masks and mechanisms are fabricated on (110) Si wafers.

REDEFINE: Architecture of a SoC Fabric for Runtime Composition of Computation Structures

In this paper we propose the architecture of a SoC fabric onto which applications described in a HLL are synthesized. The fabric is a homogeneous layout of computation, storage and communication resources on silicon. Through a process of composition of resources (as opposed to decomposition of applications), application specific computational structures are defined on the fabric at runtime to realize different modules of the applications in hardware. Applications synthesized on this fabric offers performance comparable to ASICs while retaining the programmability of processing cores. We outline the application synthesis methodology through examples, and compare our results with software implementations on traditional platforms with unbounded resources.