Novel field emission from graphene sheets supported by CNTs arrays

A good quality graphene is transferred onto honeycomb-like CNTs arrays with inner supporting CNTs. The efficient field emission is demonstrated due to a high aspect ratio protrusions and graphene crack edges. A high efficient current density about 1.2 mA/cm2 at threshold electric field of 7.8 V/μm with a turn-on electric field of 1.8 V/μm at the current density of 10 μA/cm2 is observed due to high localized electric field. Stable field emission is tested in a vacuum chamber. The results are of significance to the development of Graphene based field emitters. © 2013 IEEE.

Preparation and characterization of Si sheets by renewed SSP technique

Silicon sheets from powder (SSP) ribbons have been prepared by modified SSP technique using electronic-grade (9N purity) silicon powder. The surface morphology, crystallographic quality, composition and electric properties of the SSP ribbons were investigated by surface profiler, X-ray diffraction (XRD), scanning electron microscopy (SEM), metallurgical microscope, Auger electron spectroscopy (AES) and four-point probe apparatus, respectively. The results show that the SSP ribbon made from electronic-grade silicon powder is a suitable candidate for the substrates of crystalline silicon thin film (CSiTF) solar cells, which could meet the primary requirements of CSiTF solar cell process on the substrates, including surface smoothness, crystallographic quality, purity and electric conductivity, etc. (C) 2004 Elsevier B.V. All rights reserved.

A VSLMS Style Tap-length Learning Algorithm for Structure Adaptation

Compared with the ordinary adaptive filter, the variable-length adaptive filter is more efficient (including smaller., lower power consumption and higher computational complexity output SNR) because of its tap-length learning algorithm, which is able to dynamically adapt its tap-length to the optimal tap-length that best balances the complexity and the performance of the adaptive filter. Among existing tap-length algorithms, the LMS-style Variable Tap-Length Algorithm (also called Fractional Tap-Length Algorithm or FT Algorithm) proposed by Y.Gong has the best performance because it has the fastest convergence rates and best stability. However, in some cases its performance deteriorates dramatically. To solve this problem, we first analyze the FT algorithm and point out some of its defects. Second, we propose a new FT algorithm called 'VSLMS' (Variable Step-size LMS) Style Tap-Length Learning Algorithm, which not only uses the concept of FT but also introduces a new concept of adaptive convergence slope. With this improvement the new FT algorithm has even faster convergence rates and better stability. Finally, we offer computer simulations to verify this improvement.

An 8-b 1-GSmaples/s CMOS cascaded folding and interpolating ADC

This paper presents an 8-bit low power cascaded folding and interpolating analog-to-digital converter (ADC). A reduction in the number of comparators, equal to the number of times the signal is folded, is obtained. The interleaved architecture is used to improve the sampling rate of the ADC. The circuit including a bandgap is implemented in a 0.18-mu m CMOS technology, and measures 1.47 mm X 1.47 mm (including pads). The simulation results illustrate a conversion rate of 1-GSamples/s and a power dissipation of less than 290mW.

Construction of 2-D directional filter bank by cascading checkerboard-shaped filter pair and CMFB

In this paper, we propose a new approach to construct a 2-dimensional (2-D) directional filter bank (DFB) by cascading a 2-D nonseparable checkerboard-shaped filter pair and 2-D separable cosine modulated filter bank (CMFB). Similar to diagonal subbands in 2-D separable wavelets, most of the subbands in 2-D separable CMFBs, tensor products of two 1-D CMFBs, are poor in directional selectivity due to the fact that the frequency supports of most of the subband filters are concentrated along two different directions. To improve the directional selectivity, we propose a new DFB to realize the subband decomposition. First, a checkerboard-shaped filter pair is used to decompose an input image into two images containing different directional information of the original image. Next, a 2-D separable CMFB is applied to each of the two images for directional decomposition. The new DFB is easy in design and has merits: low redundancy ratio and fine directional-frequency tiling. As its application, the BLS-GSM algorithm for image denoising is extended to use the new DFBs. Experimental results show that the proposed DFB achieves better denoising performance than the methods using other DFBs for images of abundant textures. (C) 2008 Elsevier B.V. All rights reserved.

Optimization of Global Signal Networks for Island-Style FPGAs

We present a staggered buffer connection method that provides flexibility for buffer insertion while designing global signal networks using the tile-based FPGA design methodology. An exhaustive algorithm is used to analyze the trade-off between area and speed of the global signal networks for this staggered buffer insertion scheme, and the criterion for determining the design parameters is presented. The comparative analytic result shows that the methods in this paper are proven to be more efficient for FPGAs with a large array size.