Hardware implementation of 4x4 DCT/Quantization block using multiplication and error-free algorithm

The 4ÃÂ4 discrete cosine transform is one of the most important building blocks for the emerging video coding standard, viz. H.264. The conventional implementation does some approximation to the transform matrix elements to facilitate integer arithmetic, for which hardware is suitably prepared. Though the transform coding does not involve any multiplications, quantization process requires sixteen 16-bit multiplications. The algorithm used here eliminates the process of approximation in transform coding and multiplication in the quantization process, by usage of algebraic integer coding. We propose an area-efficient implementation of the transform and quantization blocks based on the algebraic integer coding. The designs were synthesized with 90 nm TSMC CMOS technology and were also implemented on a Xilinx FPGA. The gate counts and throughput achievable in this case are 7000 and 125 Msamples/sec.

FREP: A Soft-Error Resilient Pipelined RISC Architecture

Soft error has become one of the major areas of attention with the device scaling and large scale integration. Lot of variants for superscalar architecture were proposed with focus on program re-execution, thread re-execution and instruction re-execution. In this paper we proposed a fault tolerant micro-architecture of pipelined RISC. The proposed architecture, Floating Resources Extended pipeline (FREP), re-executes the instructions using extended pipeline stages. The instructions are re-executed by hybrid architecture with a suitable combination of space and time redundancy.

Modified Stability Checking for On-Line Error Detection

The paper propose a unified error detection technique, based on stability checking, for on-line detection of delay, crosstalk and transient faults in combinational circuits and SEUs in sequential elements. The proposed method, called modified stability checking (MSC), overcomes the limitations of the earlier stability checking methods. The paper also proposed a novel checker circuit to realize this scheme. The checker is self-checking for a wide set of realistic internal faults including transient faults. Extensive circuit simulations have been done to characterize the checker circuit. A prototype checker circuit for a 1mm2 standard cell array has been implemented in a 0.13mum process.

Maximum Margin Classifiers with Specified False Positive and False Negative Error Rates

This paper addresses the problem of maximum margin classification given the moments of class conditional densities and the false positive and false negative error rates. Using Chebyshev inequalities, the problem can be posed as a second order cone programming problem. The dual of the formulation leads to a geometric optimization problem, that of computing the distance between two ellipsoids, which is solved by an iterative algorithm. The formulation is extended to non-linear classifiers using kernel methods. The resultant classifiers are applied to the case of classification of unbalanced datasets with asymmetric costs for misclassification. Experimental results on benchmark datasets show the efficacy of the proposed method.

Digital Deadbeat Control Tuning for dc-dc Converters Using Error Correlation

This letter proposes a simple tuning algorithm for digital deadbeat control based on error correlation. By injecting a square-wave reference input and calculating the correlation of the control error, a gain correction for deadbeat control is obtained. The proposed solution is simple, it requires a short tuning time, and it is suitable for different DC-DC converter topologies. Simulation and experimental results on synchronous buck converters confirm the properties of the proposed tuning algorithm.

A Hybrid Energy-insensitive Explicit Guidance Scheme for Long Range Flight Vehicles with Solid Motors

Combining the newly developed nonlinear model predictive static programming technique with null range direction concept, a novel explicit energy-insensitive guidance design method is presented in this paper for long range flight vehicles, which leads to a closed form solution of the necessary guidance command update. Owing to the closed form nature, it does not lead to computational difficulties and the proposed optimal guidance algorithm can be implemented online. The guidance law is verified in a solid motor propelled long range flight vehicle, for which coming up with an effective guidance law is more difficult as compared to a liquid engine propelled vehicle (mainly because of the absence of thrust cutoff facility). Assuming the starting point of the second stage to be a deterministic point beyond the atmosphere, the scheme guides the vehicle properly so that it completes the mission within a tight error bound. The simulation results demonstrate its ability to intercept the target, even with an uncertainty of greater than 10% in burnout time.

Nonlinear Suboptimal Guidance with Impact Angle Constraint for Slow Moving Targets in 1-D Using MPSP

Using a recently developed method named as model predictive static programming (MPSP), a nonlinear suboptimal guidance law for a constant speed missile against a slow moving target with impact angle constraint is proposed. In this paper MPSP technique leads to a closed form solution of the latax history update for the given problem. Guidance command is the latax,which is normal to the missile velocity and the terminal constraints are miss distance and impact angle. The new guidance law is validated by considering the nonlinear kinematics with both lag-free and first order autopilot delay.