987 resultados para SENSITIVE ION-CHANNEL
Resumo:
Foreign mRNA was expressed in Xenopus laevis oocytes. Newly expressed ion currents localized in defined plasma membrane areas were measured using the two-electrode voltage clamp technique in combination with a specially designed chamber, that exposed only part of the surface on the oocytes to channel agonists or inhibitors. Newly expressed currents were found to be unequally distributed in the surface membrane of the oocyte. This asymmetry was most pronounced during the early phase of expression, when channels could almost exclusively be detected in the animal hemisphere of the oocyte. 4 d after injection of the mRNA, or later, channels could be found at a threefold higher density at the animal than at the vegetal pole area. The pattern of distribution was observed to be similar with various ion channels expressed from crude tissue mRNA and from cRNAs coding for rat GABAA receptor channel subunits. Electron microscopical analysis revealed very similar microvilli patterns at both oocyte pole areas. Thus, the asymmetric current distribution is not due to asymmetric surface structure. Upon incubation during the expression period in either colchicine or cytochalasin D, the current density was found to be equal in both pole areas. The inactive control substance beta-lumicolchicine had no effect on the asymmetry of distribution. Colchicine was without effect on the amplitude of the expressed whole cell current. Our measurements reveal a pathway for plasma membrane protein expression endogenous to the Xenopus oocyte, that may contribute to the formation and maintenance of polarity of this highly organized cell.
Resumo:
A search for supersymmetric particles in final states with zero, one, and two leptons, with and without jets identified as originating from b-quarks, in 4.7 fb(-1) of root s = 7 TeV pp collisions produced by the Large Hadron Collider and recorded by the ATLAS detector is presented. The search uses a set of variables carrying information on the event kinematics transverse and parallel to the beam line that are sensitive to several topologies expected in supersymmetry. Mutually exclusive final states are defined, allowing a combination of all channels to increase the search sensitivity. No deviation from the Standard Model expectation is observed. Upper limits at 95 % confidence level on visible cross-sections for the production of new particles are extracted. Results are interpreted in the context of the constrained minimal supersymmetric extension to the Standard Model and in supersymmetry-inspired models with diverse, high-multiplicity final states.
Resumo:
Aldosterone promotes electrogenic sodium reabsorption through the amiloride-sensitive epithelial sodium channel (ENaC). Here, we investigated the importance of ENaC and its positive regulator channel-activating protease 1 (CAP1/Prss8) in colon. Mice lacking the αENaC subunit in colonic superficial cells (Scnn1a(KO)) were viable, without fetal or perinatal lethality. Control mice fed a regular or low-salt diet had a significantly higher amiloride-sensitive rectal potential difference (∆PDamil) than control mice fed a high-salt diet. In Scnn1a(KO) mice, however, this salt restriction-induced increase in ∆PDamil did not occur, and the circadian rhythm of ∆PDamil was blunted. Plasma and urinary sodium and potassium did not change with regular or high-salt diets or potassium loading in control or Scnn1a(KO) mice. However, Scnn1a(KO) mice fed a low-salt diet lost significant amounts of sodium in their feces and exhibited high plasma aldosterone and increased urinary sodium retention. Mice lacking the CAP1/Prss8 in colonic superficial cells (Prss8(KO)) were viable, without fetal or perinatal lethality. Compared with controls, Prss8(KO) mice fed regular or low-salt diets exhibited significantly reduced ∆PDamil in the afternoon, but the circadian rhythm was maintained. Prss8(KO) mice fed a low-salt diet also exhibited sodium loss through feces and higher plasma aldosterone levels. Thus, we identified CAP1/Prss8 as an in vivo regulator of ENaC in colon. We conclude that, under salt restriction, activation of the renin-angiotensin-aldosterone system in the kidney compensated for the absence of ENaC in colonic surface epithelium, leading to colon-specific pseudohypoaldosteronism type 1 with mineralocorticoid resistance without evidence of impaired potassium balance.
Resumo:
Fission fragment mass distributions were measured in heavy-ion induced fission of 238U. The mass distributions changed drastically with incident energy. The results are explained by a change of the ratio between fusion and quasifission with nuclear orientation. A calculation based on a fluctuation dissipation model reproduced the mass distributions and their incident energy dependence. Fusion probability was determined in the analysis. Evaporation residue cross sections were calculated with a statistical model for the reactions of 30Si+238U and 34S+238U using the obtained fusion probability in the entrance channel. The results agree with the measured cross sections of 263,264Sg and 267,268Hs, produced by 30Si+238U and 34S+238U, respectively. It is also suggested that sub-barrier energies can be used for heavy element synthesis.
Resumo:
Measurements of fiducial and differential cross sections are presented for Higgs boson production in proton-proton collisions at a centre-of-mass energy of √s = 8TeV. The analysis is performed in the H → γγ decay channel using 20.3 fb−1 of data recorded by the ATLAS experiment at the CERN Large Hadron Collider. The signal is extracted using a fit to the diphoton invariant mass spectrum assuming that the width of the resonance is much smaller than the experimental resolution. The signal yields are corrected for the effects of detector inefficiency and resolution. The pp → H → γγ fiducial cross section is measured to be 43.2 ±9.4 (stat.) +3.2 −2.9 (syst.) ±1.2 (lumi) fb for a Higgs boson of mass 125.4 GeV decaying to two isolated photons that have transverse momentum greater than 35% and 25% of the diphoton invariant mass and each with absolute pseudorapidity less than 2.37. Four additional fiducial cross sections and two cross-section limits are presented in phase space regions that test the theoretical modelling of different Higgs boson production mechanisms, or are sensitive to physics beyond the Standard Model. Differential cross sections are also presented, as a function of variables related to the diphoton kinematics and the jet activity produced in the Higgs boson events. The observed spectra are statistically limited but broadly in line with the theoretical expectations.
Resumo:
The cardiac voltage-gated Na(+) channel, Na(V)1.5, is responsible for the upstroke of the action potential in cardiomyocytes and for efficient propagation of the electrical impulse in the myocardium. Even subtle alterations of Na(V)1.5 function, as caused by mutations in its gene SCN5A, may lead to many different arrhythmic phenotypes in carrier patients. In addition, acquired malfunctions of Na(V)1.5 that are secondary to cardiac disorders such as heart failure and cardiomyopathies, may also play significant roles in arrhythmogenesis. While it is clear that the regulation of Na(V)1.5 protein expression and function tightly depends on genetic mechanisms, recent studies have demonstrated that Na(V)1.5 is the target of various post-translational modifications that are pivotal not only in physiological conditions, but also in disease. In this review, we examine the recent literature demonstrating glycosylation, phosphorylation by Protein Kinases A and C, Ca(2+)/Calmodulin-dependent protein Kinase II, Phosphatidylinositol 3-Kinase, Serum- and Glucocorticoid-inducible Kinases, Fyn and Adenosine Monophosphate-activated Protein Kinase, methylation, acetylation, redox modifications, and ubiquitylation of Na(V)1.5. Modern and sensitive mass spectrometry approaches, applied directly to channel proteins that were purified from native cardiac tissues, have enabled the determination of the precise location of post-translational modification sites, thus providing essential information for understanding the mechanistic details of these regulations. The current challenge is first, to understand the roles of these modifications on the expression and the function of Na(V)1.5, and second, to further identify other chemical modifications. It is postulated that the diversity of phenotypes observed with Na(V)1.5-dependent disorders may partially arise from the complex post-translational modifications of channel protein components.
Resumo:
Mineralocorticoids (DOCA) are known to increase Na('+) absorption and K('+) secretion in the rabbit cortical collecting duct (CCD). However, the mechanism of regulation of the apical and basolateral cell membranes and tight junction ion conductive pathways (G('a), G('b), and G('tj), respectively) by mineralocorticoids are only partially understood. Using electrophysiological techniques and microelectrodes it was demonstrated that the apical cell membrane contained a dominant Ba('2+) sensitive K('+) conductive pathway, G(,K)('a), and an amiloride sensitive Na('+) conductive pathway, G(,Na)('a). The basolateral membrane contained a dominant Cl('-) conductive pathway, G(,Cl)('b), and a significant Ba('2+) sensitive K('+) conductive pathway, G(,K)('b). Upon elevating the mineralocorticoid levels of rabbits with intact adrenal glands it was found that V('te) was significantly increased after 1 day with a further increase after 13-16 days. These results indicated both primary and secondary effects of mineralocorticoid elevation. After 1 day of DOCA treatment, G(,Na)('a), I(,Na)('a) and I(,K)('a) increased by more than 2-fold and were maintained at high levels after 13-16 days of DOCA treatment. Secondary (chronic) effects of mineralocorticoids were evident after 4 days or more of DOCA treatment. These included a significant increase in G(,K)('a) from 4.0 to 10.2 mS.cm('-2) and a hyperpolarization of V('b) by -20 mV after 4 days of treatment. After 13-16 days of DOCA treatment V('b) remained hyperpolarized at -98.1 mV and G('tj) decreased from 5.6 to 4.2 mS.cm('-2). The hyperpolarization of V('b) was due to an increase in electrogenic Na('+) pump activity as the pump current, I(,act)('b), increased significantly from 35.7 to 195.2 (mu)A.cm('-2). Whereas net passive K('+) current across the basolateral membrane, I(,K)('b), was near zero in the control group of animals, i.e., K('+) near equilibrium, I(,K)('b) was approximately -40 (mu)A.cm('-2) in chronic DOCA treated animals. These results demonstrate that the initial effect of mineralocorticoid elevation is to increase G(,Na)('a). The ensuing depolarization of the apical membrane increases the driving force for K('+) exit into the lumen. Between 1 and 4 days of elevation, G(,K)('a) more than doubles in magnitude and at the same time the electrogenic activity of the Na('+) pump increases. This results in a hyperpolarization of V('b) which increases the driving force for K('+) uptake from the bath to the cell through a basolateral membrane conductive pathway. After 13-16 days G('tj) decreases thereby serving to maintain high electrochemical gradients across the epithelium. Therefore, the long term effects of mineralocorticoid elevation on the CCD appear to be adaptive mechanisms that serve to maintain high levels of K('+) secretion and Na('+) absorption. ^
Resumo:
Although frequently cured of Hodgkin lymphoma, adolescents and young adults can develop radiation induced second cancers. These patients could potentially benefit from scanned ion radiotherapy yet likely would require motion mitigation strategies. In theory, four-dimensional (4D) optimization of ion beam fields for individual motion states of respiration can enable superior sparing of healthy tissue near moving targets, compared to other motion mitigation strategies. Furthermore, carbon-ion therapy can sometimes provide greater relative biological effectiveness (RBE) for cell sterilization in a target but nearly equivalent RBE in tissue upstream of the target, compared to proton therapy. Thus, we expected that for some patients with Hodgkin lymphoma, carbon-ion therapy would reduce the predicted risk of second cancer incidence in the breast compared with proton therapy. The purpose of this work was to determine whether 4D-optimized carbon-ion therapy would significantly reduce the predicted risk of radiation induced second cancers in the breast for female Hodgkin lymphoma patients while preserving tumor control compared with proton therapy. To achieve our goals, we first investigated whether 4D-optimized carbon beam tracking could reduce dose to volumes outside a moving target compared with 3D-optimized carbon beam tracking while preserving target dose coverage. To understand the reliability of scanned carbon beam tracking, we studied the robustness of dose distributions in thoracic targets to uncertainties in patient motion. Finally, we investigated whether using carbon-ion therapy instead of proton therapy would significantly reduce the predicted risk of second cancer in the breast for a sample of Hodgkin lymphoma patients. We found that 4D-optimized ion beam tracking therapy can reduce the maximum dose to critical structures near a moving target by as much as 53%, compared to 3D-optimized ion beam tracking therapy. We validated these findings experimentally using a scanned carbon ion synchrotron and a motion phantom. We found scanned carbon beam tracking to be sensitive to a number of motion uncertainties, most notably phase delays in tracking, systematic spatial errors, and interfractional motion changes. Our findings indicate that a lower risk of second cancer in the breast might be expected for some Hodgkin lymphoma patients using carbon-ion therapy instead of proton therapy. For our reference scenario, we found the ratio of risk to be 0.77 ± 0.35 for radiogenic breast cancer after carbon-ion therapy versus proton therapy. Our findings were dependent on the RBE values for tumor induction and the radiosensitivity of breast tissue, as well as the physical dose distribution.
Resumo:
To identify the properties of taxa sensitive and resistant to ocean acidification (OA), we tested the hypothesis that coral reef calcifiers differ in their sensitivity to OA as predictable outcomes of functional group alliances determined by conspicuous traits. We contrasted functional groups of eight corals and eight calcifying algae defined by morphology in corals and algae, skeletal structure in corals, spatial location of calcification in algae, and growth rate in corals and algae. The responses of calcification to OA were unrelated to morphology and skeletal structure in corals; they were, however, affected by growth rate in corals and algae (fast calcifiers were more sensitive than slow calcifiers), and by the site of calcification and morphology in algae. Species assemblages characterized by fast growth, and for algae, also cell-wall calcification, are likely to be ecological losers in the future ocean. This shift in relative success will affect the relative and absolute species abundances as well as the goods and services provided by coral reefs.
Resumo:
The ocean plays a major role in the global carbon cycle, and attempts to reconstruct past changes in the marine carbonate system are increasing. The speciation of dissolved uranium is sensitive to variations in carbonate system parameters, and previous studies have shown that this is recorded in the uranium-to-calcium ratio (U/Ca) of the calcite shells of planktonic foraminifera. Here we test whether U/Ca ratios of deep-sea benthic foraminifera are equally suited as an indicator of the carbonate system. We compare U/Ca in two common benthic foraminifer species (Planulina wuellerstorfi and Cibicidoides mundulus) from South Atlantic core top samples with the calcite saturation state (Delta [CO3**2-] = [CO3**2-]in situ - [CO3**2-]sat) of the ambient seawater and find significant negative correlations for both species. Compared with planktonic foraminifera, the sensitivity of U/Ca in benthic foraminifera to changes in Delta [CO3**2-] is about 1 order of magnitude higher. Although Delta [CO3**2-] exerts the dominant control on the average foraminiferal U/Ca, the intertest and intratest variability indicates the presence of additional factors forcing U/Ca.
Resumo:
Coccolithophores are important calcifying phytoplankton predicted to be impacted by changes in ocean carbonate chemistry caused by the absorption of anthropogenic CO2. However, it is difficult to disentangle the effects of the simultaneously changing carbonate system parameters (CO2, bicarbonate, carbonate and protons) on the physiological responses to elevated CO2. Here, we adopted a multifactorial approach at constant pH or CO2 whilst varying dissolved inorganic carbon (DIC) to determine physiological and transcriptional responses to individual carbonate system parameters. We show that Emiliania huxleyi is sensitive to low CO2 (growth and photosynthesis) and low bicarbonate (calcification) as well as low pH beyond a limited tolerance range, but is much less sensitive to elevated CO2 and bicarbonate. Multiple up-regulated genes at low DIC bear the hallmarks of a carbon-concentrating mechanism (CCM) that is responsive to CO2 and bicarbonate but not to pH. Emiliania huxleyi appears to have evolved mechanisms to respond to limiting rather than elevated CO2. Calcification does not function as a CCM, but is inhibited at low DIC to allow the redistribution of DIC from calcification to photosynthesis. The presented data provides a significant step in understanding how E. huxleyi will respond to changing carbonate chemistry at a cellular level
Resumo:
Ocean Acidification (OA) has been shown to affect photosynthesis and calcification in the coccolithophore Emiliania huxleyi, a cosmopolitan calcifier that significantly contributes to the regulation of the biological carbon pumps. Its non-calcifying, haploid life-cycle stage was found to be relatively unaffected by OA with respect to biomass production. Deeper insights into physiological key processes and their dependence on environmental factors are lacking, but are required to understand and possibly estimate the dynamics of carbon cycling in present and future oceans. Therefore, calcifying diploid and non-calcifying haploid cells were acclimated to present and future CO2 partial pressures (pCO2; 38.5 Pa vs. 101.3 Pa CO2) under low and high light (50 vs. 300 µmol photons/m**2 /s). Comparative microarray-based transcriptome profiling was used to screen for the underlying cellular processes and allowed to follow up interpretations derived from physiological data. In the diplont, the observed increases in biomass production under OA are likely caused by stimulated production of glycoconjugates and lipids. The observed lowered calcification under OA can be attributed to impaired signal-transduction and ion-transport. The haplont utilizes distinct genes and metabolic pathways, reflecting the stage-specific usage of certain portions of the genome. With respect to functionality and energy-dependence, however, the transcriptomic OA-responses resemble those of the diplont. In both life-cycle stages, OA affects the cellular redox-state as a master regulator and thereby causes a metabolic shift from oxidative towards reductive pathways, which involves a reconstellation of carbon flux networks within and across compartments. Whereas signal transduction and ion-homeostasis appear equally OA-sensitive under both light intensities, the effects on carbon metabolism and light physiology are clearly modulated by light availability. These interactive effects can be attributed to the influence of OA and light on the redox equilibria of NAD and NADP, which function as major sensors for energization and stress. This generic mode of action of OA may therefore provoke similar cell-physiological responses in other protists.
Resumo:
In laser-plasma experiments, we observed that ion acceleration from the Coulomb explosion of the plasma channel bored by the laser, is prevented when multiple plasma instabilities such as filamentation and hosing, and nonlinear coherent structures (vortices/post-solitons) appear in the wake of an ultrashort laser pulse. The tailoring of the longitudinal plasma density ramp allows us to control the onset of these insabilities. We deduced that the laser pulse is depleted into these structures in our conditions, when a plasma at about 10% of the critical density exhibits a gradient on the order of 250 {\mu}m (gaussian fit), thus hindering the acceleration. A promising experimental setup with a long pulse is demonstrated enabling the excitation of an isolated coherent structure for polarimetric measurements and, in further perspectives, parametric studies of ion plasma acceleration efficiency.
Resumo:
Esta tesis doctoral se centra principalmente en técnicas de ataque y contramedidas relacionadas con ataques de canal lateral (SCA por sus siglas en inglés), que han sido propuestas dentro del campo de investigación académica desde hace 17 años. Las investigaciones relacionadas han experimentado un notable crecimiento en las últimas décadas, mientras que los diseños enfocados en la protección sólida y eficaz contra dichos ataques aún se mantienen como un tema de investigación abierto, en el que se necesitan iniciativas más confiables para la protección de la información persona de empresa y de datos nacionales. El primer uso documentado de codificación secreta se remonta a alrededor de 1700 B.C., cuando los jeroglíficos del antiguo Egipto eran descritos en las inscripciones. La seguridad de la información siempre ha supuesto un factor clave en la transmisión de datos relacionados con inteligencia diplomática o militar. Debido a la evolución rápida de las técnicas modernas de comunicación, soluciones de cifrado se incorporaron por primera vez para garantizar la seguridad, integridad y confidencialidad de los contextos de transmisión a través de cables sin seguridad o medios inalámbricos. Debido a las restricciones de potencia de cálculo antes de la era del ordenador, la técnica de cifrado simple era un método más que suficiente para ocultar la información. Sin embargo, algunas vulnerabilidades algorítmicas pueden ser explotadas para restaurar la regla de codificación sin mucho esfuerzo. Esto ha motivado nuevas investigaciones en el área de la criptografía, con el fin de proteger el sistema de información ante sofisticados algoritmos. Con la invención de los ordenadores se ha acelerado en gran medida la implementación de criptografía segura, que ofrece resistencia eficiente encaminada a obtener mayores capacidades de computación altamente reforzadas. Igualmente, sofisticados cripto-análisis han impulsado las tecnologías de computación. Hoy en día, el mundo de la información ha estado involucrado con el campo de la criptografía, enfocada a proteger cualquier campo a través de diversas soluciones de cifrado. Estos enfoques se han fortalecido debido a la unificación optimizada de teorías matemáticas modernas y prácticas eficaces de hardware, siendo posible su implementación en varias plataformas (microprocesador, ASIC, FPGA, etc.). Las necesidades y requisitos de seguridad en la industria son las principales métricas de conducción en el diseño electrónico, con el objetivo de promover la fabricación de productos de gran alcance sin sacrificar la seguridad de los clientes. Sin embargo, una vulnerabilidad en la implementación práctica encontrada por el Prof. Paul Kocher, et al en 1996 implica que un circuito digital es inherentemente vulnerable a un ataque no convencional, lo cual fue nombrado posteriormente como ataque de canal lateral, debido a su fuente de análisis. Sin embargo, algunas críticas sobre los algoritmos criptográficos teóricamente seguros surgieron casi inmediatamente después de este descubrimiento. En este sentido, los circuitos digitales consisten típicamente en un gran número de celdas lógicas fundamentales (como MOS - Metal Oxide Semiconductor), construido sobre un sustrato de silicio durante la fabricación. La lógica de los circuitos se realiza en función de las innumerables conmutaciones de estas células. Este mecanismo provoca inevitablemente cierta emanación física especial que puede ser medida y correlacionada con el comportamiento interno del circuito. SCA se puede utilizar para revelar datos confidenciales (por ejemplo, la criptografía de claves), analizar la arquitectura lógica, el tiempo e incluso inyectar fallos malintencionados a los circuitos que se implementan en sistemas embebidos, como FPGAs, ASICs, o tarjetas inteligentes. Mediante el uso de la comparación de correlación entre la cantidad de fuga estimada y las fugas medidas de forma real, información confidencial puede ser reconstruida en mucho menos tiempo y computación. Para ser precisos, SCA básicamente cubre una amplia gama de tipos de ataques, como los análisis de consumo de energía y radiación ElectroMagnética (EM). Ambos se basan en análisis estadístico y, por lo tanto, requieren numerosas muestras. Los algoritmos de cifrado no están intrínsecamente preparados para ser resistentes ante SCA. Es por ello que se hace necesario durante la implementación de circuitos integrar medidas que permitan camuflar las fugas a través de "canales laterales". Las medidas contra SCA están evolucionando junto con el desarrollo de nuevas técnicas de ataque, así como la continua mejora de los dispositivos electrónicos. Las características físicas requieren contramedidas sobre la capa física, que generalmente se pueden clasificar en soluciones intrínsecas y extrínsecas. Contramedidas extrínsecas se ejecutan para confundir la fuente de ataque mediante la integración de ruido o mala alineación de la actividad interna. Comparativamente, las contramedidas intrínsecas están integradas en el propio algoritmo, para modificar la aplicación con el fin de minimizar las fugas medibles, o incluso hacer que dichas fugas no puedan ser medibles. Ocultación y Enmascaramiento son dos técnicas típicas incluidas en esta categoría. Concretamente, el enmascaramiento se aplica a nivel algorítmico, para alterar los datos intermedios sensibles con una máscara de manera reversible. A diferencia del enmascaramiento lineal, las operaciones no lineales que ampliamente existen en criptografías modernas son difíciles de enmascarar. Dicho método de ocultación, que ha sido verificado como una solución efectiva, comprende principalmente la codificación en doble carril, que está ideado especialmente para aplanar o eliminar la fuga dependiente de dato en potencia o en EM. En esta tesis doctoral, además de la descripción de las metodologías de ataque, se han dedicado grandes esfuerzos sobre la estructura del prototipo de la lógica propuesta, con el fin de realizar investigaciones enfocadas a la seguridad sobre contramedidas de arquitectura a nivel lógico. Una característica de SCA reside en el formato de las fuentes de fugas. Un típico ataque de canal lateral se refiere al análisis basado en la potencia, donde la capacidad fundamental del transistor MOS y otras capacidades parásitas son las fuentes esenciales de fugas. Por lo tanto, una lógica robusta resistente a SCA debe eliminar o mitigar las fugas de estas micro-unidades, como las puertas lógicas básicas, los puertos I/O y las rutas. Las herramientas EDA proporcionadas por los vendedores manipulan la lógica desde un nivel más alto, en lugar de realizarlo desde el nivel de puerta, donde las fugas de canal lateral se manifiestan. Por lo tanto, las implementaciones clásicas apenas satisfacen estas necesidades e inevitablemente atrofian el prototipo. Por todo ello, la implementación de un esquema de diseño personalizado y flexible ha de ser tomado en cuenta. En esta tesis se presenta el diseño y la implementación de una lógica innovadora para contrarrestar SCA, en la que se abordan 3 aspectos fundamentales: I. Se basa en ocultar la estrategia sobre el circuito en doble carril a nivel de puerta para obtener dinámicamente el equilibrio de las fugas en las capas inferiores; II. Esta lógica explota las características de la arquitectura de las FPGAs, para reducir al mínimo el gasto de recursos en la implementación; III. Se apoya en un conjunto de herramientas asistentes personalizadas, incorporadas al flujo genérico de diseño sobre FPGAs, con el fin de manipular los circuitos de forma automática. El kit de herramientas de diseño automático es compatible con la lógica de doble carril propuesta, para facilitar la aplicación práctica sobre la familia de FPGA del fabricante Xilinx. En este sentido, la metodología y las herramientas son flexibles para ser extendido a una amplia gama de aplicaciones en las que se desean obtener restricciones mucho más rígidas y sofisticadas a nivel de puerta o rutado. En esta tesis se realiza un gran esfuerzo para facilitar el proceso de implementación y reparación de lógica de doble carril genérica. La viabilidad de las soluciones propuestas es validada mediante la selección de algoritmos criptográficos ampliamente utilizados, y su evaluación exhaustiva en comparación con soluciones anteriores. Todas las propuestas están respaldadas eficazmente a través de ataques experimentales con el fin de validar las ventajas de seguridad del sistema. El presente trabajo de investigación tiene la intención de cerrar la brecha entre las barreras de implementación y la aplicación efectiva de lógica de doble carril. En esencia, a lo largo de esta tesis se describirá un conjunto de herramientas de implementación para FPGAs que se han desarrollado para trabajar junto con el flujo de diseño genérico de las mismas, con el fin de lograr crear de forma innovadora la lógica de doble carril. Un nuevo enfoque en el ámbito de la seguridad en el cifrado se propone para obtener personalización, automatización y flexibilidad en el prototipo de circuito de bajo nivel con granularidad fina. Las principales contribuciones del presente trabajo de investigación se resumen brevemente a continuación: Lógica de Precharge Absorbed-DPL logic: El uso de la conversión de netlist para reservar LUTs libres para ejecutar la señal de precharge y Ex en una lógica DPL. Posicionamiento entrelazado Row-crossed con pares idénticos de rutado en redes de doble carril, lo que ayuda a aumentar la resistencia frente a la medición EM selectiva y mitigar los impactos de las variaciones de proceso. Ejecución personalizada y herramientas de conversión automática para la generación de redes idénticas para la lógica de doble carril propuesta. (a) Para detectar y reparar conflictos en las conexiones; (b) Detectar y reparar las rutas asimétricas. (c) Para ser utilizado en otras lógicas donde se requiere un control estricto de las interconexiones en aplicaciones basadas en Xilinx. Plataforma CPA de pruebas personalizadas para el análisis de EM y potencia, incluyendo la construcción de dicha plataforma, el método de medición y análisis de los ataques. Análisis de tiempos para cuantificar los niveles de seguridad. División de Seguridad en la conversión parcial de un sistema de cifrado complejo para reducir los costes de la protección. Prueba de concepto de un sistema de calefacción auto-adaptativo para mitigar los impactos eléctricos debido a la variación del proceso de silicio de manera dinámica. La presente tesis doctoral se encuentra organizada tal y como se detalla a continuación: En el capítulo 1 se abordan los fundamentos de los ataques de canal lateral, que abarca desde conceptos básicos de teoría de modelos de análisis, además de la implementación de la plataforma y la ejecución de los ataques. En el capítulo 2 se incluyen las estrategias de resistencia SCA contra los ataques de potencia diferencial y de EM. Además de ello, en este capítulo se propone una lógica en doble carril compacta y segura como contribución de gran relevancia, así como también se presentará la transformación lógica basada en un diseño a nivel de puerta. Por otra parte, en el Capítulo 3 se abordan los desafíos relacionados con la implementación de lógica en doble carril genérica. Así mismo, se describirá un flujo de diseño personalizado para resolver los problemas de aplicación junto con una herramienta de desarrollo automático de aplicaciones propuesta, para mitigar las barreras de diseño y facilitar los procesos. En el capítulo 4 se describe de forma detallada la elaboración e implementación de las herramientas propuestas. Por otra parte, la verificación y validaciones de seguridad de la lógica propuesta, así como un sofisticado experimento de verificación de la seguridad del rutado, se describen en el capítulo 5. Por último, un resumen de las conclusiones de la tesis y las perspectivas como líneas futuras se incluyen en el capítulo 6. Con el fin de profundizar en el contenido de la tesis doctoral, cada capítulo se describe de forma más detallada a continuación: En el capítulo 1 se introduce plataforma de implementación hardware además las teorías básicas de ataque de canal lateral, y contiene principalmente: (a) La arquitectura genérica y las características de la FPGA a utilizar, en particular la Xilinx Virtex-5; (b) El algoritmo de cifrado seleccionado (un módulo comercial Advanced Encryption Standard (AES)); (c) Los elementos esenciales de los métodos de canal lateral, que permiten revelar las fugas de disipación correlacionadas con los comportamientos internos; y el método para recuperar esta relación entre las fluctuaciones físicas en los rastros de canal lateral y los datos internos procesados; (d) Las configuraciones de las plataformas de pruebas de potencia / EM abarcadas dentro de la presente tesis. El contenido de esta tesis se amplia y profundiza a partir del capítulo 2, en el cual se abordan varios aspectos claves. En primer lugar, el principio de protección de la compensación dinámica de la lógica genérica de precarga de doble carril (Dual-rail Precharge Logic-DPL) se explica mediante la descripción de los elementos compensados a nivel de puerta. En segundo lugar, la lógica PA-DPL es propuesta como aportación original, detallando el protocolo de la lógica y un caso de aplicación. En tercer lugar, dos flujos de diseño personalizados se muestran para realizar la conversión de doble carril. Junto con ello, se aclaran las definiciones técnicas relacionadas con la manipulación por encima de la netlist a nivel de LUT. Finalmente, una breve discusión sobre el proceso global se aborda en la parte final del capítulo. El Capítulo 3 estudia los principales retos durante la implementación de DPLs en FPGAs. El nivel de seguridad de las soluciones de resistencia a SCA encontradas en el estado del arte se ha degenerado debido a las barreras de implantación a través de herramientas EDA convencionales. En el escenario de la arquitectura FPGA estudiada, se discuten los problemas de los formatos de doble carril, impactos parásitos, sesgo tecnológico y la viabilidad de implementación. De acuerdo con estas elaboraciones, se plantean dos problemas: Cómo implementar la lógica propuesta sin penalizar los niveles de seguridad, y cómo manipular un gran número de celdas y automatizar el proceso. El PA-DPL propuesto en el capítulo 2 se valida con una serie de iniciativas, desde características estructurales como doble carril entrelazado o redes de rutado clonadas, hasta los métodos de aplicación tales como las herramientas de personalización y automatización de EDA. Por otra parte, un sistema de calefacción auto-adaptativo es representado y aplicado a una lógica de doble núcleo, con el fin de ajustar alternativamente la temperatura local para equilibrar los impactos negativos de la variación del proceso durante la operación en tiempo real. El capítulo 4 se centra en los detalles de la implementación del kit de herramientas. Desarrollado sobre una API third-party, el kit de herramientas personalizado es capaz de manipular los elementos de la lógica de circuito post P&R ncd (una versión binaria ilegible del xdl) convertido al formato XDL Xilinx. El mecanismo y razón de ser del conjunto de instrumentos propuestos son cuidadosamente descritos, que cubre la detección de enrutamiento y los enfoques para la reparación. El conjunto de herramientas desarrollado tiene como objetivo lograr redes de enrutamiento estrictamente idénticos para la lógica de doble carril, tanto para posicionamiento separado como para el entrelazado. Este capítulo particularmente especifica las bases técnicas para apoyar las implementaciones en los dispositivos de Xilinx y su flexibilidad para ser utilizado sobre otras aplicaciones. El capítulo 5 se enfoca en la aplicación de los casos de estudio para la validación de los grados de seguridad de la lógica propuesta. Se discuten los problemas técnicos detallados durante la ejecución y algunas nuevas técnicas de implementación. (a) Se discute el impacto en el proceso de posicionamiento de la lógica utilizando el kit de herramientas propuesto. Diferentes esquemas de implementación, tomando en cuenta la optimización global en seguridad y coste, se verifican con los experimentos con el fin de encontrar los planes de posicionamiento y reparación optimizados; (b) las validaciones de seguridad se realizan con los métodos de correlación y análisis de tiempo; (c) Una táctica asintótica se aplica a un núcleo AES sobre BCDL estructurado para validar de forma sofisticada el impacto de enrutamiento sobre métricas de seguridad; (d) Los resultados preliminares utilizando el sistema de calefacción auto-adaptativa sobre la variación del proceso son mostrados; (e) Se introduce una aplicación práctica de las herramientas para un diseño de cifrado completa. Capítulo 6 incluye el resumen general del trabajo presentado dentro de esta tesis doctoral. Por último, una breve perspectiva del trabajo futuro se expone, lo que puede ampliar el potencial de utilización de las contribuciones de esta tesis a un alcance más allá de los dominios de la criptografía en FPGAs. ABSTRACT This PhD thesis mainly concentrates on countermeasure techniques related to the Side Channel Attack (SCA), which has been put forward to academic exploitations since 17 years ago. The related research has seen a remarkable growth in the past decades, while the design of solid and efficient protection still curiously remain as an open research topic where more reliable initiatives are required for personal information privacy, enterprise and national data protections. The earliest documented usage of secret code can be traced back to around 1700 B.C., when the hieroglyphs in ancient Egypt are scribed in inscriptions. Information security always gained serious attention from diplomatic or military intelligence transmission. Due to the rapid evolvement of modern communication technique, crypto solution was first incorporated by electronic signal to ensure the confidentiality, integrity, availability, authenticity and non-repudiation of the transmitted contexts over unsecure cable or wireless channels. Restricted to the computation power before computer era, simple encryption tricks were practically sufficient to conceal information. However, algorithmic vulnerabilities can be excavated to restore the encoding rules with affordable efforts. This fact motivated the development of modern cryptography, aiming at guarding information system by complex and advanced algorithms. The appearance of computers has greatly pushed forward the invention of robust cryptographies, which efficiently offers resistance relying on highly strengthened computing capabilities. Likewise, advanced cryptanalysis has greatly driven the computing technologies in turn. Nowadays, the information world has been involved into a crypto world, protecting any fields by pervasive crypto solutions. These approaches are strong because of the optimized mergence between modern mathematical theories and effective hardware practices, being capable of implement crypto theories into various platforms (microprocessor, ASIC, FPGA, etc). Security needs from industries are actually the major driving metrics in electronic design, aiming at promoting the construction of systems with high performance without sacrificing security. Yet a vulnerability in practical implementation found by Prof. Paul Kocher, et al in 1996 implies that modern digital circuits are inherently vulnerable to an unconventional attack approach, which was named as side-channel attack since then from its analysis source. Critical suspicions to theoretically sound modern crypto algorithms surfaced almost immediately after this discovery. To be specifically, digital circuits typically consist of a great number of essential logic elements (as MOS - Metal Oxide Semiconductor), built upon a silicon substrate during the fabrication. Circuit logic is realized relying on the countless switch actions of these cells. This mechanism inevitably results in featured physical emanation that can be properly measured and correlated with internal circuit behaviors. SCAs can be used to reveal the confidential data (e.g. crypto-key), analyze the logic architecture, timing and even inject malicious faults to the circuits that are implemented in hardware system, like FPGA, ASIC, smart Card. Using various comparison solutions between the predicted leakage quantity and the measured leakage, secrets can be reconstructed at much less expense of time and computation. To be precisely, SCA basically encloses a wide range of attack types, typically as the analyses of power consumption or electromagnetic (EM) radiation. Both of them rely on statistical analyses, and hence require a number of samples. The crypto algorithms are not intrinsically fortified with SCA-resistance. Because of the severity, much attention has to be taken into the implementation so as to assemble countermeasures to camouflage the leakages via "side channels". Countermeasures against SCA are evolving along with the development of attack techniques. The physical characteristics requires countermeasures over physical layer, which can be generally classified into intrinsic and extrinsic vectors. Extrinsic countermeasures are executed to confuse the attacker by integrating noise, misalignment to the intra activities. Comparatively, intrinsic countermeasures are built into the algorithm itself, to modify the implementation for minimizing the measurable leakage, or making them not sensitive any more. Hiding and Masking are two typical techniques in this category. Concretely, masking applies to the algorithmic level, to alter the sensitive intermediate values with a mask in reversible ways. Unlike the linear masking, non-linear operations that widely exist in modern cryptographies are difficult to be masked. Approved to be an effective counter solution, hiding method mainly mentions dual-rail logic, which is specially devised for flattening or removing the data-dependent leakage in power or EM signatures. In this thesis, apart from the context describing the attack methodologies, efforts have also been dedicated to logic prototype, to mount extensive security investigations to countermeasures on logic-level. A characteristic of SCA resides on the format of leak sources. Typical side-channel attack concerns the power based analysis, where the fundamental capacitance from MOS transistors and other parasitic capacitances are the essential leak sources. Hence, a robust SCA-resistant logic must eliminate or mitigate the leakages from these micro units, such as basic logic gates, I/O ports and routings. The vendor provided EDA tools manipulate the logic from a higher behavioral-level, rather than the lower gate-level where side-channel leakage is generated. So, the classical implementations barely satisfy these needs and inevitably stunt the prototype. In this case, a customized and flexible design scheme is appealing to be devised. This thesis profiles an innovative logic style to counter SCA, which mainly addresses three major aspects: I. The proposed logic is based on the hiding strategy over gate-level dual-rail style to dynamically overbalance side-channel leakage from lower circuit layer; II. This logic exploits architectural features of modern FPGAs, to minimize the implementation expenses; III. It is supported by a set of assistant custom tools, incorporated by the generic FPGA design flow, to have circuit manipulations in an automatic manner. The automatic design toolkit supports the proposed dual-rail logic, facilitating the practical implementation on Xilinx FPGA families. While the methodologies and the tools are flexible to be expanded to a wide range of applications where rigid and sophisticated gate- or routing- constraints are desired. In this thesis a great effort is done to streamline the implementation workflow of generic dual-rail logic. The feasibility of the proposed solutions is validated by selected and widely used crypto algorithm, for thorough and fair evaluation w.r.t. prior solutions. All the proposals are effectively verified by security experiments. The presented research work attempts to solve the implementation troubles. The essence that will be formalized along this thesis is that a customized execution toolkit for modern FPGA systems is developed to work together with the generic FPGA design flow for creating innovative dual-rail logic. A method in crypto security area is constructed to obtain customization, automation and flexibility in low-level circuit prototype with fine-granularity in intractable routings. Main contributions of the presented work are summarized next: Precharge Absorbed-DPL logic: Using the netlist conversion to reserve free LUT inputs to execute the Precharge and Ex signal in a dual-rail logic style. A row-crossed interleaved placement method with identical routing pairs in dual-rail networks, which helps to increase the resistance against selective EM measurement and mitigate the impacts from process variations. Customized execution and automatic transformation tools for producing identical networks for the proposed dual-rail logic. (a) To detect and repair the conflict nets; (b) To detect and repair the asymmetric nets. (c) To be used in other logics where strict network control is required in Xilinx scenario. Customized correlation analysis testbed for EM and power attacks, including the platform construction, measurement method and attack analysis. A timing analysis based method for quantifying the security grades. A methodology of security partitions of complex crypto systems for reducing the protection cost. A proof-of-concept self-adaptive heating system to mitigate electrical impacts over process variations in dynamic dual-rail compensation manner. The thesis chapters are organized as follows: Chapter 1 discusses the side-channel attack fundamentals, which covers from theoretic basics to analysis models, and further to platform setup and attack execution. Chapter 2 centers to SCA-resistant strategies against generic power and EM attacks. In this chapter, a major contribution, a compact and secure dual-rail logic style, will be originally proposed. The logic transformation based on bottom-layer design will be presented. Chapter 3 is scheduled to elaborate the implementation challenges of generic dual-rail styles. A customized design flow to solve the implementation problems will be described along with a self-developed automatic implementation toolkit, for mitigating the design barriers and facilitating the processes. Chapter 4 will originally elaborate the tool specifics and construction details. The implementation case studies and security validations for the proposed logic style, as well as a sophisticated routing verification experiment, will be described in Chapter 5. Finally, a summary of thesis conclusions and perspectives for future work are included in Chapter 5. To better exhibit the thesis contents, each chapter is further described next: Chapter 1 provides the introduction of hardware implementation testbed and side-channel attack fundamentals, and mainly contains: (a) The FPGA generic architecture and device features, particularly of Virtex-5 FPGA; (b) The selected crypto algorithm - a commercially and extensively used Advanced Encryption Standard (AES) module - is detailed; (c) The essentials of Side-Channel methods are profiled. It reveals the correlated dissipation leakage to the internal behaviors, and the method to recover this relationship between the physical fluctuations in side-channel traces and the intra processed data; (d) The setups of the power/EM testing platforms enclosed inside the thesis work are given. The content of this thesis is expanded and deepened from chapter 2, which is divided into several aspects. First, the protection principle of dynamic compensation of the generic dual-rail precharge logic is explained by describing the compensated gate-level elements. Second, the novel DPL is originally proposed by detailing the logic protocol and an implementation case study. Third, a couple of custom workflows are shown next for realizing the rail conversion. Meanwhile, the technical definitions that are about to be manipulated above LUT-level netlist are clarified. A brief discussion about the batched process is given in the final part. Chapter 3 studies the implementation challenges of DPLs in FPGAs. The security level of state-of-the-art SCA-resistant solutions are decreased due to the implementation barriers using conventional EDA tools. In the studied FPGA scenario, problems are discussed from dual-rail format, parasitic impact, technological bias and implementation feasibility. According to these elaborations, two problems arise: How to implement the proposed logic without crippling the security level; and How to manipulate a large number of cells and automate the transformation. The proposed PA-DPL in chapter 2 is legalized with a series of initiatives, from structures to implementation methods. Furthermore, a self-adaptive heating system is depicted and implemented to a dual-core logic, assumed to alternatively adjust local temperature for balancing the negative impacts from silicon technological biases on real-time. Chapter 4 centers to the toolkit system. Built upon a third-party Application Program Interface (API) library, the customized toolkit is able to manipulate the logic elements from post P&R circuit (an unreadable binary version of the xdl one) converted to Xilinx xdl format. The mechanism and rationale of the proposed toolkit are carefully convoyed, covering the routing detection and repairing approaches. The developed toolkit aims to achieve very strictly identical routing networks for dual-rail logic both for separate and interleaved placement. This chapter particularly specifies the technical essentials to support the implementations in Xilinx devices and the flexibility to be expanded to other applications. Chapter 5 focuses on the implementation of the case studies for validating the security grades of the proposed logic style from the proposed toolkit. Comprehensive implementation techniques are discussed. (a) The placement impacts using the proposed toolkit are discussed. Different execution schemes, considering the global optimization in security and cost, are verified with experiments so as to find the optimized placement and repair schemes; (b) Security validations are realized with correlation, timing methods; (c) A systematic method is applied to a BCDL structured module to validate the routing impact over security metric; (d) The preliminary results using the self-adaptive heating system over process variation is given; (e) A practical implementation of the proposed toolkit to a large design is introduced. Chapter 6 includes the general summary of the complete work presented inside this thesis. Finally, a brief perspective for the future work is drawn which might expand the potential utilization of the thesis contributions to a wider range of implementation domains beyond cryptography on FPGAs.
Resumo:
Conventional dual-rail precharge logic suffers from difficult implementations of dual-rail structure for obtaining strict compensation between the counterpart rails. As a light-weight and high-speed dual-rail style, balanced cell-based dual-rail logic (BCDL) uses synchronised compound gates with global precharge signal to provide high resistance against differential power or electromagnetic analyses. BCDL can be realised from generic field programmable gate array (FPGA) design flows with constraints. However, routings still exist as concerns because of the deficient flexibility on routing control, which unfavourably results in bias between complementary nets in security-sensitive parts. In this article, based on a routing repair technique, novel verifications towards routing effect are presented. An 8 bit simplified advanced encryption processing (AES)-co-processor is executed that is constructed on block random access memory (RAM)-based BCDL in Xilinx Virtex-5 FPGAs. Since imbalanced routing are major defects in BCDL, the authors can rule out other influences and fairly quantify the security variants. A series of asymptotic correlation electromagnetic (EM) analyses are launched towards a group of circuits with consecutive routing schemes to be able to verify routing impact on side channel analyses. After repairing the non-identical routings, Mutual information analyses are executed to further validate the concrete security increase obtained from identical routing pairs in BCDL.