993 resultados para Voltage stabilizing circuits


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Wind power, as an alternative to fossil fuels, is plentiful, renewable, widely distributed, clean, produces no greenhouse gas emissions during operation, and uses little land. In operation, the overall cost per unit of energy produced is similar to the cost for new coal and natural gas installations. However, the stochastic behaviour of wind speeds leads to significant disharmony between wind energy production and electricity demand. Wind generation suffers from an intermittent characteristics due to the own diurnal and seasonal patterns of the wind behaviour. Both reactive power and voltage control are important under varying operating conditions of wind farm. To optimize reactive power flow and to keep voltages in limit, an optimization method is proposed in this paper. The objective proposed is minimization of the voltage deviations of the load buses (Vdesired). The approach considers the reactive power limits of wind generators and co-ordinates the transformer taps. This algorithm has been tested under practically varying conditions simulated on a test system. The results are obtained on a system of 50-bus real life equivalent power network. The result shows the efficiency of the proposed method.

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A new scheme for nine-level voltage space-vector generation for medium-voltage induction motor (IM) drives with open-end stator winding is presented in this paper. The proposed nine-level power converter topology consists of two conventional three-phase two-level voltage source inverters powered by isolated dc sources and six floating-capacitor-connected H-bridges. The H-bridge capacitor voltages are effectively maintained at the required asymmetrical levels by employing a space vector modulation (SVPWM) based control strategy. An interesting feature of this topology is its ability to function in five-or three-level mode, in the entire modulation range, at full-power rating, in the event of any failure in the H-bridges. This feature significantly improves the reliability of the proposed drive system. Each leg of the three-phase two-level inverters used in this topology switches only for a half cycle of the reference voltage waveform. Hence, the effective switching frequency is reduced by half, resulting in switching loss reduction in high-voltage devices. The transient as well as the steady-state performance of the proposed nine-level inverter-fed IM drive system is experimentally verified in the entire modulation range including the overmodulation region.

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A circuit topology based on accumulate-and-use philosophy has been developed to harvest RF energy from ambient radiations such as those from cellular towers. Main functional units of this system are antenna, tuned rectifier, supercapacitor, a gated boost converter and the necessary power management circuits. Various RF aspects of the design philosophy for maximizing the conversion efficiency at an input power level of 15 mu W are presented here. The system is characterized in an anechoic chamber and it has been established that this topology can harvest RF power densities as low as 180 mu W/m(2) and can adaptively operate the load depending on the incident radiation levels. The output of this system can be easily configured at a desired voltage in the range 2.2-4.5 V. A practical CMOS load - a low power wireless radio module has been demonstrated to operate intermittently by this approach. This topology can be easily modified for driving other practical loads, from harvested RF energy at different frequencies and power levels.

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This paper proposes a new 3 level common mode voltage eliminated inverter using an inverter structure formed by cascading a H-Bridge with a three-level flying capacitor inverter. The three phase space vector polygon formed by this configuration and the polygon formed by the common-mode eliminated states have been discussed. The entire system is simulated in Simulink and the results are experimentally verified. This system has an advantage that if one of devices in the H-Bridge fails, the system can still be operated as a normal 3 level inverter mode at full power. This inverter has many advantages like use of single DC-supply, making it possible for a back to back grid-tied converter application, improved reliability etc.

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This paper presents the modelling and analysis of voltage stability at AC commutation bus in LCC (Line commutated converters) based multi-infeed HVDC system. The paper also presents the analysis of effects of various operating control modes in HVDC as well as location of disturbance on the voltage stability of the system under study. A new method of modelling the LCC converters as time varying admittance at the AC commutation bus is also presented in this paper. In this paper, the modelling of STATCOM for provision of dynamic voltage support at one of the AC buses of the HVDC system is presented. The reactive power injected by STATCOM is controlled by regulating the voltage of the AC bus to which STATCOM is connected. The case study also discusses the effects of various possible combinations of location of STATCOM and disturbance considered, on the voltage stability of the multi-infeed HVDC system.

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In this paper, we analyze the combined effects of size quantization and device temperature variations (T = 50K to 400 K) on the intrinsic carrier concentration (n(i)), electron concentration (n) and thereby on the threshold voltage (V-th) for thin silicon film (t(si) = 1 nm to 10 nm) based fully-depleted Double-Gate Silicon-on-Insulator MOSFETs. The threshold voltage (V-th) is defined as the gate voltage (V-g) at which the potential at the center of the channel (Phi(c)) begins to saturate (Phi(c) = Phi(c(sat))). It is shown that in the strong quantum confinement regime (t(si) <= 3nm), the effects of size quantization far over-ride the effects of temperature variations on the total change in band-gap (Delta E-g(eff)), intrinsic carrier concentration (n(i)), electron concentration (n), Phi(c(sat)) and the threshold voltage (V-th). On the other hand, for t(si) >= 4 nm, it is shown that size quantization effects recede with increasing t(si), while the effects of temperature variations become increasingly significant. Through detailed analysis, a physical model for the threshold voltage is presented both for the undoped and doped cases valid over a wide-range of device temperatures, silicon film thicknesses and substrate doping densities. Both in the undoped and doped cases, it is shown that the threshold voltage strongly depends on the channel charge density and that it is independent of incomplete ionization effects, at lower device temperatures. The results are compared with the published work available in literature, and it is shown that the present approach incorporates quantization and temperature effects over the entire temperature range. We also present an analytical model for V-th as a function of device temperature (T). (C) 2013 AIP Publishing LLC.

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The equivalence of triangle-comparison-based pulse width modulation (TCPWM) and space vector based PWM (SVPWM) during linear modulation is well-known. This paper analyses triangle-comparison based PWM techniques (TCPWM) such as sine-triangle PWM (SPWM) and common-mode voltage injection PWM during overmodulation from a space vector point of view. The average voltage vector produced by TCPWM during overmodulation is studied in the stationary (a-b) reference frame. This is compared and contrasted with the average voltage vector corresponding to the well-known standard two-zone algorithm for space vector modulated inverters. It is shown that the two-zone overmodulation algorithm itself can be derived from the variation of average voltage vector with TCPWM. The average voltage vector is further studied in a synchronously revolving (d-q) reference frame. The RMS value of low-order voltage ripple can be estimated, and can be used to compare harmonic distortion due to different PWM methods during overmodulation. The measured values of the total harmonic distortion (THD) in the line currents are presented at various fundamental frequencies. The relative values of measured current THD pertaining to different PWM methods tally with those of analytically evaluated RMS voltage ripple.

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The contribution of Tyr-His vs. Cys-His interacting pairs to the scaffold stability of (D)Pro-(L)Pro nucleated peptide beta-hairpins has been examined. We present direct evidence for the superiority of the Cys-His pairs, mediated by sulphur-imidazole interactions, as added stabilizing agents of the beta-hairpin scaffold.

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The pore of sodium channels contains a selectivity filter made of 4 amino acids, D/E/K/A. In voltage sensitive sodium channel (Nav) channels from jellyfish to human the fourth amino acid is Ala. This Ala, when mutated to Asp, promotes slow inactivation. In some Nav channels of pufferfishes, the Ala is replaced with Gly. We studied the biophysical properties of an Ala-to-Gly substitution (A1529G) in rat Nav1.4 channel expressed in Xenopus oocytes alone or with a beta 1 subunit. The Ala-to-Gly substitution does not affect monovalent cation selectivity and positively shifts the voltage-dependent inactivation curve, although co-expression with a beta 1 subunit eliminates the difference between A1529G and WT. There is almost no difference in channel fast inactivation, but the beta 1 subunit accelerates WT current inactivation significantly more than it does the A1529G channels. The Ala-to-Gly substitution mainly influences the rate of recovery from slow inactivation. Again, the beta 1 subunit is less effective on speeding recovery of A1529G than the WT. We searched Nav channels in numerous databases and noted at least four other independent Ala-to-Gly substitutions in Nav channels in teleost fishes. Thus, the Ala-to-Gly substitution occurs more frequently than previously realized, possibly under selection for alterations of channel gating.

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In this paper, an input receiver with a hysteresis characteristic that can work at voltage levels between 0.9 V and 5 V is proposed. The input receiver can be used as a wide voltage range Schmitt trigger also. At the same time, reliable circuit operation is ensured. According to the research findings, this is the first time a wide voltage range Schmitt trigger is being reported. The proposed circuit is compared with previously reported input receivers, and it is shown that the circuit has better noise immunity. The proposed input receiver ends the need for a separate Schmitt trigger and input buffer. The frequency of operation is also higher than that of the previously reported receiver. The circuit is simulated using HSPICE at 035-mu m standard thin oxide technology. Monte Carlo analysis is conducted at different process conditions, showing that the proposed circuit works well for different process conditions at different voltage levels of operation. A noise impulse of (V-CC/2) magnitude is added to the input voltage to show that the receiver receives the correct logic level even in the presence of noise. Here, V-CC is the fixed voltage supply of 3.3 V.

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In this paper, a current hysteresis controller with parabolic boundaries for a 12-sided polygonal voltage space vector inverter fed induction motor (IM) drive is proposed. Parabolic boundaries with generalized vector selection logic, valid for all sectors and rotational direction, is used in the proposed controller. The current error space phasor boundary is obtained by first studying the drive scheme with space vector based PWM (SVPWM) controller. Four parabolas are used to approximate this current error space phasor boundary. The system is then run with space phasor based hysteresis PWM controller by limiting the current error space vector (CESV) within the parabolic boundary. The proposed controller has simple controller implementation, nearly constant switching frequency, extended modulation range and fast dynamic response with smooth transition to the over modulation region.

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In this paper, a current error space vector (CESV)-based hysteresis current controller for a multilevel 12-sided voltage space vector-based inverter-fed induction motor (IM) drive is proposed. The proposed controller gives a nearly constant switching frequency operation throughout different speeds in the linear modulation region. It achieves the elimination of 6n +/- 1, n = odd harmonics from the phase voltages and currents in the entire modulation range, with an increase in the linear modulation range. It also exhibits fast dynamic behavior under different transient conditions and has a simple controller implementation. Nearly constant switching frequency is obtained by matching the steady-state CESV boundaries of the proposed controller with that of a constant switching frequency SVPWM-based drive. In the proposed controller, the CESV reference boundaries are computed online, using the switching dwell time and voltage error vector of each applied vector. These quantities are calculated from estimated sampled reference phase voltages. Vector change is decided by projecting the actual current error along the computed hysteresis space vector boundary of the presently applied vector. The estimated reference phase voltages are found from the stator current error ripple and the parameters of the IM.

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Comparator based switched capacitor circuits provide an excellent opportunity to design sampled data systems where the virtual ground condition is detected rather than being continuously forced with negative feedback in Opamp based circuits. This work is an application of this concept to design a 1 st order 330 KHz cutoff frequency Lowpass filter operating at 10 MHz sampling frequency in 0.13μm technology and 1.2 V supply voltage. The Comparator Based Switched Capacitor (CBSC) filter is compared with conventional Two stage Miller compensated Operational amplifier based switched capacitor filter. It is shown that CBSC filter relaxes the constraints like speed ,linearity, gain, stability which would otherwise be hard to satisfy in scaled technologies in Opamp based circuits. The designed CBSC based lowpass filter provides significant power savings compared to traditional Opamp based switched capacitor filter.

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A three-level common-mode voltage eliminated inverter with single dc supply using flying capacitor inverter and cascaded H-bridge has been proposed in this paper. The three phase space vector polygon formed by this configuration and the polygon formed by the common-mode eliminated states have been discussed. The entire system is simulated in Simulink and the results are experimentally verified. This system has an advantage that if one of devices in the H-bridge fails, the system can still be operated as a normal three-level inverter at full power. This inverter has many other advantages like use of single dc supply, making it possible for a back-to-back grid-tied converter application, improved reliability, etc.