Engineering of micro- and nanostructured surfaces with anisotropic geometries and properties

Widespread approaches to fabricate surfaces with robust micro- and nanostructured topographies have been stimulated by opportunities to enhance interface performance by combining physical and chemical effects. In particular, arrays of asymmetric surface features, such as arrays of grooves, inclined pillars, and helical protrusions, have been shown to impart unique anisotropy in properties including wetting, adhesion, thermal and/or electrical conductivity, optical activity, and capability to direct cell growth. These properties are of wide interest for applications including energy conversion, microelectronics, chemical and biological sensing, and bioengineering. However, fabrication of asymmetric surface features often pushes the limits of traditional etching and deposition techniques, making it challenging to produce the desired surfaces in a scalable and cost-effective manner. We review and classify approaches to fabricate arrays of asymmetric 2D and 3D surface features, in polymers, metals, and ceramics. Analytical and empirical relationships among geometries, materials, and surface properties are discussed, especially in the context of the applications mentioned above. Further, opportunities for new fabrication methods that combine lithography with principles of self-assembly are identified, aiming to establish design principles for fabrication of arbitrary 3D surface textures over large areas. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Fishtail effects and improved critical current density in polycrystalline bulk MgB2 containing carbon nanotubes

Bulk, polycrystalline MgB2 samples containing 2.5 wt.% multi-walled carbon nanotubes (CNTs) have been prepared by conventional solid state reaction at 800 °C. The effect of Mg precursor powders composed of two different particle sizes on the critical current density (Jc) of the as-sintered samples has been investigated. An enhancement of Jc at high field has been observed in MgB2 samples containing CNTs prepared with fine Mg powders, whereas the values of Jc in the sample prepared using the coarser Mg powders was slightly decreased. These results contrast significantly with measurements on pure, undoped, MgB2 samples prepared from the same Mg precursor powders. They suggest that carbon substitution into the MgB2 lattice, which accounts for increased flux pinning, and therefore Jc, is more effective in precursor Mg powders with a larger surface area. Rather surprisingly, the so-called fishtail effect, observed typically in MgB2 single crystals and in the (RE)BCO family of high temperature superconductors (HTSs), was observed in both sets of CNT-containing polycrystalline samples as a result of lattice defects associated with C substitution. Significantly, analytical fits to the data for each sample suggest that the same flux pinning mechanism accounts for the fishtail effect in polycrystalline MgB2 and (RE)BCO. © 2013 Elsevier B.V. All rights reserved.

Electronic properties of GaAs, InAs and InP nanowires studied by terahertz spectroscopy.

We have performed a comparative study of ultrafast charge carrier dynamics in a range of III-V nanowires using optical pump-terahertz probe spectroscopy. This versatile technique allows measurement of important parameters for device applications, including carrier lifetimes, surface recombination velocities, carrier mobilities and donor doping levels. GaAs, InAs and InP nanowires of varying diameters were measured. For all samples, the electronic response was dominated by a pronounced surface plasmon mode. Of the three nanowire materials, InAs nanowires exhibited the highest electron mobilities of 6000 cm² V⁻¹ s⁻¹, which highlights their potential for high mobility applications, such as field effect transistors. InP nanowires exhibited the longest carrier lifetimes and the lowest surface recombination velocity of 170 cm s⁻¹. This very low surface recombination velocity makes InP nanowires suitable for applications where carrier lifetime is crucial, such as in photovoltaics. In contrast, the carrier lifetimes in GaAs nanowires were extremely short, of the order of picoseconds, due to the high surface recombination velocity, which was measured as 5.4 × 10⁵ cm s⁻¹. These findings will assist in the choice of nanowires for different applications, and identify the challenges in producing nanowires suitable for future electronic and optoelectronic devices.

Carrier lifetime and mobility enhancement in nearly defect-free core-shell nanowires measured using time-resolved terahertz spectroscopy.

We have used transient terahertz photoconductivity measurements to assess the efficacy of two-temperature growth and core-shell encapsulation techniques on the electronic properties of GaAs nanowires. We demonstrate that two-temperature growth of the GaAs core leads to an almost doubling in charge-carrier mobility and a tripling of carrier lifetime. In addition, overcoating the GaAs core with a larger-bandgap material is shown to reduce the density of surface traps by 82%, thereby enhancing the charge conductivity.

Taper-free and kinked germanium nanowires grown on silicon via purging and the two-temperature process

We investigate the growth procedures for achieving taper-free and kinked germanium nanowires epitaxially grown on silicon substrates by chemical vapor deposition. Singly and multiply kinked germanium nanowires consisting of 111 segments were formed by employing a reactant gas purging process. Unlike non-epitaxial kinked nanowires, a two-temperature process is necessary to maintain the taper-free nature of segments in our kinked germanium nanowires on silicon. As an application, nanobridges formed between (111) side walls of V-grooved (100) silicon substrates have been demonstrated. © 2012 IOP Publishing Ltd.

Taper-free and vertically oriented Ge nanowires on Ge/Si substrates grown by a two-temperature process

Taper-free and vertically oriented Ge nanowires were grown on Si (111) substrates by chemical vapor deposition with Au nanoparticle catalysts. To achieve vertical nanowire growth on the highly lattice mismatched Si substrate, a thin Ge buffer layer was first deposited, and to achieve taper-free nanowire growth, a two-temperature process was employed. The two-temperature process consisted of a brief initial base growth step at high temperature followed by prolonged growth at lower temperature. Taper-free and defect-free Ge nanowires grew successfully even at 270 °C, which is 90 °C lower than the bulk eutectic temperature. The yield of vertical and taper-free nanowires is over 90%, comparable to that of vertical but tapered nanowires grown by the conventional one-temperature process. This method is of practical importance and can be reliably used to develop novel nanowire-based devices on relatively cheap Si substrates. Additionally, we observed that the activation energy of Ge nanowire growth by the two-temperature process is dependent on Au nanoparticle size. The low activation energy (∼5 kcal/mol) for 30 and 50 nm diameter Au nanoparticles suggests that the decomposition of gaseous species on the catalytic Au surface is a rate-limiting step. A higher activation energy (∼14 kcal/mol) was determined for 100 nm diameter Au nanoparticles which suggests that larger Au nanoparticles are partially solidified and that growth kinetics become the rate-limiting step. © 2011 American Chemical Society.

Tailoring GaAs, InAs, and InGaAs nanowires for optoelectronic device applications

GaAs, InAs, and InGaAs nanowires each exhibit significant potential to drive new applications in electronic and optoelectronic devices. Nevertheless, the development of these devices depends on our ability to fabricate these nanowires with tight control over critical properties, such as nanowire morphology, orientation, crystal structure, and chemical composition. Although GaAs and InAs are related material systems, GaAs and InAs nanowires exhibit very different growth behaviors. An understanding of these growth behaviors is imperative if high-quality ternary InGaAs nanowires are to be realized. This report examines GaAs, InAs, and InGaAs nanowires, and how their growth may be tailored to achieve desirable material properties. GaAs and InAs nanowire growth are compared, with a view toward the growth of high-quality InGaAs nanowires with device-accessible properties. © 2011 IEEE.

Structural and optical characterization of vertical GaAs/GaP core-shell nanowires grown on Si substrates

GaAs nanowires were grown on Si (111) substrates. By coating a thin GaAs buffer layer on Si surface and using a two-temperature growth, the morphology and crystal structure of GaAs nanowires were dramatically improved. The strained GaAs/GaP core-shell nanowires, based on the improved GaAs nanowires with a shell thickness of 25 nm, showed a significant shift in emission energy of 260 meV from the unstrained GaAs nanowires. © 2010 IEEE.

Removal of surface states and recovery of band-edge emission in InAs nanowires through surface passivation.

Surface states in semiconductor nanowires (NWs) are detrimental to the NW optical and electronic properties and to their light emission-based applications, due to the large surface-to-volume ratio of NWs and the congregation of defects states near surfaces. In this paper, we demonstrated an effective approach to eliminate surface states in InAs NWs of zinc-blende (ZB) and wurtzite (WZ) structures and a dramatic recovery of band edge emission through surface passivation with organic sulfide octadecylthiol (ODT). Microphotoluminescence (PL) measurements were carried out before and after passivation to study the dominant recombination mechanisms and surface state densities of the NWs. For WZ-NWs, we show that the passivation removed the surface states and recovered the band-edge emission, leading to a factor of ∼19 reduction of PL linewidth. For ZB-NWs, the deep surface states were removed and the PL peaks width became as narrow as ∼250 nm with some remaining emission of near band-edge surface states. The passivated NWs showed excellent stability in atmosphere, water, and heat environments. In particular, no observable changes occurred in the PL features from the passivated NWs exposed in air for more than five months.

Phase perfection in zinc Blende and Wurtzite III-V nanowires using basic growth parameters.

Controlling the crystallographic phase purity of III-V nanowires is notoriously difficult, yet this is essential for future nanowire devices. Reported methods for controlling nanowire phase require dopant addition, or a restricted choice of nanowire diameter, and only rarely yield a pure phase. Here we demonstrate that phase-perfect nanowires, of arbitrary diameter, can be achieved simply by tailoring basic growth parameters: temperature and V/III ratio. Phase purity is achieved without sacrificing important specifications of diameter and dopant levels. Pure zinc blende nanowires, free of twin defects, were achieved using a low growth temperature coupled with a high V/III ratio. Conversely, a high growth temperature coupled with a low V/III ratio produced pure wurtzite nanowires free of stacking faults. We present a comprehensive nucleation model to explain the formation of these markedly different crystal phases under these growth conditions. Critical to achieving phase purity are changes in surface energy of the nanowire side facets, which in turn are controlled by the basic growth parameters of temperature and V/III ratio. This ability to tune crystal structure between twin-free zinc blende and stacking-fault-free wurtzite not only will enhance the performance of nanowire devices but also opens new possibilities for engineering nanowire devices, without restrictions on nanowire diameters or doping.

Novel growth and properties of GaAs nanowires on Si substrates.

Straight, vertically aligned GaAs nanowires were grown on Si(111) substrates coated with thin GaAs buffer layers. We find that the V/III precursor ratio and growth temperature are crucial factors influencing the morphology and quality of buffer layers. A double layer structure, consisting of a thin initial layer grown at low V/III ratio and low temperature followed by a layer grown at high V/III ratio and high temperature, is crucial for achieving straight, vertically aligned GaAs nanowires on Si(111) substrates. An in situ annealing step at high temperature after buffer layer growth improves the surface and structural properties of the buffer layer, which further improves the morphology of the GaAs nanowire growth. Through such optimizations we show that vertically aligned GaAs nanowires can be fabricated on Si(111) substrates and achieve the same structural and optical properties as GaAs nanowires grown directly on GaAs(111)B substrates.

Dynamics of strongly degenerate electron-hole plasmas and excitons in single InP nanowires.

Low-temperature time-resolved photoluminescence spectroscopy is used to probe the dynamics of photoexcited carriers in single InP nanowires. At early times after pulsed excitation, the photoluminescence line shape displays a characteristic broadening, consistent with emission from a degenerate, high-density electron-hole plasma. As the electron-hole plasma cools and the carrier density decreases, the emission rapidly converges toward a relatively narrow band consistent with free exciton emission from the InP nanowire. The free excitons in these single InP nanowires exhibit recombination lifetimes closely approaching that measured in a high-quality epilayer, suggesting that in these InP nanowires, electrons and holes are relatively insensitive to surface states. This results in higher quantum efficiencies than other single-nanowire systems as well as significant state-filling and band gap renormalization, which is observed at high electron-hole carrier densities.

Influence of nanowire density on the shape and optical properties of ternary InGaAs nanowires.

We have synthesized ternary InGaAs nanowires on (111)B GaAs surfaces by metal-organic chemical vapor deposition. Au colloidal nanoparticles were employed to catalyze nanowire growth. We observed the strong influence of nanowire density on nanowire height, tapering, and base shape specific to the nanowires with high In composition. This dependency was attributed to the large difference of diffusion length on (111)B surfaces between In and Ga reaction species, with In being the more mobile species. Energy dispersive X-ray spectroscopy analysis together with high-resolution electron microscopy study of individual InGaAs nanowires shows large In/Ga compositional variation along the nanowire supporting the present diffusion model. Photoluminescence spectra exhibit a red shift with decreasing nanowire density due to the higher degree of In incorporation in more sparsely distributed InGaAs nanowires.

Improvement of morphology, structure, and optical properties of GaAs nanowires grown on Si substrates

We investigate vertical and defect-free growth of GaAs nanowires on Si (111) substrates via a vapor-liquid-solid (VLS) growth mechanism with Au catalysts by metal-organic chemical vapor deposition (MOCVD). By using annealed thin GaAs buffer layers on the surface of Si substrates, most nanowires are grown on the substrates straight, following (111) direction; by using two temperature growth, the nanowires were grown free from structural defects, such as twin defects and stacking faults. Systematic experiments about buffer layers indicate that V/III ratio of precursor and growth temperature can affect the morphology and quality of the buffer layers. Especially, heterostructural buffer layers grown with different V/III ratios and temperatures and in-situ post-annealing step are very helpful to grow well arranged, vertical GaAs nanowires on Si substrates. The initial nanowires having some structural defects can be defect-free by two-temperature growth mode with improved optical property, which shows us positive possibility for optoelectronic device application. ©2010 IEEE.