Weighted input predictive controller

A discrete-time algorithm is presented which is based on a predictive control scheme in the form of dynamic matrix control. A set of control inputs are calculated and made available at each time instant, the actual input applied being a weighted summation of the inputs within the set. The algorithm is directly applicable in a self-tuning format and is therefore suitable for slowly time-varying systems in a noisy environment.

Adaptive general predictive controller for nonlinear systems

A nonlinear general predictive controller (NLGPC) is described which is based on the use of a Hammerstein model within a recursive control algorithm. A key contribution of the paper is the use of a novel, one-step simple root solving procedure for the Hammerstein model, this being a fundamental part of the overall tuning algorithm. A comparison is made between NLGPC and nonlinear deadbeat control (NLDBC) using the same one-step nonlinear components, in order to investigate NLGPC advantages and disadvantages.

A clocking technique with power savings in virtex-based pipelined designs

This paper presents the evaluation in power consumption of a clocking technique for pipelined designs. The technique shows a dynamic power consumption saving of around 30% over a conventional global clocking mechanism. The results were obtained from a series of experiments of a systolic circuit implemented in Virtex-II devices. The conversion from a global-clocked pipelined design to the proposed technique is straightforward, preserving the original datapath design. The savings can be used immediately either as a power reduction benefit or to increase the frequency of operation of a design for the same power consumption.

Improving mW/MHz ratio in FPGAs pipelined designs

This paper presents a simple clocking technique to migrate classical synchronous pipelined designs to a synchronous functional-equivalent alternative system in the context of FPGAs. When the new pipelined design runs at the same throughput of the original design, around 30% better mW/MHz ratio was observed in Virtex-based FPGA circuits. The evaluation is done using a simple but representative and practical systolic design as an example. The technique in essence is a simple replacement of the clocking mechanism for the pipe-storage elements; however no extra design effort is needed. The results show that the proposed technique allows immediate power and area-time savings of existing designs rather than exploring potential benefits by a new logic design to the problem using the classic pipeline clocking mechanism.

Output envelope adjustment for an environmental fuzzy logic controller

A two-level fuzzy logic controller for use in air-conditioning systems is outlined in this paper. At the first level a simplified controller is produced from expert knowledge and envelope adjustment is introduced, while the second level provides a means for adapting this controller to different working spaces. The mechanism for adaption is easily implemented and can be used in real time. A series of simulations is presented to illustrate the proposed schema.

Quasi-decoupled fuzzy logic controller

The authors describe the design of a fuzzy logic controller for the control of a planar two-link manipulator. The plant is quasi-decoupled with respect to gravity. Complete decoupling is not achieved due to the nonoptimal nature of the expert rules. The performance of the fuzzy controller is compared to that of the critically damped computed torque controller. Results are presented complete with robustness tests.

Simplified PID self-tuning controller for robotic manipulators

The paper describes a self-tuning adaptive PID controller suitable for use in the control of robotic manipulators. The scheme employs a simple recursive estimator which reduces the computational effort to an acceptable level for many applications in robotics.

Seamless phase II/III designs

In recent years, there has been a drive to save development costs and shorten time-to-market of new therapies. Research into novel trial designs to facilitate this goal has led to, amongst other approaches, the development of methodology for seamless phase II/III designs. Such designs allow treatment or dose selection at an interim analysis and comparative evaluation of efficacy with control, in the same study. Methods have gained much attention because of their potential advantages compared to conventional drug development programmes with separate trials for individual phases. In this article, we review the various approaches to seamless phase II/III designs based upon the group-sequential approach, the combination test approach and the adaptive Dunnett method. The objective of this article is to describe the approaches in a unified framework and highlight their similarities and differences to allow choice of an appropriate methodology by a trialist considering conducting such a trial.

Real-time application of a constrained predictive controller based on dynamic neural networks with feedback linearization

This paper describes an experimental application of constrained predictive control and feedback linearisation based on dynamic neural networks. It also verifies experimentally a method for handling input constraints, which are transformed by the feedback linearisation mappings. A performance comparison with a PID controller is also provided. The experimental system consists of a laboratory based single link manipulator arm, which is controlled in real time using MATLAB/SIMULINK together with data acquisition equipment.

A model-based PID controller for Hammerstein systems using B-spline neural networks

In this paper, a new model-based proportional–integral–derivative (PID) tuning and controller approach is introduced for Hammerstein systems that are identified on the basis of the observational input/output data. The nonlinear static function in the Hammerstein system is modelled using a B-spline neural network. The control signal is composed of a PID controller, together with a correction term. Both the parameters in the PID controller and the correction term are optimized on the basis of minimizing the multistep ahead prediction errors. In order to update the control signal, the multistep ahead predictions of the Hammerstein system based on B-spline neural networks and the associated Jacobian matrix are calculated using the de Boor algorithms, including both the functional and derivative recursions. Numerical examples are utilized to demonstrate the efficacy of the proposed approaches.

B-spline neural networks based PID controller for Hammerstein systems

A new PID tuning and controller approach is introduced for Hammerstein systems based on input/output data. A B-spline neural network is used to model the nonlinear static function in the Hammerstein system. The control signal is composed of a PID controller together with a correction term. In order to update the control signal, the multistep ahead predictions of the Hammerstein system based on the B-spline neural networks and the associated Jacobians matrix are calculated using the De Boor algorithms including both the functional and derivative recursions. A numerical example is utilized to demonstrate the efficacy of the proposed approaches.

Fine-grained multi-phase array designs

Hybrid multiprocessor architectures which combine re-configurable computing and multiprocessors on a chip are being proposed to transcend the performance of standard multi-core parallel systems. Both fine-grained and coarse-grained parallel algorithm implementations are feasible in such hybrid frameworks. A compositional strategy for designing fine-grained multi-phase regular processor arrays to target hybrid architectures is presented in this paper. The method is based on deriving component designs using classical regular array techniques and composing the components into a unified global design. Effective designs with phase-changes and data routing at run-time are characteristics of these designs. In order to describe the data transfer between phases, the concept of communication domain is introduced so that the producer–consumer relationship arising from multi-phase computation can be treated in a unified way as a data routing phase. This technique is applied to derive new designs of multi-phase regular arrays with different dataflow between phases of computation.

A MATLAB GUI for learning controller design in the frequency domain

A MATLAB GUI is presented which is used to help students learn to design controllers in the frequency domain. It complements the author’s two previous GUIs for plotting and identification of systems in the frequency domain. It also incorporates the concept used in the “electronic calculator that makes students think” to assist learning. Positive student feedback affirms that the GUI has helped their understanding.