930 resultados para Classification algorithms


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c. 2

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Text classification, information filtering, semi-supervised learning, quality control

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Fuzzy classification, semi-supervised learning, data mining

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Background: The classification or index of heart failure severity in patients with acute myocardial infarction (AMI) was proposed by Killip and Kimball aiming at assessing the risk of in-hospital death and the potential benefit of specific management of care provided in Coronary Care Units (CCU) during the decade of 60. Objective: To validate the risk stratification of Killip classification in the long-term mortality and compare the prognostic value in patients with non-ST-segment elevation MI (NSTEMI) relative to patients with ST-segment elevation MI (STEMI), in the era of reperfusion and modern antithrombotic therapies. Methods: We evaluated 1906 patients with documented AMI and admitted to the CCU, from 1995 to 2011, with a mean follow-up of 05 years to assess total mortality. Kaplan-Meier (KM) curves were developed for comparison between survival distributions according to Killip class and NSTEMI versus STEMI. Cox proportional regression models were developed to determine the independent association between Killip class and mortality, with sensitivity analyses based on type of AMI. Results: The proportions of deaths and the KM survival distributions were significantly different across Killip class >1 (p <0.001) and with a similar pattern between patients with NSTEMI and STEMI. Cox models identified the Killip classification as a significant, sustained, consistent predictor and independent of relevant covariables (Wald χ2 16.5 [p = 0.001], NSTEMI) and (Wald χ2 11.9 [p = 0.008], STEMI). Conclusion: The Killip and Kimball classification performs relevant prognostic role in mortality at mean follow-up of 05 years post-AMI, with a similar pattern between NSTEMI and STEMI patients.

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Magdeburg, Univ., Fak. für Informatik, Habil.-Schr., 2006

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Magdeburg, Univ., Fak. für Mathematik, Habil.-Schr., 2006

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This work describes a test tool that allows to make performance tests of different end-to-end available bandwidth estimation algorithms along with their different implementations. The goal of such tests is to find the best-performing algorithm and its implementation and use it in congestion control mechanism for high-performance reliable transport protocols. The main idea of this paper is to describe the options which provide available bandwidth estimation mechanism for highspeed data transport protocols and to develop basic functionality of such test tool with which it will be possible to manage entities of test application on all involved testing hosts, aided by some middleware.

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In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniques for maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables, and an approach for performing parallel addition of N input symbols.

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In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniquesfor maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables,and an approach for performing parallel addition of N input symbols.

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Magdeburg, Univ., Fak. für Inf., Diss., 2014

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Some practical aspects of Genetic algorithms’ implementation regarding to life cycle management of electrotechnical equipment are considered.

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v.24:no.11(1940)