A parallel programming model for ada

Over the last three decades, computer architects have been able to achieve an increase in performance for single processors by, e.g., increasing clock speed, introducing cache memories and using instruction level parallelism. However, because of power consumption and heat dissipation constraints, this trend is going to cease. In recent times, hardware engineers have instead moved to new chip architectures with multiple processor cores on a single chip. With multi-core processors, applications can complete more total work than with one core alone. To take advantage of multi-core processors, parallel programming models are proposed as promising solutions for more effectively using multi-core processors. This paper discusses some of the existent models and frameworks for parallel programming, leading to outline a draft parallel programming model for Ada.

Static-priority scheduling over wireless networks with multiple broadcast domains

We propose a wireless medium access control (MAC) protocol that provides static-priority scheduling of messages in a guaranteed collision-free manner. Our protocol supports multiple broadcast domains, resolves the wireless hidden terminal problem and allows for parallel transmissions across a mesh network. Arbitration of messages is achieved without the notion of a master coordinating node, global clock synchronization or out-of-band signaling. The protocol relies on bit-dominance similar to what is used in the CAN bus except that in order to operate on a wireless physical layer, nodes are not required to receive incoming bits while transmitting. The use of bit-dominance efficiently allows for a much larger number of priorities than would be possible using existing wireless solutions. A MAC protocol with these properties enables schedulability analysis of sporadic message streams in wireless multihop networks.

A CMOS micro power switched-capacitor DC-DC step-up converter for indoor light energy harvesting applications

This paper presents a micro power light energy harvesting system for indoor environments. Light energy is collected by amorphous silicon photovoltaic (a-Si:H PV) cells, processed by a switched capacitor (SC) voltage doubler circuit with maximum power point tracking (MPPT), and finally stored in a large capacitor. The MPPT fractional open circuit voltage (V-OC) technique is implemented by an asynchronous state machine (ASM) that creates and dynamically adjusts the clock frequency of the step-up SC circuit, matching the input impedance of the SC circuit to the maximum power point condition of the PV cells. The ASM has a separate local power supply to make it robust against load variations. In order to reduce the area occupied by the SC circuit, while maintaining an acceptable efficiency value, the SC circuit uses MOSFET capacitors with a charge sharing scheme for the bottom plate parasitic capacitors. The circuit occupies an area of 0.31 mm(2) in a 130 nm CMOS technology. The system was designed in order to work under realistic indoor light intensities. Experimental results show that the proposed system, using PV cells with an area of 14 cm(2), is capable of starting-up from a 0 V condition, with an irradiance of only 0.32 W/m(2). After starting-up, the system requires an irradiance of only 0.18 W/m(2) (18 mu W/cm(2)) to remain operating. The ASM circuit can operate correctly using a local power supply voltage of 453 mV, dissipating only 0.085 mu W. These values are, to the best of the authors' knowledge, the lowest reported in the literature. The maximum efficiency of the SC converter is 70.3 % for an input power of 48 mu W, which is comparable with reported values from circuits operating at similar power levels.

Performance analysis of a VDFLL GNSS receiver architecture under ionospheric scintillation and multipath conditions

A noncoherent vector delay/frequency-locked loop (VDFLL) architecture for GNSS receivers is proposed. A bank of code and frequency discriminators feeds a central extended Kalman filter that estimates the receiver's position and velocity, besides the clock error. The VDFLL architecture performance is compared with the one of the classic scalar receiver, both for scintillation and multipath scenarios, in terms of position errors. We show that the proposed solution is superior to the conventional scalar receivers, which tend to lose lock rapidly, due to the sudden drops of the received signal power.

Performance comparison of a VDFLL versus VDLL and scalar GNSS receiver architectures in Harsh scenarios

We analyze the advantages and drawbacks of a vector delay/frequency-locked loop (VDFLL) architecture regarding the conventional scalar and the vector delay-locked loop (VDLL) architectures for GNSS receivers in harsh scenarios that include ionospheric scintillation, multipath, and high dynamics motion. The VDFLL is constituted by a bank of code and frequency discriminators feeding a central extended Kaiman filter (EKF) that estimates the receiver's position, velocity, and clock bias. Both code and frequency loops are closed vectorially through the EKF. The VDLL closes the code loop vectorially and the phase loops through individual PLLs while the scalar receiver closes both loops by means of individual independent PLLs and DLLs.

Metabolic syndrome in fixed-shift workers

OBJECTIVE To analyze if metabolic syndrome and its altered components are associated with demographic, socioeconomic and behavioral factors in fixed-shift workers.METHODS A cross-sectional study was conducted on a sample of 902 shift workers of both sexes in a poultry processing plant in Southern Brazil in 2010. The diagnosis of metabolic syndrome was determined according to the recommendations from Harmonizing the Metabolic Syndrome. Its frequency was evaluated according to the demographic (sex, skin color, age and marital status), socioeconomic (educational level, income and work shift), and behavioral characteristics (smoking, alcohol intake, leisure time physical activity, number of meals and sleep duration) of the sample. The multivariate analysis followed a theoretical framework for identifying metabolic syndrome in fixed-shift workers.RESULTS The prevalence of metabolic syndrome in the sample was 9.3% (95%CI 7.4;11.2). The most frequently altered component was waist circumference (PR 48.4%; 95%CI 45.5;51.2), followed by high-density lipoprotein. Work shift was not associated with metabolic syndrome and its altered components. After adjustment, the prevalence of metabolic syndrome was positively associated with women (PR 2.16; 95%CI 1.28;3.64), workers aged over 40 years (PR 3.90; 95%CI 1.78;8.93) and those who reported sleeping five hours or less per day (PR 1.70; 95%CI 1.09;2.24). On the other hand, metabolic syndrome was inversely associated with educational level and having more than three meals per day (PR 0.43; 95%CI 0.26;0.73).CONCLUSIONS Being female, older and deprived of sleep are probable risk factors for metabolic syndrome, whereas higher educational level and higher number of meals per day are protective factors for metabolic syndrome in fixed-shift workers.

Novel techniques for the design and practical realization of switched-capacitor circuits in deep-submicron CMOS technologies

Dissertação apresentada para obtenção do Grau de Doutor em Engenharia Electrotécnica e de Computadores pela Universidade Nova de Lisboa, Faculdade de Ciências e Tecnologia

Low-power 6-bit 1-GS/s two-channel pipeline ADC with open-loop amplification using amplifiers with local-feedback

IEEE International Symposium on Circuits and Systems, pp. 2258 – 2261, Seattle, EUA

New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplification

15th IEEE International Conference on Electronics, Circuits and Systems, Malta

Digitally programmable delay-locked-loop with adaptive charge pump current for UWB radar system

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para obtenção do grau de Mestre em Engenharia Electrotécnica e Computadores

Bancroftian filariasis in two urban areas of Recife, Brasil: the role of individual risk factors

Bancroftian filariasis is spreading in towns of endemic areas as in Recife, northeastern Brazil, where it is a major public health problem. This paper deals with the prevalence of microfilaraemia and filarial disease in two urban areas of Recife, studying their association with individual characteristics and variables related to the exposure to the vectors. The parasitologic survey was performed through a "door-to-door" census and microfilaraemia was examined by the thick-drop technique using 45µl of peripheral blood collected between 20:00 and 24:00 o' clock. 2,863 individuals aged between 5 and 65 years were interviewed and submitted to clinical examination. Males aged between 15 and 44 years old presented the greatest risk of being microfilaraemic. Microfilaraemia was also significantly associated with no use of bednet to sleep. The risk of being microfilaraemic was greater among those who had lived in the studied areas for more than 5 years. The overall disease prevalence was 6.3%. Males presented the greatest risk of developing acute disease. The risk of developing chronic manifestations was also greater among males and increased with age. We found no association between time of residence, bednet use, microfilaraemia and acute and chronic disease. We may conclude that in endemic areas there are subgroups of individuals who has a higher risk of being microfilariae carriers due to different behaviours in relation to vector contact.

RepComp - replicated software components for improved performance

Trabalho apresentado no âmbito do Mestrado em Engenharia Informática, como requisito parcial para obtenção do grau de Mestre em Engenharia Informática

Towards Certifiable Multicore-based Platforms for Avionics

Work in Progress Session, 21st IEEE Real-Time and Embedded Techonology and Applications Symposium (RTAS 2015). 13 to 16, Apr, 2015, pp 27-28. Seattle, U.S.A..

Towards the Certification of Multicore Platforms in the Avionics Domain

Poster presented in Work in Progress Session, The 28th GI/ITG International Conference on Architecture of Computing Systems (ARCS 2015). 24 to 27, Mar, 2015. Porto, Portugal.

Overhead-aware schedulability evaluation of semi-partitioned real-time schedulers

Presented at IEEE 21st International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2015). 19 to 21, Aug, 2015.