Ferroelectric hafnium oxide: A CMOS-compatible and highly scalable approach to future ferroelectric memories

With the ability to engineer ferroelectricity in HfO2 thin films, manufacturable and highly scaled MFM capacitors and MFIS-FETs can be implemented into a CMOS-environment. NVM properties of the resulting devices are discussed and contrasted to existing perovskite based FRAM.

Select-divide-and-conquer method for large-scale configuration interaction

A select-divide-and-conquer variational method to approximate configuration interaction (CI) is presented. Given an orthonormal set made up of occupied orbitals (Hartree-Fock or similar) and suitable correlation orbitals (natural or localized orbitals), a large N-electron target space S is split into subspaces S0,S1,S2,...,SR. S0, of dimension d0, contains all configurations K with attributes (energy contributions, etc.) above thresholds T0={T0egy, T0etc.}; the CI coefficients in S0 remain always free to vary. S1 accommodates KS with attributes above T1≤T0. An eigenproblem of dimension d0+d1 for S0+S 1 is solved first, after which the last d1 rows and columns are contracted into a single row and column, thus freezing the last d1 CI coefficients hereinafter. The process is repeated with successive Sj(j≥2) chosen so that corresponding CI matrices fit random access memory (RAM). Davidson's eigensolver is used R times. The final energy eigenvalue (lowest or excited one) is always above the corresponding exact eigenvalue in S. Threshold values {Tj;j=0, 1, 2,...,R} regulate accuracy; for large-dimensional S, high accuracy requires S 0+S1 to be solved outside RAM. From there on, however, usually a few Davidson iterations in RAM are needed for each step, so that Hamiltonian matrix-element evaluation becomes rate determining. One μhartree accuracy is achieved for an eigenproblem of order 24 × 106, involving 1.2 × 1012 nonzero matrix elements, and 8.4×109 Slater determinants

Representing traumatic space

This presentation will begin by the screening of Traum a Dream (2003, 7 mins, Digital Video, Sound)

A representation of traumatised space, depicting a person who is consumed by a body of pain, consumed by fire. Slowly something is remembered (Festival Catalogue: Transmediale.03. February 2003).

The screening will allow a discussion of some of the material embedded in and ideas used in the film's construction. This includes Atwood's view of the colony as victim, Peter pan and never-never-land, Kroker's concept of the panicked body as it relates to the cinema of Mike Hoolboom's hyper-collage and also the use of the abstract and repetition to depict the process of remembering, re-ordering and forgetting. It is also suggested that Random Access Memory as a method of information storage in Digital Media can provide a model for the architecture of traumatised space and Post Traumatic Stress Disorder.

AMC: an adaptive multi-level cache algorithm in hybrid storage systems

Hybrid storage systems that consist of flash-based solid state drives (SSDs) and traditional disks are now widely used. In hybrid storage systems, there exists a two-level cache hierarchy that regard dynamic random access memory (DRAM) as the first level cache and SSD as the second level cache for disk storage. However, this two-level cache hierarchy typically uses independent cache replacement policies for each level, which makes cache resource management inefficient and reduces system performance. In this paper, we propose a novel adaptive multi-level cache (AMC) replacement algorithm in hybrid storage systems. The AMC algorithm adaptively adjusts cache blocks between DRAM and SSD cache levels using an integrated solution. AMC uses combined selective promote and demote operations to dynamically determine the level in which the blocks are to be cached. In this manner, the AMC algorithm achieves multi-level cache exclusiveness and makes cache resource management more efficient. By using real-life storage traces, our evaluation shows the proposed algorithm improves hybrid multi-level cache performance and also increases the SSD lifetime compared with traditional multi-level cache replacement algorithms.

Electric and dielectric behavior of CaCu3Ti4O12-based thin films obtained by soft chemical method

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Dielectric and fatigue properties of Pb(Zr0.53Ti0.47)O-3 thin films prepared from oxide precursors method

Fatigue is an important problem to be considered if a ferroelectric film is used for non-volatile memory devices. In this phenomena, the remanent polarization and coercive field properties degrades in cycles which increase in hysteresis loops. The reasons have been attributed to different mechanisms such as a large voltage applied on ferroelectric film in every reading process in Ferroelectric Random Access Memory (FeRAM) or memories for digital storage in computer, grain size effects and others. The aim of this work is to investigate the influence of the crystallization kinetics on dielectric and ferroelectric properties of the Pb(Zr0.53Ti0.47)O-3 thin films prepared by an alternative chemical method. Films were crystallized in air on Pt/Ti/SiO2/Si substrates at 700 degrees C for 1 hour, in conventional thermal annealing (CTA), and at 700 degrees C for 1 min and 700 degrees C 5 min, using a rapid thermal annealing (RTA) process. Final films were crack free and presented an average of 750 nm in thickness. Dielectric properties were studied in the frequency range of 100 Hz - 1 MHz. All films showed a dielectric dispersion at low frequency. Ferroelectric properties were measured from hysteresis loops at 10 kHz. The obtained remanent polarization (P-r) and coercive field (E-c) were 3.7 mu C/cm(2) and 71.9 kV/cm respectively for film crystallized by CTA while in films crystallized by RTA these parameters were essentially the same. In the fatigue process, the P, value decreased to 14% from the initial value after 1.3 x 10(9) switching cycles, for film by CTA, while for film crystallized by RTA for 5 min, P, decreased to 47% from initial value after 1.7 x 10(9) switching cycles.

An active leakage-injection scheme applied to low-voltage SRAMs

An active leakage-injection scheme (ALIS) for low-voltage (LV) high-density (HD) SRAMs is presented. By means of a feedback loop comprising a servo-amplifier and a common-drain MOSFET, a current matching the respective bit-line leakage is injected onto the line during precharge and sensing, preventing the respective capacitances from erroneous discharges. The technique is able to handle leakages up to hundreds of μA at high operating temperatures. Since no additional timing is required, read-out operations are performed at no speed penalty. A simplified 256×1bit array was designed in accordance with a 0.35 CMOS process and 1.2V-supply. A range of PSPICE simulation attests the efficacy of ALIS. With an extra power consumption of 242 μW, a 200 μA-leakage @125°C, corresponding to 13.6 times the cell current, is compensated.

Microscopic and dielectric analyses of vanadium and tungsten modified barium zirconium titanate ceramics

Dielectric spectroscopy was used in this study to examine polycrystalline vanadium and tungstendoped BaZr 0.1Ti 0.90O 3 (BZT10:2V and BZT10:2W) ceramics obtained by the mixed oxide method. According to X-ray diffraction analyses, addition of vanadium and tungsten lead to ceramics free of secondary phases. SEM analyses reveal that both dopants result in slower oxygen ion motion and consequently lower grain growth rate. Temperature dependence dielectric study showed normal ferroelectric to paraelectric transition well above the room temperature for the BZT10 and BZT10:2V ceramics. However, BZT10:2W ceramic showed a relaxor-like behavior near phase transition characterized by the empirical parameter γ. Piezoelectric force microscopy images reveals that the piezoelectric coefficient is strongly influenced by type of donor dopant suggesting promising applications for dynamic random access memories and data-storage media. Copyright © 2010 American Scientific Publishers All rights reserved.

A Novel Fiber Delay Line Buffering Architecture for Optical Packet Switching

Due to the lack of optical random access memory, optical fiber delay line (FDL) is currently the only way to implement optical buffering. Feed-forward and feedback are two kinds of FDL structures in optical buffering. Both have advantages and disadvantages. In this paper, we propose a more effective hybrid FDL architecture that combines the merits of both schemes. The core of this switch is the arrayed waveguide grating (AWG) and the tunable wavelength converter (TWC). It requires smaller optical device sizes and fewer wavelengths and has less noise than feedback architecture. At the same time, it can facilitate preemptive priority routing which feed-forward architecture cannot support. Our numerical results show that the new switch architecture significantly reduces packet loss probability.

Junction Field Effect on the Retention Time for One-Transistor Floating-Body RAM

One-transistor floating-body random access memory retention time distribution is investigated on silicon-on-insulator UTBOX devices. It is shown that the average retention time can be improved by two to three orders of magnitude by reducing the body-junction electric field. However, the retention time distribution, which is mainly caused by the generation-recombination center density variation, remains similar.

Dependence of Generation-Recombination Noise With Gate Voltage in FD SOI MOSFETs

A model for computing the generation-recombination noise due to traps within the semiconductor film of fully depleted silicon-on-insulator MOSFET transistors is presented. Dependence of the corner frequency of the Lorentzian spectra on the gate voltage is addressed in this paper, which is different to the constant behavior expected for bulk transistors. The shift in the corner frequency makes the characterization process easier. It helps to identify the energy position, capture cross sections, and densities of the traps. This characterization task is carried out considering noise measurements of two different candidate structures for single-transistor dynamic random access memory devices.

Magnetization dynamics in spin valves

Key technology applications like magnetoresistive sensors or the Magnetic Random Access Memory (MRAM) require reproducible magnetic switching mechanisms. i.e. predefined remanent states. At the same time advanced magnetic recording schemes push the magnetic switching time into the gyromagnetic regime. According to the Landau-Lifschitz-Gilbert formalism, relevant questions herein are associated with magnetic excitations (eigenmodes) and damping processes in confined magnetic thin film structures.rnObjects of study in this thesis are antiparallel pinned synthetic spin valves as they are extensively used as read heads in today’s magnetic storage devices. In such devices a ferromagnetic layer of high coercivity is stabilized via an exchange bias field by an antiferromagnet. A second hard magnetic layer, separated by a non-magnetic spacer of defined thickness, aligns antiparallel to the first. The orientation of the magnetization vector in the third ferromagnetic NiFe layer of low coercivity - the freelayer - is then sensed by the Giant MagnetoResistance (GMR) effect. This thesis reports results of element specific Time Resolved Photo-Emission Electron Microscopy (TR-PEEM) to image the magnetization dynamics of the free layer alone via X-ray Circular Dichroism (XMCD) at the Ni-L3 X-ray absorption edge.rnThe ferromagnetic systems, i.e. micron-sized spin valve stacks of typically deltaR/R = 15% and Permalloy single layers, were deposited onto the pulse leading centre stripe of coplanar wave guides, built in thin film wafer technology. The ferromagnetic platelets have been applied with varying geometry (rectangles, ellipses and squares), lateral dimension (in the range of several micrometers) and orientation to the magnetic field pulse to study the magnetization behaviour in dependence of these magnitudes. The observation of magnetic switching processes in the gigahertz range became only possible due to the joined effort of producing ultra-short X-ray pulses at the synchrotron source BESSY II (operated in the so-called low-alpha mode) and optimizing the wave guide design of the samples for high frequency electromagnetic excitation (FWHM typically several 100 ps). Space and time resolution of the experiment could be reduced to d = 100 nm and deltat = 15 ps, respectively.rnIn conclusion, it could be shown that the magnetization dynamics of the free layer of a synthetic GMR spin valve stack deviates significantly from a simple phase coherent rotation. In fact, the dynamic response of the free layer is a superposition of an averaged critically damped precessional motion and localized higher order spin wave modes. In a square platelet a standing spin wave with a period of 600 ps (1.7 GHz) was observed. At a first glance, the damping coefficient was found to be independent of the shape of the spin-valve element, thus favouring the model of homogeneous rotation and damping. Only by building the difference in the magnetic rotation between the central region and the outer rim of the platelet, the spin wave becomes visible. As they provide an additional efficient channel for energy dissipation, spin waves contribute to a higher effective damping coefficient (alpha = 0.01). Damping and magnetic switching behaviour in spin valves thus depend on the geometry of the element. Micromagnetic simulations reproduce the observed higher-order spin wave mode.rnBesides the short-run behaviour of the magnetization of spin valves Permalloy single layers with thicknesses ranging from 3 to 40 nm have been studied. The phase velocity of a spin wave in a 3 nm thick ellipse could be determined to 8.100 m/s. In a rectangular structure exhibiting a Landau-Lifschitz like domain pattern, the speed of the field pulse induced displacement of a 90°-Néel wall has been determined to 15.000 m/s.rn

Sophisticated security verification on routing repaired balanced cell-based dual-rail logic against side channel analysis

Conventional dual-rail precharge logic suffers from difficult implementations of dual-rail structure for obtaining strict compensation between the counterpart rails. As a light-weight and high-speed dual-rail style, balanced cell-based dual-rail logic (BCDL) uses synchronised compound gates with global precharge signal to provide high resistance against differential power or electromagnetic analyses. BCDL can be realised from generic field programmable gate array (FPGA) design flows with constraints. However, routings still exist as concerns because of the deficient flexibility on routing control, which unfavourably results in bias between complementary nets in security-sensitive parts. In this article, based on a routing repair technique, novel verifications towards routing effect are presented. An 8 bit simplified advanced encryption processing (AES)-co-processor is executed that is constructed on block random access memory (RAM)-based BCDL in Xilinx Virtex-5 FPGAs. Since imbalanced routing are major defects in BCDL, the authors can rule out other influences and fairly quantify the security variants. A series of asymptotic correlation electromagnetic (EM) analyses are launched towards a group of circuits with consecutive routing schemes to be able to verify routing impact on side channel analyses. After repairing the non-identical routings, Mutual information analyses are executed to further validate the concrete security increase obtained from identical routing pairs in BCDL.

Stability studies on pencillin derivatives

Current analytical assay methods for ampicillin sodium and cloxacillin sodium are discussed and compared, High Performance Liquid Chromatography (H.P.L.C.) being chosen as the most accurate, specific and precise. New H.P.L.C. methods for the analysis of benzathine cloxacillin; benzathine penicillin V; procaine penicillin injection B.P.; benethamine penicillin injection; fortified B.P.C.; benzathine penicillin injection; benzathine penicillin injection, fortified B.P.C.; benzathine penicillin suspnsion; ampicillin syrups and penicillin syrups are described. Mechanical or chemical damage to column packings is often associated with H.P.L.C. analysis. One type, that of channel formation, is investigated. The high linear velocity of solvent and solvent pulsing during the pumping cycle were found to be the cause of this damage. The applicability of nonisotherrnal kinetic experiments to penicillin V preparations, including formulated paediatric syrups, is evaluated. A new type of nonisotherrnal analysis, based on slope estimation and using a 64K Random Access Memory (R.A.M.) microcomputer is described. The name of the program written for this analysis is NONISO. The distribution of active penicillin in granules for reconstitution into ampicillin and penicillin V syrups, and its effect on the stability of the reconstituted products, are investigated. Changing the diluent used to reconstitue the syrups was found to affect the stability of the product. Dissolution and stability of benzathine cloxacillin at pH2, pH6 and pH9 is described, with proposed dissolution mechanisms and kinetic analysis to support these mechanisms. Benzathine and cloxacillin were found to react in solution at pH9, producing an insoluble amide.

Fabrication and Pseudo-Analog Characteristics of Ta2O5 -Based ReRAM Cell

Memristori on yksi elektroniikan peruskomponenteista vastuksen, kondensaattorin ja kelan lisäksi. Se on passiivinen komponentti, jonka teorian kehitti Leon Chua vuonna 1971. Kesti kuitenkin yli kolmekymmentä vuotta ennen kuin teoria pystyttiin yhdistämään kokeellisiin tuloksiin. Vuonna 2008 Hewlett Packard julkaisi artikkelin, jossa he väittivät valmistaneensa ensimmäisen toimivan memristorin. Memristori eli muistivastus on resistiivinen komponentti, jonka vastusarvoa pystytään muuttamaan. Nimens mukaisesti memristori kykenee myös säilyttämään vastusarvonsa ilman jatkuvaa virtaa ja jännitettä. Tyypillisesti memristorilla on vähintään kaksi vastusarvoa, joista kumpikin pystytään valitsemaan syöttämällä komponentille jännitettä tai virtaa. Tämän vuoksi memristoreita kutsutaankin usein resistiivisiksi kytkimiksi. Resistiivisiä kytkimiä tutkitaan nykyään paljon erityisesti niiden mahdollistaman muistiteknologian takia. Resistiivisistä kytkimistä rakennettua muistia kutsutaan ReRAM-muistiksi (lyhenne sanoista resistive random access memory). ReRAM-muisti on Flash-muistin tapaan haihtumaton muisti, jota voidaan sähköisesti ohjelmoida tai tyhjentää. Flash-muistia käytetään tällä hetkellä esimerkiksi muistitikuissa. ReRAM-muisti mahdollistaa kuitenkin nopeamman ja vähävirtaiseman toiminnan Flashiin verrattuna, joten se on tulevaisuudessa varteenotettava kilpailija markkinoilla. ReRAM-muisti mahdollistaa myös useammin bitin tallentamisen yhteen muistisoluun binäärisen (”0” tai ”1”) toiminnan sijaan. Tyypillisesti ReRAM-muistisolulla on kaksi rajoittavaa vastusarvoa, mutta näiden kahden tilan välille pystytään mahdollisesti ohjelmoimaan useampia tiloja. Muistisoluja voidaan kutsua analogisiksi, jos tilojen määrää ei ole rajoitettu. Analogisilla muistisoluilla olisi mahdollista rakentaa tehokkaasti esimerkiksi neuroverkkoja. Neuroverkoilla pyritään mallintamaan aivojen toimintaa ja suorittamaan tehtäviä, jotka ovat tyypillisesti vaikeita perinteisille tietokoneohjelmille. Neuroverkkoja käytetään esimerkiksi puheentunnistuksessa tai tekoälytoteutuksissa. Tässä diplomityössä tarkastellaan Ta2O5 -perustuvan ReRAM-muistisolun analogista toimintaa pitäen mielessä soveltuvuus neuroverkkoihin. ReRAM-muistisolun valmistus ja mittaustulokset käydään läpi. Muistisolun toiminta on harvoin täysin analogista, koska kahden rajoittavan vastusarvon välillä on usein rajattu määrä tiloja. Tämän vuoksi toimintaa kutsutaan pseudoanalogiseksi. Mittaustulokset osoittavat, että yksittäinen ReRAM-muistisolu kykenee binääriseen toimintaan hyvin. Joiltain osin yksittäinen solu kykenee tallentamaan useampia tiloja, mutta vastusarvoissa on peräkkäisten ohjelmointisyklien välillä suurta vaihtelevuutta, joka hankaloittaa tulkintaa. Valmistettu ReRAM-muistisolu ei sellaisenaan kykene toimimaan pseudoanalogisena muistina, vaan se vaati rinnalleen virtaa rajoittavan komponentin. Myös valmistusprosessin kehittäminen vähentäisi yksittäisen solun toiminnassa esiintyvää varianssia, jolloin sen toiminta muistuttaisi enemmän pseudoanalogista muistia.