Power Electronic Converters in Low-Voltage Direct Current Distribution – Analysis and Implementation

Over the recent years, smart grids have received great public attention. Many proposed functionalities rely on power electronics, which play a key role in the smart grid, together with the communication network. However, “smartness” is not the driver that alone motivates the research towards distribution networks based on power electronics; the network vulnerability to natural hazards has resulted in tightening requirements for the supply security, set both by electricity end-users and authorities. Because of the favorable price development and advancements in the field, direct current (DC) distribution has become an attractive alternative for distribution networks. In this doctoral dissertation, power electronic converters for a low-voltage DC (LVDC) distribution system are investigated. These include the rectifier located at the beginning of the LVDC network and the customer-end inverter (CEI) on the customer premises. Rectifier topologies are introduced, and according to the LVDC system requirements, topologies are chosen for the analysis. Similarly, suitable CEI topologies are addressed and selected for study. Application of power electronics into electricity distribution poses some new challenges. Because the electricity end-user is supplied with the CEI, it is responsible for the end-user voltage quality, but it also has to be able to supply adequate current in all operating conditions, including a short-circuit, to ensure the electrical safety. Supplying short-circuit current with power electronics requires additional measures, and therefore, the short-circuit behavior is described and methods to overcome the high-current supply to the fault are proposed. Power electronic converters also produce common-mode (CM) and radio-frequency (RF) electromagnetic interferences (EMI), which are not present in AC distribution. Hence, their magnitudes are investigated. To enable comprehensive research on the LVDC distribution field, a research site was built into a public low-voltage distribution network. The implementation was a joint task by the LVDC research team of Lappeenranta University of Technology and a power company Suur-Savon S¨ahk¨o Oy. Now, the measurements could be conducted in an actual environment. This is important especially for the EMI studies. The main results of the work concern the short-circuit operation of the CEI and the EMI issues. The applicability of the power electronic converters to electricity distribution is demonstrated, and suggestions for future research are proposed.

Polyphase Implementation of Non-recursive Comb Decimators for Sigma-Delta A/D Converters

In a sigma-delta analog to digital (A/D) As most of the sigma-delta ADC applications require converter, the most computationally intensive block is decimation filters with linear phase characteristics, the decimation filter and its hardware implementation symmetric Finite Impulse Response (FIR) filters are may require millions of transistors. Since these widely used for implementation. But the number of FIR converters are now targeted for a portable application, filter coefficients will be quite large for implementing a a hardware efficient design is an implicit requirement. narrow band decimation filter. Implementing decimation In this effect, this paper presents a computationally filter in several stages reduces the total number of filter efficient polyphase implementation of non-recursive coefficients, and hence reduces the hardware complexity cascaded integrator comb (CIC) decimators for and power consumption [2]. Sigma-Delta Converters (SDCs). The SDCs are The first stage of decimation filter can be operating at high oversampling frequencies and hence implemented very efficiently using a cascade of integrators require large sampling rate conversions. The filtering and comb filters which do not require multiplication or and rate reduction are performed in several stages to coefficient storage. The remaining filtering is performed reduce hardware complexity and power dissipation. either in single stage or in two stages with more complex The CIC filters are widely adopted as the first stage of FIR or infinite impulse response (IIR) filters according to decimation due to its multiplier free structure. In this the requirements. The amount of passband aliasing or research, the performance of polyphase structure is imaging error can be brought within prescribed bounds by compared with the CICs using recursive and increasing the number of stages in the CIC filter. The non-recursive algorithms in terms of power, speed and width of the passband and the frequency characteristics area. This polyphase implementation offers high speed outside the passband are severely limited. So, CIC filters operation and low power consumption. The polyphase are used to make the transition between high and low implementation of 4th order CIC filter with a sampling rates. Conventional filters operating at low decimation factor of '64' and input word length of sampling rate are used to attain the required transition '4-bits' offers about 70% and 37% of power saving bandwidth and stopband attenuation. compared to the corresponding recursive and Several papers are available in literature that deals non-recursive implementations respectively. The same with different implementations of decimation filter polyphase CIC filter can operate about 7 times faster architecture for sigma-delta ADCs. Hogenauer has than the recursive and about 3.7 times faster than the described the design procedures for decimation and non-recursive CIC filters.

Analytical calculation of resonant inductance for zero voltage switching in phase-shifted full-bridge converters

The phase shift full bridge (PSFB) converter allows high efficiency power conversion at high frequencies through zero voltage switching (ZVS); the parasitic drain-to-source capacitance of the MOSFET is discharged by a resonant inductance before the switch is gated resulting in near zero turn-on switching losses. Typically, an extra inductance is added to the leakage inductance of a transformer to form the resonant inductance necessary to charge and discharge the parasitic capacitances of the PSFB converter. However, many PSFB models do not consider the effects of the magnetizing inductance or dead-time in selecting the resonant inductance required to achieve ZVS. The choice of resonant inductance is crucial to the ZVS operation of the PSFB converter. Incorrectly sized resonant inductance will not achieve ZVS or will limit the load regulation ability of the converter. This paper presents a unique and accurate equation for calculating the resonant inductance required to achieve ZVS over a wide load range incorporating the effects of the magnetizing inductance and dead-time. The derived equations are validated against PSPICE simulations of a PSFB converter and extensive hardware experimentations.

Choosing the most suitable analogue redesign method for forward-type digital power converters

This work proposes a method to objectively determine the most suitable analogue redesign method for forward type converters under digital voltage mode control. Particular emphasis is placed on determining the method which allows the highest phase margin at the particular switching and crossover frequencies chosen by the designer. It is shown that at high crossover frequencies with respect to switching frequency, controllers designed using backward integration have the largest phase margin; whereas at low crossover frequencies with respect to switching frequency, controllers designed using bilinear integration have the largest phase margins. An accurate model of the power stage is used for simulation, and experimental results from a Buck converter are collected. The performance of the digital controllers is compared to that of the equivalent analogue controller both in simulation and experiment. Excellent correlation between the simulation and experimental results is presented. This work will allow designers to confidently choose the analogue redesign method which yields the greater phase margin for their application.

Systematic selection of analogue redesign method for forward-type digital power converters

This article proposes a systematic approach to determine the most suitable analogue redesign method to be used for forward-type converters under digital voltage mode control. The focus of the method is to achieve the highest phase margin at the particular switching and crossover frequencies chosen by the designer. It is shown that at high crossover frequencies with respect to switching frequency, controllers designed using backward integration have the largest phase margin; whereas at low crossover frequencies with respect to switching frequency, controllers designed using bilinear integration with pre-warping have the largest phase margins. An algorithm has been developed to determine the frequency of the crossing point where the recommended discretisation method changes. An accurate model of the power stage is used for simulation and experimental results from a Buck converter are collected. The performance of the digital controllers is compared to that of the equivalent analogue controller both in simulation and experiment. Excellent closeness between the simulation and experimental results is presented. This work provides a concrete example to allow academics and engineers to systematically choose a discretisation method.

Bond graph models of DC-DC converters operating in both CCM and DCM

In this paper, Bond Graphs are employed to develop a novel mathematical model of conventional switched-mode DC-DC converters valid for both continuous and discontinuous conduction modes. A unique causality bond graph model of hybrid models is suggested with the operation of the switch and the diode to be represented by a Modulated Transformer with a binary input and a resistor with fixed conductance causality. The operation of the diode is controlled using an if-then function within the model. The extracted hybrid model is implemented on a Boost and Buck converter with their operations to change from CCM to DCM and to return to CCM. The vector fields of the models show validity in a wide operation area and comparison with the simulation of the converters using PSPICE reveals high accuracy of the proposed model, with the Normalised Root Means Square Error and the Maximum Absolute Error remaining adequately low. The model is also experimentally tested on a Buck topology.

DC and AC side harmonics in CCC converters

The capacitor-commutated converter (CCC) has frequently been used in the conception of HVDC systems connected to busbars with low short circuit level. This alternative arrangement, in substitution to the conventional ones, guarantees less sensitive operational conditions to problems related with the commutation failure in the inverters besides supplying part of the reactive energy to be compensated. Studies related with its performance in steady and transient states have been presented in several works, however its behavior as harmonic source is still little explored. This work presents preliminary studies focusing the generation of characteristic harmonics by this type of converter. Subjects related with the amplification of the harmonic magnitudes are investigated and compared considering similar arrangements of conventional static converters (LCC) and CCC schemes. It is also analyzed the harmonic generation on the dc side of the installation and its influence on the ac side harmonics. The results are obtained from simulations in the time domain in PSpice environment and they clearly illustrate the operational differences between the L CC and the CCC schemes with regard to characteristic harmonic generation.

Generating VHDL-AMS models of digital-to-analogue converters from MATLAB (R)/SIMULINK (R)

Today, the trend within the electronics industry is for the use of rapid and advanced simulation methodologies in association with synthesis toolsets. This paper presents an approach developed to support mixed-signal circuit design and analysis. The methodology proposed shows a novel approach to the problem of developing behvioural model descriptions of mixed-signal circuit topologies, by construction of a set of subsystems, that supports the automated mapping of MATLAB (R)/SINIULINK (R) models to structural VHDL-AMS descriptions. The tool developed, named (MSSV)-S-2, reads a SIMULINK (R) model file and translates it to a structural VHDL-AMS code. It also creates the file structure required to simulate the translated model in the SystemVision (TM). To validate the methodology and the developed program, the DAC08, AD7524 and AD5450 data converters were studied and initially modelled in MATLAB (R)/SIMULINK (R). The VHDL-AMS code generated automatically by (MSSV)-S-2, (MATLAB (R)/SIMULINK (R) to SystemVision (TM)), was then simulated in the SystemVision (TM). The simulation results show that the proposed approach, which is based on VHDL-AMS descriptions of the original model library elements, allows for the behavioural level simulation of complex mixed-signal circuits.

Novel zero-current-switching PWM converters

This paper presents a new family of pulsewidth-modulated (PWM) converters, featuring soft commutation of the semiconductors at zero current (ZC) in the transistors and zero voltage (ZV) in the rectifiers, Besides operating at constant frequency and with reduced commutation losses, these new converters have output characteristics similar to the hard-switching-PWM counterpart, which means that there is no circulating reactive energy that would cause large conduction losses, the new family of zero-current-switching (ZCS)-PWM converters is suitable for high-power applications using insulated gate bipolar transistors (IGBT's). The advantages of the new ZCS-PWM boast converter employing IGBT's, rated at 1.6 kW and operating at 20 kHz, are presented, This new ZCS operation can reduce the average total power dissipation in the semiconductors practically by half, when compared with the hard-switching method, This new ZCS-PWM boost converter is suitable for high-power applications using Ie;BT's in power-factor correction, the principle of operation, theoretical analysis, and experimental results of the new ZCS-PWM boost converter are provided in this paper to verify the performance of this new family of converters.

Generalization of the Y-differential autotransformer for 12- and 18-pulse converters

This work proposes a methodology to generalize the Y-connections for 12- and 18-pulse autotransformers. A single mathematical expression, obtained through simple trigonometric operations, represents all the connections. The proposed methodology allows choosing any ratio between the input and the output voltages. The converters can operate either as step-up or as step-down voltage. To simplify the design of the windings, graphics are generated to calculate the turn-ratio and the polarity of each secondary winding, with respect to the primary winding. A design example, followed by digital simulations, illustrates the presented steps. Experimental results of two prototypes (12 and 18 pulses) are presented. The results also show that high power factor is an inherent characteristic of multi-pulse converters, without any active or passive power factor pre-regulators needs. (c) 2005 Elsevier B.V. All rights reserved.

Simulation Tools of DC-DC Converters for Power Electronics Education

This paper presents interactive simulation tools to support the enhancement of power electronics education considering DC to DC converters. These interactive tools make use of the benefits of Java language to provide a dynamic and interactive visualization of simulations in steady-state for idealized non-isolated DC to DC converters. Additionally, this paper discusses the features and the usage of the interactive educational tools to serve as a first design tool for the laboratory experiments in the power electronics courses. In this way, some results were confronted with a well-known simulator package and with experimental results in order to validate the developed interactive simulation tools.

Settling analysis of MOS regulated current mirrors applied to micropower D/A converters

This paper provides an insight to the trade-off between settling time and power consumption in regulated current mirrors as building parts in micropower current-switching D/A converters. The regulation-loop frequency characteristic is obtained and difficulties to impose a dominant-pole condition to the resulting 2nd-order system are evaluated. Raising pole frequencies in micropower circuits, while meeting consumption requirements, is basically limited by parasitic capacitances. For such cases, an alternative is to impose a twin-pole condition in which design constraints are somewhat relieved and settling slightly improved. Relationships between pole frequencies, transistor geometry and bias are established and design guidelines for regulated current mirrors founded. By placing loop-transistors in either weak or strong inversion, small (W/L) ratios are allowed and stray capacitances reduced. Simulated waveforms suggest a good agreement with theory. The proposed approach applied to the design of a micropower current-mode D/A converter improves both simulated and experimental settling performance.

Generalization of the delta-differential autotransformer for 12 and 18-pulse converters

This work proposes a methodology to generalize the A-connections for 12 and 18-pulse autotransformers. A single mathematical expression, obtained through simple trigonometric operations, represents all the connections. The proposed methodology allows choosing any ratio between the input and the output voltages. The converters can operate either as step-up or as step-down voltage. To simplify the design of the windings, graphics are generated to calculate the turn-ratio and the polarity of each secondary winding, with respect to the primary winding. A design example, followed by digital simulations, and experimental results illustrate the presented steps. The results also show that high power factor is an inherent characteristic of multi-pulse converters, without any active or passive power factor pre-regulators needs.