Development of a water-in-oil-in-water multiple emulsion system integrating biomimetic aqueous-core lipid nanodroplets for protein entity stabilization. Part I: experimental factorial design

Lipid nanoballoons integrating multiple emulsions of the type water-in-oil-in-water enclose, at least in theory, a biomimetic aqueous-core suitable for housing hydrophilic biomolecules such as proteins, peptides and bacteriophage particles. The research effort entertained in this paper reports a full statistical 23x31 factorial design study (three variables at two levels and one variable at three levels) to optimize biomimetic aqueous-core lipid nanoballoons for housing hydrophilic protein entities. The concentrations of protein, lipophilic and hydrophilic emulsifiers, and homogenization speed were set as the four independent variables, whereas the mean particle hydrodynamic size (HS), zeta potential (ZP) and polydispersity index (PI) were set as the dependent variables. The V23x31 factorial design constructed led to optimization of the higher (+1) and lower (-1) levels, with triplicate testing for the central (0) level, thus producing thirty three experiments and leading to selection of the optimized processing parameters as 0.015% (w/w) protein entity, 0.75% (w/w) lipophilic emulsifier (soybean lecithin) and 0.50% (w/w) hydrophilic emulsifier (poloxamer 188). In the present research effort, statistical optimization and production of protein derivatives encompassing full stabilization of their three-dimensional structure, has been attempted via housing said molecular entities within biomimetic aqueous-core lipid nanoballoons integrating a multiple (W/O/W) emulsion.

Rest/nrsf governs the expression of dense-core vesicle gliosecretion in astrocytes

Astrocytes are the brain nonnerve cells that are competent for gliosecretion, i.e., for expression and regulated exocytosis of clear and dense-core vesicles (DCVs). We investigated whether expression of astrocyte DCVs is governed by RE-1-silencing transcription factor (REST)/neuron-restrictive silencer factor, the transcription repressor that orchestrates nerve cell differentiation. Rat astrocyte cultures exhibited high levels of REST and expressed neither DCVs nor their markers (granins, peptides, and membrane proteins). Transfection of dominant-negative construct of REST induced the appearance of DCVs filled with secretogranin 2 and neuropeptide Y (NPY) and distinct from other organelles. Total internal reflection fluorescence analysis revealed NPY-monomeric red fluorescent protein-labeled DCVs to undergo Ca21 -dependent exocytosis, which was largely prevented by botulinum toxin B. In the I-II layers of the human temporal brain cortex, all neurons and microglia exhibited the expected inappreciable and high levels of REST, respectively. In contrast, astrocyte RESTwas variable, going from inappreciable to high, and accompanied by a variable expression of DCVs. In conclusion, astrocyte DCV expression and gliosecretion are governed by REST. The variable in situ REST levels may contribute to the wellknown structural/ functional heterogeneity of astrocytes.

Astrocyte dense-core vesicle gliosecretion is governed by rest/nrsf

Astrocytes are the brain non-nerve cells competent for the expression of clear and dense-core vesicles (DCVs) and for their regulated exocytosis. This process, called gliosecretion, nearly resembles the neurosecretion occurring in neurons and neurosecretory cells. REST/NRSF is a transcription repressor known to orchestrate nerve-cell differentiation, governing the expression of hundreds of neuron-specific genes through their repression in the non-nerve and their fine modulation in the nerve cells. Our previous studies in neurosecretory rat PC12 cells identified REST as the critical factor for the expression not only of individual genes, but also of the whole neurosecretory process via multiple, direct and indirect mechanisms (D'Alessandro et al., J. Neurochem., 2008; Klajn et al., J. Neurosci., 2009). Therefore we wondered whether gliosecretion was governed by REST. We investigated rat astrocyte primary cultures: they exhibited high REST, which directly represses the transcription of at least one target gene, and expressed neither DCVs nor their markers (granins, peptides, membrane proteins). Transfection of a dominant-negative construct of REST (REST/ DBD-GFP) induced the appearance of DCVs filled with secretogranin2 and NPY that are distinct from other intracellular organelles. TIRF analysis of astrocytes co-transfected with REST/DBD-GFP and NPY-mRFP constructs revealed NPY-mRFP-positive DCVs undergoing Ca2þ-dependent exocytosis, largely prevented by BoNT/B. Immunohistochemistry of the I-II layers of the human temporal brain cortex showed all neurons and microglia exhibiting the expected inappreciable and high levels of REST, respectively. In contrast astrocyte RESTwas variable, going from inappreciable to high, accompanied by variable expression of DCVs. In this work it has been demonstrated that astrocyte DCV expression and gliosecretion are governed by REST (Prada et al., 2011 in press). The variable in situ REST levels may contribute to the well known structural/functional heterogeneity of astrocytes and this new observation might be of great interest for the understanding of both astrocyte physiology and pathology.

REST/NRSF governs the expression of dense-core vesicle gliosecretion in astrocytes.

Astrocytes are the brain nonnerve cells that are competent for gliosecretion, i.e., for expression and regulated exocytosis of clear and dense-core vesicles (DCVs). We investigated whether expression of astrocyte DCVs is governed by RE-1-silencing transcription factor (REST)/neuron-restrictive silencer factor (NRSF), the transcription repressor that orchestrates nerve cell differentiation. Rat astrocyte cultures exhibited high levels of REST and expressed neither DCVs nor their markers (granins, peptides, and membrane proteins). Transfection of a dominant-negative construct of REST induced the appearance of DCVs filled with secretogranin 2 and neuropeptide Y (NPY) and distinct from other organelles. Total internal reflection fluorescence analysis revealed NPY-monomeric red fluorescent protein-labeled DCVs to undergo Ca(2+)-dependent exocytosis, which was largely prevented by botulinum toxin B. In the I-II layers of the human temporal brain cortex, all neurons and microglia exhibited the expected inappreciable and high levels of REST, respectively. In contrast, astrocyte REST was variable, going from inappreciable to high, and accompanied by a variable expression of DCVs. In conclusion, astrocyte DCV expression and gliosecretion are governed by REST. The variable in situ REST levels may contribute to the well-known structural/functional heterogeneity of astrocytes.

Stress reaction of kidney epithelial cells to inorganic solid-core nanoparticles.

A route of accumulation and elimination of therapeutic engineered nanoparticles (NPs) may be the kidney. Therefore, the interactions of different solid-core inorganic NPs (titanium-, silica-, and iron oxide-based NPs) were studied in vitro with the MDCK and LLC-PK epithelial cells as representative cells of the renal epithelia. Following cell exposure to the NPs, observations include cytotoxicity for oleic acid-coated iron oxide NPs, the production of reactive oxygen species for titanium dioxide NPs, and cell depletion of thiols for uncoated iron oxide NPs, whereas for silica NPs an apparent rapid and short-lived increase of thiol levels in both cell lines was observed. Following cell exposure to metallic NPs, the expression of the tranferrin receptor/CD71 was decreased in both cells by iron oxide NPs, but only in MDCK cells by titanium dioxide NPs. The tight association, then subsequent release of NPs by MDCK and LLC-PK kidney epithelial cells, showed that following exposure to the NPs, only MDCK cells could release iron oxide NPs, whereas both cells released titanium dioxide NPs. No transfer of any solid-core NPs across the cell layers was observed.

Exploration and Design of Power-Efficient Networked Many-Core Systems

Multiprocessing is a promising solution to meet the requirements of near future applications. To get full benefit from parallel processing, a manycore system needs efficient, on-chip communication architecture. Networkon- Chip (NoC) is a general purpose communication concept that offers highthroughput, reduced power consumption, and keeps complexity in check by a regular composition of basic building blocks. This thesis presents power efficient communication approaches for networked many-core systems. We address a range of issues being important for designing power-efficient manycore systems at two different levels: the network-level and the router-level. From the network-level point of view, exploiting state-of-the-art concepts such as Globally Asynchronous Locally Synchronous (GALS), Voltage/ Frequency Island (VFI), and 3D Networks-on-Chip approaches may be a solution to the excessive power consumption demanded by today’s and future many-core systems. To this end, a low-cost 3D NoC architecture, based on high-speed GALS-based vertical channels, is proposed to mitigate high peak temperatures, power densities, and area footprints of vertical interconnects in 3D ICs. To further exploit the beneficial feature of a negligible inter-layer distance of 3D ICs, we propose a novel hybridization scheme for inter-layer communication. In addition, an efficient adaptive routing algorithm is presented which enables congestion-aware and reliable communication for the hybridized NoC architecture. An integrated monitoring and management platform on top of this architecture is also developed in order to implement more scalable power optimization techniques. From the router-level perspective, four design styles for implementing power-efficient reconfigurable interfaces in VFI-based NoC systems are proposed. To enhance the utilization of virtual channel buffers and to manage their power consumption, a partial virtual channel sharing method for NoC routers is devised and implemented. Extensive experiments with synthetic and real benchmarks show significant power savings and mitigated hotspots with similar performance compared to latest NoC architectures. The thesis concludes that careful codesigned elements from different network levels enable considerable power savings for many-core systems.

Thermal-Aware Networked Many-Core Systems

Advancements in IC processing technology has led to the innovation and growth happening in the consumer electronics sector and the evolution of the IT infrastructure supporting this exponential growth. One of the most difficult obstacles to this growth is the removal of large amount of heatgenerated by the processing and communicating nodes on the system. The scaling down of technology and the increase in power density is posing a direct and consequential effect on the rise in temperature. This has resulted in the increase in cooling budgets, and affects both the life-time reliability and performance of the system. Hence, reducing on-chip temperatures has become a major design concern for modern microprocessors. This dissertation addresses the thermal challenges at different levels for both 2D planer and 3D stacked systems. It proposes a self-timed thermal monitoring strategy based on the liberal use of on-chip thermal sensors. This makes use of noise variation tolerant and leakage current based thermal sensing for monitoring purposes. In order to study thermal management issues from early design stages, accurate thermal modeling and analysis at design time is essential. In this regard, spatial temperature profile of the global Cu nanowire for on-chip interconnects has been analyzed. It presents a 3D thermal model of a multicore system in order to investigate the effects of hotspots and the placement of silicon die layers, on the thermal performance of a modern ip-chip package. For a 3D stacked system, the primary design goal is to maximise the performance within the given power and thermal envelopes. Hence, a thermally efficient routing strategy for 3D NoC-Bus hybrid architectures has been proposed to mitigate on-chip temperatures by herding most of the switching activity to the die which is closer to heat sink. Finally, an exploration of various thermal-aware placement approaches for both the 2D and 3D stacked systems has been presented. Various thermal models have been developed and thermal control metrics have been extracted. An efficient thermal-aware application mapping algorithm for a 2D NoC has been presented. It has been shown that the proposed mapping algorithm reduces the effective area reeling under high temperatures when compared to the state of the art.

Energy aware software for many-core systems

Many-core systems provide a great potential in application performance with the massively parallel structure. Such systems are currently being integrated into most parts of daily life from high-end server farms to desktop systems, laptops and mobile devices. Yet, these systems are facing increasing challenges such as high temperature causing physical damage, high electrical bills both for servers and individual users, unpleasant noise levels due to active cooling and unrealistic battery drainage in mobile devices; factors caused directly by poor energy efficiency. Power management has traditionally been an area of research providing hardware solutions or runtime power management in the operating system in form of frequency governors. Energy awareness in application software is currently non-existent. This means that applications are not involved in the power management decisions, nor does any interface between the applications and the runtime system to provide such facilities exist. Power management in the operating system is therefore performed purely based on indirect implications of software execution, usually referred to as the workload. It often results in over-allocation of resources, hence power waste. This thesis discusses power management strategies in many-core systems in the form of increasing application software awareness of energy efficiency. The presented approach allows meta-data descriptions in the applications and is manifested in two design recommendations: 1) Energy-aware mapping 2) Energy-aware execution which allow the applications to directly influence the power management decisions. The recommendations eliminate over-allocation of resources and increase the energy efficiency of the computing system. Both recommendations are fully supported in a provided interface in combination with a novel power management runtime system called Bricktop. The work presented in this thesis allows both new- and legacy software to execute with the most energy efficient mapping on a many-core CPU and with the most energy efficient performance level. A set of case study examples demonstrate realworld energy savings in a wide range of applications without performance degradation.

Nested parallelism for multi-core HPC systems using Java

Since its introduction in 1993, the Message Passing Interface (MPI) has become a de facto standard for writing High Performance Computing (HPC) applications on clusters and Massively Parallel Processors (MPPs). The recent emergence of multi-core processor systems presents a new challenge for established parallel programming paradigms, including those based on MPI. This paper presents a new Java messaging system called MPJ Express. Using this system, we exploit multiple levels of parallelism - messaging and threading - to improve application performance on multi-core processors. We refer to our approach as nested parallelism. This MPI-like Java library can support nested parallelism by using Java or Java OpenMP (JOMP) threads within an MPJ Express process. Practicality of this approach is assessed by porting to Java a massively parallel structure formation code from Cosmology called Gadget-2. We introduce nested parallelism in the Java version of the simulation code and report good speed-ups. To the best of our knowledge it is the first time this kind of hybrid parallelism is demonstrated in a high performance Java application. (C) 2009 Elsevier Inc. All rights reserved.

In situ preservation of wetland heritage: hydrological and chemical change in the burial environment of the Somerset Levels, UK.

In Situ preservation is a core strategy for the conservation and management of waterlogged remains at wetland sites. Inorganic and organic remains can, however, quickly become degraded, or lost entirely, as a result of chemical or hydrological changes. Monitoring is therefore crucial in identifying baseline data for a site, the extent of spatial and or temporal variability, and in evaluating the potential impacts of these variables on current and future In Situ preservation potential. Since August 2009, monthly monitoring has taken place at the internationally important Iron Age site of Glastonbury Lake Village in the Somerset Levels, UK. A spatial, stratigraphic, and analytical approach to the analysis of sediment horizons and monitoring of groundwater chemistry, redox potential, water table depth and soil moisture (using TDR) was used to characterize the site. Significant spatial and temporal variability has been identified, with results from water-table monitoring and some initial chemical analysis from Glastonbury presented here. It appears that during dry periods parts of this site are at risk from desiccation. Analysis of the chemical data, in addition to integrating the results from the other parameters, is ongoing, with the aim of clarifying the risk to the entire site.

A benchmark-driven modelling approach for evaluating deployment choices on a multi-core architecture

The complexity of current and emerging architectures provides users with options about how best to use the available resources, but makes predicting performance challenging. In this work a benchmark-driven model is developed for a simple shallow water code on a Cray XE6 system, to explore how deployment choices such as domain decomposition and core affinity affect performance. The resource sharing present in modern multi-core architectures adds various levels of heterogeneity to the system. Shared resources often includes cache, memory, network controllers and in some cases floating point units (as in the AMD Bulldozer), which mean that the access time depends on the mapping of application tasks, and the core's location within the system. Heterogeneity further increases with the use of hardware-accelerators such as GPUs and the Intel Xeon Phi, where many specialist cores are attached to general-purpose cores. This trend for shared resources and non-uniform cores is expected to continue into the exascale era. The complexity of these systems means that various runtime scenarios are possible, and it has been found that under-populating nodes, altering the domain decomposition and non-standard task to core mappings can dramatically alter performance. To find this out, however, is often a process of trial and error. To better inform this process, a performance model was developed for a simple regular grid-based kernel code, shallow. The code comprises two distinct types of work, loop-based array updates and nearest-neighbour halo-exchanges. Separate performance models were developed for each part, both based on a similar methodology. Application specific benchmarks were run to measure performance for different problem sizes under different execution scenarios. These results were then fed into a performance model that derives resource usage for a given deployment scenario, with interpolation between results as necessary.

The Open Provenance Model Core Specification (v1.1)

The Open Provenance Model is a model of provenance that is designed to meet the following requirements: (1) To allow provenance information to be exchanged between systems, by means of a compatibility layer based on a shared provenance model. (2) To allow developers to build and share tools that operate on such a provenance model. (3) To define provenance in a precise, technology-agnostic manner. (4) To support a digital representation of provenance for any 'thing', whether produced by computer systems or not. (5) To allow multiple levels of description to coexist. (6) To define a core set of rules that identify the valid inferences that can be made on provenance representation. This document contains the specification of the Open Provenance Model (v1.1) resulting from a community-effort to achieve inter-operability in the Provenance Challenge series.

Metodologia para adaptação de microarquiteturas microprogramadas soft-core à uma ISA padrão: estudo do impacto sobre a complexidade de hardware para o padrão MIPS

In academia, it is common to create didactic processors, facing practical disciplines in the area of Hardware Computer and can be used as subjects in software platforms, operating systems and compilers. Often, these processors are described without ISA standard, which requires the creation of compilers and other basic software to provide the hardware / software interface and hinder their integration with other processors and devices. Using reconfigurable devices described in a HDL language allows the creation or modification of any microarchitecture component, leading to alteration of the functional units of data path processor as well as the state machine that implements the control unit even as new needs arise. In particular, processors RISP enable modification of machine instructions, allowing entering or modifying instructions, and may even adapt to a new architecture. This work, as the object of study addressing educational soft-core processors described in VHDL, from a proposed methodology and its application on two processors with different complexity levels, shows that it s possible to tailor processors for a standard ISA without causing an increase in the level hardware complexity, ie without significant increase in chip area, while its level of performance in the application execution remains unchanged or is enhanced. The implementations also allow us to say that besides being possible to replace the architecture of a processor without changing its organization, RISP processor can switch between different instruction sets, which can be expanded to toggle between different ISAs, allowing a single processor become adaptive hybrid architecture, which can be used in embedded systems and heterogeneous multiprocessor environments

PCR primed with minisatellite core sequences yields species-specific patterns and assessment of population variability in fishes of the genus Brycon

Minisatellite core sequences were used as single primers in polymerase chain reaction (PCR) to amplify genomic DNA in a way similar to the random amplified polymorphic DNA methodology. This technique, known as Directed Amplification of Minisatellite-region DNA, was applied in order to differentiate three neotropical fish species (Brycon orbignyanus, B. microlepis and B. lundii ) and to detect possible genetic variations among samples of the threatened species, B. lundii , collected in two regions with distinct environmental conditions in the area of influence of a hydroelectric dam. Most primers generated species-specific banding patterns and high levels of intraspecific polymorphism. The genetic variation observed between the two sampling regions of B. lundii was also high enough to suggest the presence of distinct stocks of this species along the same river basin. The results demonstrated that minisatellite core sequences are potentially useful as single primers in PCR to assist in species and population identification. The observed genetic stock differentiation in B. lundii associated with ecological and demographic data constitute a crucial task to develop efficient conservation strategies in order to preserve the genetic diversity of this endangered fish species.

Dye doped, core / shell silica nanoparticles: synthesis, characterization, & biotechnological applications

The aim of this thesis was to design, synthesize and develop a nanoparticle based system to be used as a chemosensor or as a label in bioanalytical applications. A versatile fluorescent functionalizable nanoarchitecture has been effectively produced based on the hydrolysis and condensation of TEOS in direct micelles of Pluronic® F 127, obtaining highly monodisperse silica - core / PEG - shell nanoparticles with a diameter of about 20 nm. Surface functionalized nanoparticles have been obtained in a one-pot procedure by chemical modification of the hydroxyl terminal groups of the surfactant. To make them fluorescent, a whole library of triethoxysilane fluorophores (mainly BODIPY based), encompassing the whole visible spectrum has been synthesized: this derivatization allows a high degree of doping, but the close proximity of the molecules inside the silica matrix leads to the development of self - quenching processes at high doping levels, with the concomitant fall of the fluorescence signal intensity. In order to bypass this parasite phenomenon, multichromophoric systems have been prepared, where highly efficient FRET processes occur, showing that this energy pathway is faster than self - quenching, recovering the fluorescence signal. The FRET efficiency remains very high even four dye nanoparticles, increasing the pseudo Stokes shift of the system, attractive feature for multiplexing analysis. These optimized nanoparticles have been successfully exploited in molecular imaging applications such as in vitro, in vivo and ex vivo imaging, proving themselves superior to conventional molecular fluorophores as signaling units.