982 resultados para chopper power amplifiers


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In this work we report the development of a tube amplifier built to be used in magnetic probe diagnostic of plasma. The probe is used to measure the magnetic field in the theta-pinch system presently running in our university. We present the calculations and procedures to determine the configuration of circuits and specify the components of the power supply, the preamp stage and the power stage. The circuit configuration and the characteristics of the components was obtained. A representative model of the system behavior gave the transfer function of the amplifier. Theoretical predictions of frequency response and the feedback effects were compared to the experimental values and showed very good agreement. The amplifier works between a frequency bandwidth of 20 an 30 kHz and supply a maximum power of 12 W

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The running innovation processes of the microwave transistor technologies, used in the implementation of microwave circuits, have to be supported by the study and development of proper design methodologies which, depending on the applications, will fully exploit the technology potentialities. After the choice of the technology to be used in the particular application, the circuit designer has few degrees of freedom when carrying out his design; in the most cases, due to the technological constrains, all the foundries develop and provide customized processes optimized for a specific performance such as power, low-noise, linearity, broadband etc. For these reasons circuit design is always a “compromise”, an investigation for the best solution to reach a trade off between the desired performances. This approach becomes crucial in the design of microwave systems to be used in satellite applications; the tight space constraints impose to reach the best performances under proper electrical and thermal de-rated conditions, respect to the maximum ratings provided by the used technology, in order to ensure adequate levels of reliability. In particular this work is about one of the most critical components in the front-end of a satellite antenna, the High Power Amplifier (HPA). The HPA is the main power dissipation source and so the element which mostly engrave on space, weight and cost of telecommunication apparatus; it is clear from the above reasons that design strategies addressing optimization of power density, efficiency and reliability are of major concern. Many transactions and publications demonstrate different methods for the design of power amplifiers, highlighting the availability to obtain very good levels of output power, efficiency and gain. Starting from existing knowledge, the target of the research activities summarized in this dissertation was to develop a design methodology capable optimize power amplifier performances complying all the constraints imposed by the space applications, tacking into account the thermal behaviour in the same manner of the power and the efficiency. After a reminder of the existing theories about the power amplifier design, in the first section of this work, the effectiveness of the methodology based on the accurate control of the dynamic Load Line and her shaping will be described, explaining all steps in the design of two different kinds of high power amplifiers. Considering the trade-off between the main performances and reliability issues as the target of the design activity, we will demonstrate that the expected results could be obtained working on the characteristics of the Load Line at the intrinsic terminals of the selected active device. The methodology proposed in this first part is based on the assumption that designer has the availability of an accurate electrical model of the device; the variety of publications about this argument demonstrates that it is so difficult to carry out a CAD model capable to taking into account all the non-ideal phenomena which occur when the amplifier operates at such high frequency and power levels. For that, especially for the emerging technology of Gallium Nitride (GaN), in the second section a new approach for power amplifier design will be described, basing on the experimental characterization of the intrinsic Load Line by means of a low frequency high power measurements bench. Thanks to the possibility to develop my Ph.D. in an academic spin-off, MEC – Microwave Electronics for Communications, the results of this activity has been applied to important research programs requested by space agencies, with the aim support the technological transfer from universities to industrial world and to promote a science-based entrepreneurship. For these reasons the proposed design methodology will be explained basing on many experimental results.

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The main areas of research of this thesis are Interference Management and Link-Level Power Efficiency for Satellite Communications. The thesis is divided in two parts. Part I tackles the problem of interference environments in satellite communications, and interference mitigation strategies, not just in terms of avoidance of the interferers, but also in terms of actually exploiting the interference present in the system as a useful signal. The analysis follows a top-down approach across different levels of investigation, starting from system level consideration on interference management, down to link-level aspects and to intra-receiver design. Interference Management techniques are proposed at all the levels of investigation, with interesting results. Part II is related to efficiency in the power domain, for instance in terms of required Input Back-off at the power amplifiers, which can be an issue for waveform based on linear modulations, due to their varying envelope. To cope with such aspects, an analysis is carried out to compare linear modulation with waveforms based on constant envelope modulations. It is shown that in some scenarios, constant envelope waveforms, even if at lower spectral efficiency, outperform linear modulation waveform in terms of energy efficiency.

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In this paper, an interleaved multiphase buck converter with minimum time control strategy for envelope amplifiers in high efficiency RF power amplifiers is proposed. The solution for the envelope amplifier is to combine the proposed converter with a linear regulator in series. High efficiency of envelope amplifier can be obtained through modulating the supply voltage of the linear regulator. Instead of tracking the envelope, the buck converter has discrete output voltage that corresponding to particular duty cycles which achieve total ripple cancellation. The transient model for minimum time control is explained, and the calculation of transient times that are pre-calculated and inserted into a lookup table is presented. The filter design trade-off that limits capability of envelope modulation is also discussed. The experimental results verify the fast voltage transient obtained with a 4-phase buck prototype.

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Classical linear amplifiers such as A, AB and B offer very good linearity suitable for RF power amplifiers. However, its inherent low efficiency limits its use especially in base-stations that manage tens or hundreds of Watts. The use of linearization techniques such as Envelope Elimination and Restoration (EER) allow an increase of efficiency keeping good linearity. This technique requires a very fast dc-dc power converter to provide variable voltage supply to the power amplifier. In this paper, several alternatives are analyzed to implement the envelope amplifier based on a cascade association of a switched dc-dc converter and a linear regulator. A simplified version of this approach is also suitable to operate with Envelope Tracking technique.

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There are many the requirements that modern power converters should fulfill. Most of the applications where these converters are used, demand smaller converters with high efficiency, improved power density and a fast dynamic response. For instance, loads like microprocessors demand aggressive current steps with very high slew rates (100A/mus and higher); besides, during these load steps, the supply voltage of the microprocessor should be kept within tight limits in order to ensure its correct performance. The accomplishment of these requirements is not an easy task; complex solutions like advanced topologies - such as multiphase converters- as well as advanced control strategies are often needed. Besides, it is also necessary to operate the converter at high switching frequencies and to use capacitors with high capacitance and low ESR. Improving the dynamic response of power converters does not rely only on the control strategy but also the power topology should be suited to enable a fast dynamic response. Moreover, in later years, a fast dynamic response does not only mean accomplishing fast load steps but output voltage steps are gaining importance as well. At least, two applications that require fast voltage changes can be named: Low power microprocessors. In these devices, the voltage supply is changed according to the workload and the operating frequency of the microprocessor is changed at the same time. An important reduction in voltage dependent losses can be achieved with such changes. This technique is known as Dynamic Voltage Scaling (DVS). Another application where important energy savings can be achieved by means of changing the supply voltage are Radio Frequency Power Amplifiers. For example, RF architectures based on ‘Envelope Tracking’ and ‘Envelope Elimination and Restoration’ techniques can take advantage of voltage supply modulation and accomplish important energy savings in the power amplifier. However, in order to achieve these efficiency improvements, a power converter with high efficiency and high enough bandwidth (hundreds of kHz or even tens of MHz) is necessary in order to ensure an adequate supply voltage. The main objective of this Thesis is to improve the dynamic response of DC-DC converters from the point of view of the power topology. And the term dynamic response refers both to the load steps and the voltage steps; it is also interesting to modulate the output voltage of the converter with a specific bandwidth. In order to accomplish this, the question of what is it that limits the dynamic response of power converters should be answered. Analyzing this question leads to the conclusion that the dynamic response is limited by the power topology and specifically, by the filter inductance of the converter which is found in series between the input and the output of the converter. The series inductance is the one that determines the gain of the converter and provides the regulation capability. Although the energy stored in the filter inductance enables the regulation and the capability of filtering the output voltage, it imposes a limitation which is the concern of this Thesis. The series inductance stores energy and prevents the current from changing in a fast way, limiting the slew rate of the current through this inductor. Different solutions are proposed in the literature in order to reduce the limit imposed by the filter inductor. Many publications proposing new topologies and improvements to known topologies can be found in the literature. Also, complex control strategies are proposed with the objective of improving the dynamic response in power converters. In the proposed topologies, the energy stored in the series inductor is reduced; examples of these topologies are Multiphase converters, Buck converter operating at very high frequency or adding a low impedance path in parallel with the series inductance. Control techniques proposed in the literature, focus on adjusting the output voltage as fast as allowed by the power stage; examples of these control techniques are: hysteresis control, V 2 control, and minimum time control. In some of the proposed topologies, a reduction in the value of the series inductance is achieved and with this, the energy stored in this magnetic element is reduced; less stored energy means a faster dynamic response. However, in some cases (as in the high frequency Buck converter), the dynamic response is improved at the cost of worsening the efficiency. In this Thesis, a drastic solution is proposed: to completely eliminate the series inductance of the converter. This is a more radical solution when compared to those proposed in the literature. If the series inductance is eliminated, the regulation capability of the converter is limited which can make it difficult to use the topology in one-converter solutions; however, this topology is suitable for power architectures where the energy conversion is done by more than one converter. When the series inductor is eliminated from the converter, the current slew rate is no longer limited and it can be said that the dynamic response of the converter is independent from the switching frequency. This is the main advantage of eliminating the series inductor. The main objective, is to propose an energy conversion strategy that is done without series inductance. Without series inductance, no energy is stored between the input and the output of the converter and the dynamic response would be instantaneous if all the devices were ideal. If the energy transfer from the input to the output of the converter is done instantaneously when a load step occurs, conceptually it would not be necessary to store energy at the output of the converter (no output capacitor COUT would be needed) and if the input source is ideal, the input capacitor CIN would not be necessary. This last feature (no CIN with ideal VIN) is common to all power converters. However, when the concept is actually implemented, parasitic inductances such as leakage inductance of the transformer and the parasitic inductance of the PCB, cannot be avoided because they are inherent to the implementation of the converter. These parasitic elements do not affect significantly to the proposed concept. In this Thesis, it is proposed to operate the converter without series inductance in order to improve the dynamic response of the converter; however, on the other side, the continuous regulation capability of the converter is lost. It is said continuous because, as it will be explained throughout the Thesis, it is indeed possible to achieve discrete regulation; a converter without filter inductance and without energy stored in the magnetic element, is capable to achieve a limited number of output voltages. The changes between these output voltage levels are achieved in a fast way. The proposed energy conversion strategy is implemented by means of a multiphase converter where the coupling of the phases is done by discrete two-winding transformers instead of coupledinductors since transformers are, ideally, no energy storing elements. This idea is the main contribution of this Thesis. The feasibility of this energy conversion strategy is first analyzed and then verified by simulation and by the implementation of experimental prototypes. Once the strategy is proved valid, different options to implement the magnetic structure are analyzed. Three different discrete transformer arrangements are studied and implemented. A converter based on this energy conversion strategy would be designed with a different approach than the one used to design classic converters since an additional design degree of freedom is available. The switching frequency can be chosen according to the design specifications without penalizing the dynamic response or the efficiency. Low operating frequencies can be chosen in order to favor the efficiency; on the other hand, high operating frequencies (MHz) can be chosen in order to favor the size of the converter. For this reason, a particular design procedure is proposed for the ‘inductorless’ conversion strategy. Finally, applications where the features of the proposed conversion strategy (high efficiency with fast dynamic response) are advantageus, are proposed. For example, in two-stage power architectures where a high efficiency converter is needed as the first stage and there is a second stage that provides the fine regulation. Another example are RF power amplifiers where the voltage is modulated following an envelope reference in order to save power; in this application, a high efficiency converter, capable of achieving fast voltage steps is required. The main contributions of this Thesis are the following: The proposal of a conversion strategy that is done, ideally, without storing energy in the magnetic element. The validation and the implementation of the proposed energy conversion strategy. The study of different magnetic structures based on discrete transformers for the implementation of the proposed energy conversion strategy. To elaborate and validate a design procedure. To identify and validate applications for the proposed energy conversion strategy. It is important to remark that this work is done in collaboration with Intel. The particular features of the proposed conversion strategy enable the possibility of solving the problems related to microprocessor powering in a different way. For example, the high efficiency achieved with the proposed conversion strategy enables it as a good candidate to be used for power conditioning, as a first stage in a two-stage power architecture for powering microprocessors.

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The achievement of higher frequencies (HF) and the reduction of energy consumption, to improve sensing, communication and computation, involve the continued scaling down to the nanometer level. This scaling is enabled by of innovative device designs, improved processing technologies and assessment tools, and new material structures. In this work, we have used all these factors to demonstrate state-of-the-art HF devices in two materials with quite different electronic properties: wide semiconductor bandgap III-nitrides for resonators and power amplifiers; and graphene, a zero bandgap material expected to revolutionize low noise and HF flexible electronics. Some issues faced during their development will be discussed during the talk.

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In the last years, RF power amplifiers are taking advantage of the switched dc-dc converters to use them in several architectures that may improve the efficiency of the amplifier, keeping a good linearity. The use of linearization techniques such as Envelope Elimination and Restoration(EER) and Envelope Tracking (ET) requires a very fast dc-dc power converter to provide variable voltage supply to the power amplifier but theoretically the efficiency can be much higher than using the classical amplifiers belonging to classes A, B or AB. The purpose of this paper is to analyze the state of the art of the power converters used as envelope amplifiers in this application. The power topologies will be explored and several important parameters such as efficiency, bandwidth will be discussed.

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Envelope Tracking (ET) and Envelope Elimination and Restoration (EER) are two techniques that have been used as a solution for highly efficient linear RF Power Amplifiers (PA). In both techniques the most important part is a dc-dc converter called envelope amplifier that has to supply the RF PA with variable voltage. Besides high efficiency, its bandwidth is very important as well. Envelope amplifier based on parallel combination of a switching dc-dc converter and a linear regulator is an architecture that is widely used due to its simplicity. In this paper we discuss about theoretical limitations of this architecture regarding its efficiency and we demonstrate two possible way of its implementation. In order to derive the presented conclusions, a theoretical model of envelope amplifier's efficiency has been presented. Additionally, the benefits of the new emerging GaN technology for this application have been shown as well.

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In the last years, RF power amplifiers are taking advantage of the switched dc-dc converters to use them in several architectures that may improve the efficiency of the amplifier, keeping a good linearity. The use of linearization techniques such as Envelope Elimination and Restoration (EER) and Envelope Tracking (ET) requires a very fast dc-dc power converter to provide variable voltage supply to the power amplifier but theoretically the efficiency can be much higher than using the classical amplifiers belonging to classes A, B or AB. The purpose of this paper is to analyze the state of the art of the power converters used as envelope amplifiers in this application where a fast output voltage variation is required. The power topologies will be explored and several important parameters such as efficiency, bandwidth and output voltage range will be discussed.

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En este proyecto se ha diseñado con éxito un amplificador de potencia cuya misión será trabajar como driver, teniendo así que excitar a un amplificador de mayor potencia. Como principales requisitos se puede destacar una potencia de salida de 4 W trabajando a una frecuencia central de 100 MHz con un ancho de banda relativo de entre el 20% y el 30% y un rendimiento tan grande como sea posible. El diseño se ha considerado exitoso ya que se ha llegado a conseguir un ancho de banda de trabajo por encima de los 4 W del 40% sacrificando el rendimiento ó del 30% con un rendimiento en torno al 90%. Los contenidos del presente proyecto incluyen los conocimientos teóricos sobre amplificadores de potencia necesarios para comprender lo explicado, así como una descripción detallada de todo el proceso de diseño, optimización, implementación y medidas que se han llevado a cabo. Por último se muestran unas conclusiones basadas en los resultados experimentales obtenidos así como una serie de mejoras propuestas. ABSTRACT In this project, a power amplifier has been successfully designed. The power amplifier designed will perform as a driver whose main target is to excite another power amplifier with a higher output power. As basic requirements can be highlighted an output power of 4 W, a working center frequency at 100 MHz with a relative bandwidth between 20% and 30% with an efficiency as high as possible. The design has been considered successful because a relative working bandwidth above 4 W of 40% has been reached with a drawback in the efficiency or a relative working bandwidth above 4 W of 30% with around 90% efficiency. The content of this project includes the theoretical knowledge about power amplifiers needed to follow most of the explanations as well as a detailed description of the whole process involving design, optimization, prototyping and measurement carried out during the project. Lastly, some conclusions are shown based on experimental results as well as some design improvements.

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Durante los últimos años la tendencia en el sector de las telecomunicaciones ha sido un aumento y diversificación en la transmisión de voz, video y fundamentalmente de datos. Para conseguir alcanzar las tasas de transmisión requeridas, los nuevos estándares de comunicaciones requieren un mayor ancho de banda y tienen un mayor factor de pico, lo cual influye en el bajo rendimiento del amplificador de radiofrecuencia (RFPA). Otro factor que ha influido en el bajo rendimiento es el diseño del amplificador de radiofrecuencia. Tradicionalmente se han utilizado amplificadores lineales por su buen funcionamiento. Sin embargo, debido al elevado factor de pico de las señales transmitidas, el rendimiento de este tipo de amplificadores es bajo. El bajo rendimiento del sistema conlleva desventajas adicionales como el aumento del coste y del tamaño del sistema de refrigeración, como en el caso de una estación base, o como la reducción del tiempo de uso y un mayor calentamiento del equipo para sistemas portátiles alimentados con baterías. Debido a estos factores, se han desarrollado durante las últimas décadas varias soluciones para aumentar el rendimiento del RFPA como la técnica de Outphasing, combinadores de potencia o la técnica de Doherty. Estas soluciones mejoran las prestaciones del RFPA y en algún caso han sido ampliamente utilizados comercialmente como la técnica de Doherty, que alcanza rendimientos hasta del 50% para el sistema completo para anchos de banda de hasta 20MHz. Pese a las mejoras obtenidas con estas soluciones, los mayores rendimientos del sistema se obtienen para soluciones basadas en la modulación de la tensión de alimentación del amplificador de potencia como “Envelope Tracking” o “EER”. La técnica de seguimiento de envolvente o “Envelope Tracking” está basada en la modulación de la tensión de alimentación de un amplificador lineal de potencia para obtener una mejora en el rendimiento en el sistema comparado a una solución con una tensión de alimentación constante. Para la implementación de esta técnica se necesita una etapa adicional, el amplificador de envolvente, que añade complejidad al amplificador de radiofrecuencia. En un amplificador diseñado con esta técnica, se aumentan las pérdidas debido a la etapa adicional que supone el amplificador de envolvente pero a su vez disminuyen las pérdidas en el amplificador de potencia. Si el diseño se optimiza adecuadamente, puede conseguirse un aumento global en el rendimiento del sistema superior al conseguido con las técnicas mencionadas anteriormente. Esta técnica presenta ventajas en el diseño del amplificador de envolvente, ya que el ancho de banda requerido puede ser menor que el ancho de banda de la señal de envolvente si se optimiza adecuadamente el diseño. Adicionalmente, debido a que la sincronización entre la señal de envolvente y de fase no tiene que ser perfecta, el proceso de integración conlleva ciertas ventajas respecto a otras técnicas como EER. La técnica de eliminación y restauración de envolvente, llamada EER o técnica de Kahn está basada en modulación simultánea de la envolvente y la fase de la señal usando un amplificador de potencia conmutado, no lineal y que permite obtener un elevado rendimiento. Esta solución fue propuesta en el año 1952, pero no ha sido implementada con éxito durante muchos años debido a los exigentes requerimientos en cuanto a la sincronización entre fase y envolvente, a las técnicas de control y de corrección de los errores y no linealidades de cada una de las etapas así como de los equipos para poder implementar estas técnicas, que tienen unos requerimientos exigentes en capacidad de cálculo y procesamiento. Dentro del diseño de un RFPA, el amplificador de envolvente tiene una gran importancia debido a su influencia en el rendimiento y ancho de banda del sistema completo. Adicionalmente, la linealidad y la calidad de la señal de transmitida deben ser elevados para poder cumplir con los diferentes estándares de telecomunicaciones. Esta tesis se centra en el amplificador de envolvente y el objetivo principal es el desarrollo de soluciones que permitan el aumento del rendimiento total del sistema a la vez que satisfagan los requerimientos de ancho de banda, calidad de la señal transmitida y de linealidad. Debido al elevado rendimiento que potencialmente puede alcanzarse con la técnica de EER, esta técnica ha sido objeto de análisis y en el estado del arte pueden encontrarse numerosas referencias que analizan el diseño y proponen diversas implementaciones. En una clasificación de alto nivel, podemos agrupar las soluciones propuestas del amplificador de envolvente según estén compuestas de una o múltiples etapas. Las soluciones para el amplificador de envolvente en una configuración multietapa se basan en la combinación de un convertidor conmutado, de elevado rendimiento con un regulador lineal, de alto ancho de banda, en una combinación serie o paralelo. Estas soluciones, debido a la combinación de las características de ambas etapas, proporcionan un buen compromiso entre rendimiento y buen funcionamiento del amplificador de RF. Por otro lado, la complejidad del sistema aumenta debido al mayor número de componentes y de señales de control necesarias y el aumento de rendimiento que se consigue con estas soluciones es limitado. Una configuración en una etapa tiene las ventajas de una mayor simplicidad, pero debido al elevado ancho de banda necesario, la frecuencia de conmutación debe aumentarse en gran medida. Esto implicará un bajo rendimiento y un peor funcionamiento del amplificador de envolvente. En el estado del arte pueden encontrarse diversas soluciones para un amplificador de envolvente en una etapa, como aumentar la frecuencia de conmutación y realizar la implementación en un circuito integrado, que tendrá mejor funcionamiento a altas frecuencias o utilizar técnicas topológicas y/o filtros de orden elevado, que permiten una reducción de la frecuencia de conmutación. En esta tesis se propone de manera original el uso de la técnica de cancelación de rizado, aplicado al convertidor reductor síncrono, para reducir la frecuencia de conmutación comparado con diseño equivalente del convertidor reductor convencional. Adicionalmente se han desarrollado dos variantes topológicas basadas en esta solución para aumentar la robustez y las prestaciones de la misma. Otro punto de interés en el diseño de un RFPA es la dificultad de poder estimar la influencia de los parámetros de diseño del amplificador de envolvente en el amplificador final integrado. En esta tesis se ha abordado este problema y se ha desarrollado una herramienta de diseño que permite obtener las principales figuras de mérito del amplificador integrado para la técnica de EER a partir del diseño del amplificador de envolvente. Mediante el uso de esta herramienta pueden validarse el efecto del ancho de banda, el rizado de tensión de salida o las no linealidades del diseño del amplificador de envolvente para varias modulaciones digitales. Las principales contribuciones originales de esta tesis son las siguientes: La aplicación de la técnica de cancelación de rizado a un convertidor reductor síncrono para un amplificador de envolvente de alto rendimiento para un RFPA linealizado mediante la técnica de EER. Una reducción del 66% en la frecuencia de conmutación, comparado con el reductor convencional equivalente. Esta reducción se ha validado experimentalmente obteniéndose una mejora en el rendimiento de entre el 12.4% y el 16% para las especificaciones de este trabajo. La topología y el diseño del convertidor reductor con dos redes de cancelación de rizado en cascada para mejorar el funcionamiento y robustez de la solución con una red de cancelación. La combinación de un convertidor redactor multifase con la técnica de cancelación de rizado para obtener una topología que proporciona una reducción del cociente entre frecuencia de conmutación y ancho de banda de la señal. El proceso de optimización del control del amplificador de envolvente en lazo cerrado para mejorar el funcionamiento respecto a la solución en lazo abierto del convertidor reductor con red de cancelación de rizado. Una herramienta de simulación para optimizar el proceso de diseño del amplificador de envolvente mediante la estimación de las figuras de mérito del RFPA, implementado mediante EER, basada en el diseño del amplificador de envolvente. La integración y caracterización del amplificador de envolvente basado en un convertidor reductor con red de cancelación de rizado en el transmisor de radiofrecuencia completo consiguiendo un elevado rendimiento, entre 57% y 70.6% para potencias de salida de 14.4W y 40.7W respectivamente. Esta tesis se divide en seis capítulos. El primer capítulo aborda la introducción enfocada en la aplicación, los amplificadores de potencia de radiofrecuencia, así como los principales problemas, retos y soluciones existentes. En el capítulo dos se desarrolla el estado del arte de amplificadores de potencia de RF, describiéndose las principales técnicas de diseño, las causas de no linealidad y las técnicas de optimización. El capítulo tres está centrado en las soluciones propuestas para el amplificador de envolvente. El modo de control se ha abordado en este capítulo y se ha presentado una optimización del diseño en lazo cerrado para el convertidor reductor convencional y para el convertidor reductor con red de cancelación de rizado. El capítulo cuatro se centra en el proceso de diseño del amplificador de envolvente. Se ha desarrollado una herramienta de diseño para evaluar la influencia del amplificador de envolvente en las figuras de mérito del RFPA. En el capítulo cinco se presenta el proceso de integración realizado y las pruebas realizadas para las diversas modulaciones, así como la completa caracterización y análisis del amplificador de RF. El capítulo seis describe las principales conclusiones de la tesis y las líneas futuras. ABSTRACT The trend in the telecommunications sector during the last years follow a high increase in the transmission rate of voice, video and mainly in data. To achieve the required levels of data rates, the new modulation standards demand higher bandwidths and have a higher peak to average power ratio (PAPR). These specifications have a direct impact in the low efficiency of the RFPA. An additional factor for the low efficiency of the RFPA is in the power amplifier design. Traditionally, linear classes have been used for the implementation of the power amplifier as they comply with the technical requirements. However, they have a low efficiency, especially in the operating range of signals with a high PAPR. The low efficiency of the transmitter has additional disadvantages as an increase in the cost and size as the cooling system needs to be increased for a base station and a temperature increase and a lower use time for portable devices. Several solutions have been proposed in the state of the art to improve the efficiency of the transmitter as Outphasing, power combiners or Doherty technique. However, the highest potential of efficiency improvement can be obtained using a modulated power supply for the power amplifier, as in the Envelope Tracking and EER techniques. The Envelope Tracking technique is based on the modulation of the power supply of a linear power amplifier to improve the overall efficiency compared to a fixed voltage supply. In the implementation of this technique an additional stage is needed, the envelope amplifier, that will increase the complexity of the RFPA. However, the efficiency of the linear power amplifier will increase and, if designed properly, the RFPA efficiency will be improved. The advantages of this technique are that the envelope amplifier design does not require such a high bandwidth as the envelope signal and that in the integration process a perfect synchronization between envelope and phase is not required. The Envelope Elimination and Restoration (EER) technique, known also as Kahn’s technique, is based on the simultaneous modulation of envelope and phase using a high efficiency switched power amplifier. This solution has the highest potential in terms of the efficiency improvement but also has the most challenging specifications. This solution, proposed in 1952, has not been successfully implemented until the last two decades due to the high demanding requirements for each of the stages as well as for the highly demanding processing and computation capabilities needed. At the system level, a very precise synchronization is required between the envelope and phase paths to avoid a linearity decrease of the system. Several techniques are used to compensate the non-linear effects in amplitude and phase and to improve the rejection of the out of band noise as predistortion, feedback and feed-forward. In order to obtain a high bandwidth and efficient RFPA using either ET or EER, the envelope amplifier stage will have a critical importance. The requirements for this stage are very demanding in terms of bandwidth, linearity and quality of the transmitted signal. Additionally the efficiency should be as high as possible, as the envelope amplifier has a direct impact in the efficiency of the overall system. This thesis is focused on the envelope amplifier stage and the main objective will be the development of high efficiency envelope amplifier solutions that comply with the requirements of the RFPA application. The design and optimization of an envelope amplifier for a RFPA application is a highly referenced research topic, and many solutions that address the envelope amplifier and the RFPA design and optimization can be found in the state of the art. From a high level classification, multiple and single stage envelope amplifiers can be identified. Envelope amplifiers for EER based on multiple stage architecture combine a linear assisted stage and a switched-mode stage, either in a series or parallel configuration, to achieve a very high performance RFPA. However, the complexity of the system increases and the efficiency improvement is limited. A single-stage envelope amplifier has the advantage of a lower complexity but in order to achieve the required bandwidth the switching frequency has to be highly increased, and therefore the performance and the efficiency are degraded. Several techniques are used to overcome this limitation, as the design of integrated circuits that are capable of switching at very high rates or the use of topological solutions, high order filters or a combination of both to reduce the switching frequency requirements. In this thesis it is originally proposed the use of the ripple cancellation technique, applied to a synchronous buck converter, to reduce the switching frequency requirements compared to a conventional buck converter for an envelope amplifier application. Three original proposals for the envelope amplifier stage, based on the ripple cancellation technique, are presented and one of the solutions has been experimentally validated and integrated in the complete amplifier, showing a high total efficiency increase compared to other solutions of the state of the art. Additionally, the proposed envelope amplifier has been integrated in the complete RFPA achieving a high total efficiency. The design process optimization has also been analyzed in this thesis. Due to the different figures of merit between the envelope amplifier and the complete RFPA it is very difficult to obtain an optimized design for the envelope amplifier. To reduce the design uncertainties, a design tool has been developed to provide an estimation of the RFPA figures of merit based on the design of the envelope amplifier. The main contributions of this thesis are: The application of the ripple cancellation technique to a synchronous buck converter for an envelope amplifier application to achieve a high efficiency and high bandwidth EER RFPA. A 66% reduction of the switching frequency, validated experimentally, compared to the equivalent conventional buck converter. This reduction has been reflected in an improvement in the efficiency between 12.4% and 16%, validated for the specifications of this work. The synchronous buck converter with two cascaded ripple cancellation networks (RCNs) topology and design to improve the robustness and the performance of the envelope amplifier. The combination of a phase-shifted multi-phase buck converter with the ripple cancellation technique to improve the envelope amplifier switching frequency to signal bandwidth ratio. The optimization of the control loop of an envelope amplifier to improve the performance of the open loop design for the conventional and ripple cancellation buck converter. A simulation tool to optimize the envelope amplifier design process. Using the envelope amplifier design as the input data, the main figures of merit of the complete RFPA for an EER application are obtained for several digital modulations. The successful integration of the envelope amplifier based on a RCN buck converter in the complete RFPA obtaining a high efficiency integrated amplifier. The efficiency obtained is between 57% and 70.6% for an output power of 14.4W and 40.7W respectively. The main figures of merit for the different modulations have been characterized and analyzed. This thesis is organized in six chapters. In Chapter 1 is provided an introduction of the RFPA application, where the main problems, challenges and solutions are described. In Chapter 2 the technical background for radiofrequency power amplifiers (RF) is presented. The main techniques to implement an RFPA are described and analyzed. The state of the art techniques to improve performance of the RFPA are identified as well as the main sources of no-linearities for the RFPA. Chapter 3 is focused on the envelope amplifier stage. The three different solutions proposed originally in this thesis for the envelope amplifier are presented and analyzed. The control stage design is analyzed and an optimization is proposed both for the conventional and the RCN buck converter. Chapter 4 is focused in the design and optimization process of the envelope amplifier and a design tool to evaluate the envelope amplifier design impact in the RFPA is presented. Chapter 5 shows the integration process of the complete amplifier. Chapter 6 addresses the main conclusions of the thesis and the future work.

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The availability of suitable laser sources is one of the main challenges in future space missions for accurate measurement of atmospheric CO2. The main objective of the European project BRITESPACE is to demonstrate the feasibility of an all-semiconductor laser source to be used as a space-borne laser transmitter in an Integrated Path Differential Absorption (IPDA) lidar system. We present here the proposed transmitter and system architectures, the initial device design and the results of the simulations performed in order to estimate the source requirements in terms of power, beam quality, and spectral properties to achieve the required measurement accuracy. The laser transmitter is based on two InGaAsP/InP monolithic Master Oscillator Power Amplifiers (MOPAs), providing the ON and OFF wavelengths close to the selected absorption line around 1.57 µm. Each MOPA consists of a frequency stabilized Distributed Feedback (DFB) master oscillator, a modulator section, and a tapered semiconductor amplifier optimized to maximize the optical output power. The design of the space-compliant laser module includes the beam forming optics and the thermoelectric coolers.The proposed system replaces the conventional pulsed source with a modulated continuous wave source using the Random Modulation-Continuous Wave (RM-CW) approach, allowing the designed semiconductor MOPA to be applicable in such applications. The system requirements for obtaining a CO2 retrieval accuracy of 1 ppmv and a spatial resolution of less than 10 meters have been defined. Envelope estimated of the returns indicate that the average power needed is of a few watts and that the main noise source is the ambient noise.

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High brightness semiconductor lasers are potential transmitters for future space lidar systems. In the framework of the European Project BRITESPACE, we propose an all-semiconductor laser source for an Integrated Path Differential Absorption lidar system for column-averaged measurements of atmospheric CO2 in future satellite missions. The complete system architecture has to be adapted to the particular emission properties of these devices using a Random Modulated Continuous Wave approach. We present the initial experimental results of the InGaAsP/InP monolithic Master Oscillator Power Amplifiers, providing the ON and OFF wavelengths close to the selected absorption line around 1572 nm.

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We propose a Wiener-Hammerstein (W-H) channel estimation algorithm for Long-Term Evolution (LTE) systems. The LTE standard provides known data as pilot symbols and exploits them through coherent detection to improve system performance. These drivers are placed in a hybrid way to cover up both time and frequency domain. Our aim is to adapt the W-H equalizer (W-H/E) to LTE standard for compensation of both linear and nonlinear effects induced by power amplifiers and multipath channels. We evaluate the performance of the W-H/E for a Downlink LTE system in terms of BLER, EVM and Throughput versus SNR. Afterwards, we compare the results with a traditional Least-Mean Square (LMS) equalizer. It is shown that W-H/E can significantly reduce both linear and nonlinear distortions compared to LMS and improve LTE Downlink system performance.