Resonant power conversion topologies for inductive charging of electrical vehicle batteries

This thesis is concerned with inductive charging of electric vehicle batteries. Rectified power form the 50/60 Hz utility feeds a dc-ac converter which delivers high-frequency ac power to the electric vehicle inductive coupling inlet. The inlet configuration has been defined by the Society of Automotive Engineers in Recommended Practice J-1773. This thesis studies converter topologies related to the series resonant converter. When coupled to the vehicle inlet, the frequency-controlled series-resonant converter results in a capacitively-filtered series-parallel LCLC (SP-LCLC) resonant converter topology with zero voltage switching and many other desirable features. A novel time-domain transformation analysis, termed Modal Analysis, is developed, using a state variable transformation, to analyze and characterize this multi-resonant fourth-orderconverter. Next, Fundamental Mode Approximation (FMA) Analysis, based on a voltage-source model of the load, and its novel extension, Rectifier-Compensated FMA (RCFMA) Analysis, are developed and applied to the SP-LCLC converter. The RCFMA Analysis is a simpler and more intuitive analysis than the Modal Analysis, and provides a relatively accurate closed-form solution for the converter behavior. Phase control of the SP-LCLC converter is investigated as a control option. FMA and RCFMA Analyses are used for detailed characterization. The analyses identify areas of operation, which are also validated experimentally, where it is advantageous to phase control the converter. A novel hybrid control scheme is proposed which integrates frequency and phase control and achieves reduced operating frequency range and improved partial-load efficiency. The phase-controlled SP-LCLC converter can also be configured with a parallel load and is an excellent option for the application. The resulting topology implements soft-switching over the entire load range and has high full-load and partial-load efficiencies. RCFMA Analysis is used to analyze and characterize the new converter topology, and good correlation is shown with experimental results. Finally, a novel single-stage power-factor-corrected ac-dc converter is introduced, which uses the current-source characteristic of the SP-LCLC topology to provide power factor correction over a wide output power range from zero to full load. This converter exhibits all the advantageous characteristics of its dc-dc counterpart, with a reduced parts count and cost. Simulation and experimental results verify the operation of the new converter.

A 12 kW three-phase low THD rectifier with high-frequency isolation and regulated DC output

A robust 12 kW rectifier with low THD in the line currents, based on an 18-pulse transformer arrangement with reduced kVA capacities followed by a high-frequency isolation stage is presented in this work. Three full-bridge (buck-based) converters are used to allow galvanic isolation and to balance the dc-link currents, without current sensing or current controller. The topology provides a regulated dc output with a very simple and well-known control strategy and natural three-phase power factor correction. The phase-shift PWM technique, with zero-voltage switching is used for the high-frequency dc-dc stage. Analytical results from Fourier analysis of winding currents and the vector diagram of winding voltages are presented. Experimental results from a 12 kW prototype are shown in the paper to verify the efficiency, robustness and simplicity of the command circuitry to the proposed concept.

Reatores eletrônicos para sistemas de iluminação com múltiplas lâmpadas tubulares fluorescentes com controle de luminosidade, elevada eficiência e elevado fator de potência

Pós-graduação em Engenharia Elétrica - FEIS

A NEW DC UPS FOR DC POWER DISTRIBUTION SYSTEM IN DATA CENTER

In recent years, the 380V DC and 48V DC distribution systems have been extensively studied for the latest data centers. It is widely believed that the 380V DC system is a very promising candidate because of its lower cable cost compared to the 48V DC system. However, previous studies have not adequately addressed the low reliability issue with the 380V DC systems due to large amount of series connected batteries. In this thesis, a quantitative comparison for the two systems has been presented in terms of efficiency, reliability and cost. A new multi-port DC UPS with both high voltage output and low voltage output is proposed. When utility ac is available, it delivers power to the load through its high voltage output and charges the battery through its low voltage output. When utility ac is off, it boosts the low battery voltage and delivers power to the load form the battery. Thus, the advantages of both systems are combined and the disadvantages of them are avoided. High efficiency is also achieved as only one converter is working in either situation. Details about the design and analysis of the new UPS are presented. For the main AC-DC part of the new UPS, a novel bridgeless three-level single-stage AC-DC converter is proposed. It eliminates the auxiliary circuit for balancing the capacitor voltages and the two bridge rectifier diodes in previous topology. Zero voltage switching, high power factor, and low component stresses are achieved with this topology. Compared to previous topologies, the proposed converter has a lower cost, higher reliability, and higher efficiency. The steady state operation of the converter is analyzed and a decoupled model is proposed for the converter. For the battery side converter as a part of the new UPS, a ZVS bidirectional DC-DC converter based on self-sustained oscillation control is proposed. Frequency control is used to ensure the ZVS operation of all four switches and phase shift control is employed to regulate the converter output power. Detailed analysis of the steady state operation and design of the converter are presented. Theoretical, simulation, and experimental results are presented to verify the effectiveness of the proposed concepts.

A 4 GHz non-resonant clock driver with inductor-assisted energy return to power grid

Power consumption of a multi-GHz local clock driver is reduced by returning energy stored in the clock-tree load capacitance back to the on-chip power-distribution grid. We call this type of return energy recycling. To achieve a nearly square clock waveform, the energy is transferred in a non-resonant way using an on-chip inductor in a configuration resembling a full-bridge DC-DC converter. A zero-voltage switching technique is implemented in the clock driver to reduce dynamic power loss associated with the high switching frequencies. A prototype implemented in 90 nm CMOS shows a power savings of 35% at 4 GHz. The area needed for the inductor in this new clock driver is about 6% of a local clock region. © 2006 IEEE.

Studio dei circuiti di clamper negli amplificatori operanti in classe e

Questa tesi tratta dell’amplificatore di potenza (PA–Power Amplifier) operante in classe E. Si tratta di un convertitore DC/AC ad elevato rendimento che può trovare impiego in numerose applicazioni in cui il problema della generazione di calore o la necessità di non sprecare energia sono particolarmente stringenti (ad esempio apparati per cui non è previsto un impianto di raffreddamento e/o apparati alimentati a batteria). L’elevato rendimento di un amplificatore operante in classe E deriva dalle specifiche forme d’onda ai capi del dispositivo attivo impiegato, tali per cui la perdita di commutazione durante la fase di accensione dello switch diviene pressoché trascurabile (Zero-Voltage-Switching e Zero-Derivative-Voltage Turn-ON). Il prezzo da pagare per ottenere queste benefiche forme d’onda è quello di avere un valore di cresta della tensione sul dispositivo che commuta assai più elevato del valore medio, coincidente con la tensione di alimentazione DC. In generale si stima una tensione di picco fra le 3 e le 5 volte più elevata della tensione DC, in funzione del Duty-Cycle e dell’assorbimento di corrente sul carico. Occorre poi tenere presente che in condizioni dinamiche (ad esempio qualora si collegasse direttamente l’amplificatore all’alimentazione) potrebbero innescarsi dei transitori tali per cui la tensione di picco ecceda anche il range suddetto. Per questo motivo è bene porre un limite alla massima tensione di picco adottando dei circuiti di protezione del transistore al fine di evitare la sua distruzione per limiti legati alla tensione di breakdown. Questi circuiti sono denominati clamper: in questa tesi valuteremo le modalità con cui si può implementare tale protezione; valuteremo, inoltre, i vantaggi e gli svantaggi derivanti dall’impiego di tali circuiti. Questi clamper sono prevalentemente di tipo dissipativo (Zener); nel corso della tesi si è studiato la realizzazione di un clamper rigenerativo che utilizza un trasformatore, ma si è constatata la irrealizzabilità fisica a causa della inevitabile presenza della induttanza dispersa.

Progetto di un convertitore full-bridge phase-shifted isolato a commutazione risonante

L'evoluzione della tecnologia allo stato solido e il fiorire di nuove applicazioni determinano una forte spinta verso la miniaturizzazione dei convertitori elettronici di potenza. Questa riduzione di pesi ed ingombri è particolarmente sentita anche in quei convertitori di media potenza che necessitano di un trasformatore d'isolamento. In quest'ambito assume importante rilievo l'utilizzo di una architettura circuitale a ponte intero e di tecniche in grado di spingere la frequenza di commutazione il più in alto possibile. Questa tesi si propone quindi di studiare a fondo il funzionamento dei convertitori DC/DC isolati di tipo Full-Bridge e pilotati con la tecnica di modulazione Phase-Shifted che ben si presta all'impiego di commutazioni risonanti del tipo Zero-Voltage-Switching. L'analisi teorica sarà corroborata da simulazioni condotte su LTspice e sarà orientata all'individuazione di una metodologia di progetto generale per questo tipo di convertitori. Al fine di formalizzare meglio il progetto si è individuata una possibile applicazione nell'alimentazione di un DC-bus per telecomunicazioni (48 Volt DC sostenuti da batterie) a partire da una fonte di energia fotovoltaica quale una stringa di pannelli operanti con tensioni variabili da 120 a 180 Volt DC. Per questo particolare tipo di applicazione in discesa può avere senso l'impiego di un rettificatore del tipo a duplicazione di corrente, che quindi si provvederà a studiare e ad implementare a secondario del trasformatore d'isolamento. Infine particolare cura sarà dedicata alla parte di controllo che si ha intenzione di integrare all'interno di LTspice così da riuscire a simulare il comportamento dinamico del convertitore e verificare quanto predetto in via teorica mediante l'impiego della procedura che utilizza il K-Factor per la realizzazione della rete compensatrice.

A novel voltage step-down/up ZCS-PWM Zeta converter

This paper presents an analysis of a novel pulse-width-modulated (PWM) voltage step-down/up Zeta converter, featuring zero-current-switching (ZCS) at the active switches. The applications in de to de and ac to de (rectifier) operation modes are used as examples to illustrate the performance of this new ZCS-PWM Zeta converter. Regarding to the new ZCS-PWM Zeta rectifier proposed, it should be noticed that the average-current mode control is used in order to obtain a structure with high power-factor (HPF) and low total harmonic distortion (THD) at the input current.Two active switches (main and auxiliary transistors), two diodes, two small resonant inductors and one small resonant capacitor compose the novel ZCS-PWM soft-commutation cell, used in these new ZCS-PWM Zeta converters. In this cell, the turn-on of the active switches occurs in zero-current (ZC) and their turn-off in zero-current and zero-voltage (ZCZV). For the diodes, their turn-on process occurs in zero-voltage (ZV) and their reverse-recovery effects over the active switches are negligible. These characteristics make this cell suitable for Insulated-Gate Bipolar Transistors (IGBTs) applications.The main advantages of these new Zeta converters, generated from the new soft-commutation cell proposed, are possibility of obtaining isolation (through their accumulation inductors), and high efficiency, at wide load range. In addition, for the rectifier application, a high power factor and low THD in the input current ran be obtained, in agreement with LEC 1000-3-2 standards.The principle of operation, the theoretical analysis and a design example for the new de to de Zeta converter operating in voltage step-down mode are presented. Experimental results are obtained from a test unit with 500W output power, 110V(dc) output voltage, 220V(dc) input voltage, operating at 50kHz switching frequency. The efficiency measured at rated toad is equal to 97.3%for this new Zeta converter.Finally, the new Zeta rectifier is analyzed, and experimental results from a test unit rated at 500W output power, 110V(dc) output voltage, 220V(rms) input voltage, and operating at 50kHz switching frequency, are presented. The measured efficiency is equal to 96.95%, the power-factor is equal to 0.98, and the input current THD is equal to 19.07%, for this new rectifier operating at rated load.

Uma aplicacao da celula de comutacao ZVS-PWM-GEPAE ao conversor DC-AC

This work presents the design and procedure of a DC-to-AC converter using a ZVS Commutation Cell developed by Barbi and Martins (1991) and applied to the family of DC-to-DC PWM converters. Firstly, we show the cell applied to buck converter. The stages of operation and the main current and voltage equations of the resonant devices are presented. Next, we adapt the converter to the regenerative operation mode. Hence, the full bridge converter at low frequency operation is conected on the DC-to-DC stage (at high frequency) output ends (Seixas, 1993). Commutation of zero voltage for all switches, PWM at constant frequency and neither overvoltage nor additional current stress are observed by digital simulation. The design example and experimental results obtained by prototype rated at 275 V, 1 kW and 40 kHz are also presented.

A Rotor Flux Estimation During Zero and Active Vector Periods Using Current Error Space Vector From a Hysteresis Controller for a Sensorless Vector Control of IM Drive

This paper proposes a sensorless vector control scheme for general-purpose induction motor drives using the current error space phasor-based hysteresis controller. In this paper, a new technique for sensorless operation is developed to estimate rotor voltage and hence rotor flux position using the stator current error during zero-voltage space vectors. It gives a comparable performance with the vector control drive using sensors especially at a very low speed of operation (less than 1 Hz). Since no voltage sensing is made, the dead-time effect and loss of accuracy in voltage sensing at low speed are avoided here, with the inherent advantages of the current error space phasor-based hysteresis controller. However, appropriate device on-state drops are compensated to achieve a steady-state operation up to less than 1 Hz. Moreover, using a parabolic boundary for current error, the switching frequency of the inverter can be maintained constant for the entire operating speed range. Simple sigma L-s estimation is proposed, and the parameter sensitivity of the control scheme to changes in stator resistance, R-s is also investigated in this paper. Extensive experimental results are shown at speeds less than 1 Hz to verify the proposed concept. The same control scheme is further extended from less than 1 Hz to rated 50 Hz six-step operation of the inverter. Here, the magnetic saturation is ignored in the control scheme.

Novel high-power-factor ZCS-PWM preregulators

This paper introduces novel zero-current-switching (ZCS) pulsewidth-modulated (PWM) preregulators based on a new soft-commutation cell, suitable for insulated gate bipolar transistor applications. The active switches in these proposed rectifiers turn on in zero current and turn off in zero current-zero voltage. In addition, the diodes turn on in zero voltage and their reverse-recovery effects over the active switches are negligible. Moreover, based on the proposed cell, an entire family of de-to-de ZCS-PWM converters can be generated, providing conditions to obtain naturally isolated converters, for example, derived buck-boost, Sepic. and Zeta converters. The novel ac-to-dc ZCS-PWM boost and Zeta preregulators are presented in order to verify the operation of this soft-commutation cell, In order to minimize the harmonic contents of the input current, increasing the ac power factor, the average-current-mode control is used, obtaining preregulators with ac power factor near unity and high efficiency at wide load range. The principle of operation, theoretical analysis, design example, and experimental results from test units for the novel preregulators are presented. The new boost preregulator was designed to nominal values of 1.6 kW output power, 220 V(rms) input voltage, 400 V(dc) output voltage, and operating at 20 kHz. The measured efficiency and power factor of the new ZCS-PWM boost preregulator were 96.7% and 0,99, respectively, with an input current total harmonic distortion (THD) equal to 3.42% for an input voltage with THD equal to 1.61%, at rated load, the new ZCS-PWM Zeta preregulator was designed to voltage step-down operation, and the experimental results were obtained from a laboratory prototype rated at 500 W, 220 V(rm), input voltage, 110 V(dc) output voltage, and operating at 50 kHz. The measured efficiency of the new ZCS-PWM Zeta preregulator is approximately 96.9% and the input power factor is 0.98, with an input current THD equal to 19.07% while the input voltage THD is equal to 1.96%, at rated load.

A novel HPF voltage source rectifier for variable speed refrigeration systems

A novel single-phase voltage source rectifier capable to achieve High-Power-Factor (HPF) for variable speed refrigeration system application, is proposed in this paper. The proposed system is composed by a single-phase high-power-factor boost rectifier, with two cells in interleave connection, operating in critical conduction mode, and employing a soft-switching technique, controlled by a Field Programmable Gate Array (FPGA), associated with a conventional three-phase IGBT bridge inverter (VSI - Voltage Source Inverter), controlled by a Digital Signal Processor (DSP). The soft-switching technique for the input stage is based on zero-current-switching (ZCS) cells. The rectifier's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) in the input current, in compliance with the EEC61000-3-2 standards. The digital controller for the output stage has been developed using a conventional voltage-frequency control (scalar V/f control), and a simplified stator oriented Vector control, in order to verify the feasibility and performance of the proposed digital controls for continuous temperature control applied at a refrigerator prototype.

A new multilevel converter configuration for high power and high quality applications

The Queensland University of Technology (QUT) allows the presentation of theses for the Degree of Doctor of Philosophy in the format of published or submitted papers, where such papers have been published, accepted or submitted during the period of candidature. This thesis is composed of ten published /submitted papers and book chapters of which nine have been published and one is under review. This project is financially supported by an Australian Research Council (ARC) Discovery Grant with the aim of investigating multilevel topologies for high quality and high power applications, with specific emphasis on renewable energy systems. The rapid evolution of renewable energy within the last several years has resulted in the design of efficient power converters suitable for medium and high-power applications such as wind turbine and photovoltaic (PV) systems. Today, the industrial trend is moving away from heavy and bulky passive components to power converter systems that use more and more semiconductor elements controlled by powerful processor systems. However, it is hard to connect the traditional converters to the high and medium voltage grids, as a single power switch cannot stand at high voltage. For these reasons, a new family of multilevel inverters has appeared as a solution for working with higher voltage levels. Besides this important feature, multilevel converters have the capability to generate stepped waveforms. Consequently, in comparison with conventional two-level inverters, they present lower switching losses, lower voltage stress across loads, lower electromagnetic interference (EMI) and higher quality output waveforms. These properties enable the connection of renewable energy sources directly to the grid without using expensive, bulky, heavy line transformers. Additionally, they minimize the size of the passive filter and increase the durability of electrical devices. However, multilevel converters have only been utilised in very particular applications, mainly due to the structural limitations, high cost and complexity of the multilevel converter system and control. New developments in the fields of power semiconductor switches and processors will favor the multilevel converters for many other fields of application. The main application for the multilevel converter presented in this work is the front-end power converter in renewable energy systems. Diode-clamped and cascade converters are the most common type of multilevel converters widely used in different renewable energy system applications. However, some drawbacks – such as capacitor voltage imbalance, number of components, and complexity of the control system – still exist, and these are investigated in the framework of this thesis. Various simulations using software simulation tools are undertaken and are used to study different cases. The feasibility of the developments is underlined with a series of experimental results. This thesis is divided into two main sections. The first section focuses on solving the capacitor voltage imbalance for a wide range of applications, and on decreasing the complexity of the control strategy on the inverter side. The idea of using sharing switches at the output structure of the DC-DC front-end converters is proposed to balance the series DC link capacitors. A new family of multioutput DC-DC converters is proposed for renewable energy systems connected to the DC link voltage of diode-clamped converters. The main objective of this type of converter is the sharing of the total output voltage into several series voltage levels using sharing switches. This solves the problems associated with capacitor voltage imbalance in diode-clamped multilevel converters. These converters adjust the variable and unregulated DC voltage generated by renewable energy systems (such as PV) to the desirable series multiple voltage levels at the inverter DC side. A multi-output boost (MOB) converter, with one inductor and series output voltage, is presented. This converter is suitable for renewable energy systems based on diode-clamped converters because it boosts the low output voltage and provides the series capacitor at the output side. A simple control strategy using cross voltage control with internal current loop is presented to obtain the desired voltage levels at the output voltage. The proposed topology and control strategy are validated by simulation and hardware results. Using the idea of voltage sharing switches, the circuit structure of different topologies of multi-output DC-DC converters – or multi-output voltage sharing (MOVS) converters – have been proposed. In order to verify the feasibility of this topology and its application, steady state and dynamic analyses have been carried out. Simulation and experiments using the proposed control strategy have verified the mathematical analysis. The second part of this thesis addresses the second problem of multilevel converters: the need to improve their quality with minimum cost and complexity. This is related to utilising asymmetrical multilevel topologies instead of conventional multilevel converters; this can increase the quality of output waveforms with a minimum number of components. It also allows for a reduction in the cost and complexity of systems while maintaining the same output quality, or for an increase in the quality while maintaining the same cost and complexity. Therefore, the asymmetrical configuration for two common types of multilevel converters – diode-clamped and cascade converters – is investigated. Also, as well as addressing the maximisation of the output voltage resolution, some technical issues – such as adjacent switching vectors – should be taken into account in asymmetrical multilevel configurations to keep the total harmonic distortion (THD) and switching losses to a minimum. Thus, the asymmetrical diode-clamped converter is proposed. An appropriate asymmetrical DC link arrangement is presented for four-level diode-clamped converters by keeping adjacent switching vectors. In this way, five-level inverter performance is achieved for the same level of complexity of the four-level inverter. Dealing with the capacitor voltage imbalance problem in asymmetrical diodeclamped converters has inspired the proposal for two different DC-DC topologies with a suitable control strategy. A Triple-Output Boost (TOB) converter and a Boost 3-Output Voltage Sharing (Boost-3OVS) converter connected to the four-level diode-clamped converter are proposed to arrange the proposed asymmetrical DC link for the high modulation indices and unity power factor. Cascade converters have shown their abilities and strengths in medium and high power applications. Using asymmetrical H-bridge inverters, more voltage levels can be generated in output voltage with the same number of components as the symmetrical converters. The concept of cascading multilevel H-bridge cells is used to propose a fifteen-level cascade inverter using a four-level H-bridge symmetrical diode-clamped converter, cascaded with classical two-level Hbridge inverters. A DC voltage ratio of cells is presented to obtain maximum voltage levels on output voltage, with adjacent switching vectors between all possible voltage levels; this can minimize the switching losses. This structure can save five isolated DC sources and twelve switches in comparison to conventional cascade converters with series two-level H bridge inverters. To increase the quality in presented hybrid topology with minimum number of components, a new cascade inverter is verified by cascading an asymmetrical four-level H-bridge diode-clamped inverter. An inverter with nineteen-level performance was achieved. This synthesizes more voltage levels with lower voltage and current THD, rather than using a symmetrical diode-clamped inverter with the same configuration and equivalent number of power components. Two different predictive current control methods for the switching states selection are proposed to minimise either losses or THD of voltage in hybrid converters. High voltage spikes at switching time in experimental results and investigation of a diode-clamped inverter structure raised another problem associated with high-level high voltage multilevel converters. Power switching components with fast switching, combined with hard switched-converters, produce high di/dt during turn off time. Thus, stray inductance of interconnections becomes an important issue and raises overvoltage and EMI issues correlated to the number of components. Planar busbar is a good candidate to reduce interconnection inductance in high power inverters compared with cables. The effect of different transient current loops on busbar physical structure of the high-voltage highlevel diode-clamped converters is highlighted. Design considerations of proper planar busbar are also presented to optimise the overall design of diode-clamped converters.

Controlling current and voltage type interfaces in power-hardware-in-the-loop simulations

The usual practice to study a large power system is through digital computer simulation. However, the impact of large scale use of small distributed generators on a power network cannot be evaluated strictly by simulation since many of these components cannot be accurately modelled. Moreover, the network complexity makes the task of practical testing on a physical network nearly impossible. This study discusses the paradigm of interfacing a real-time simulation of a power system to real-life hardware devices. This type of splitting a network into two parts and running a real-time simulation with a physical system in parallel is usually termed as power-hardware-in-the-loop (PHIL) simulation. The hardware part is driven by a voltage source converter that amplifies the signals of the simulator. In this paper, the effects of suitable control strategy on the performance of PHIL and the associated stability aspects are analysed in detail. The analyses are validated through several experimental tests using an real-time digital simulator.

Controlo directo de binário de uma máquina assíncrona trifásica

Dissertação para obtenção do grau de Mestre em Engenharia Electrotécnica Ramo de Automação e Electrónica Industrial