Using test infrastructures for (remote) online evaluation of the sensitivity to SEUs of FPGAs

This paper proposes an online mechanism that can evaluate the sensitivity of single event upsets (SEUs) of field programmable gate arrays (FPGAs). The online detection mechanism cyclically reads and compares the values form the external and internal configuration memories, taking into account the mask information. This remote detection method also signals any mismatch as a result of a SEU that affects both used and not-used FPGA parts, which maximizes the monitored area. By utilizing an external, Web-accessible controller that is connected to the test infrastructure, the possibility of running the same operation in a remote manner is enabled. Moreover, the need for a local memory to store the mask values is also eliminated.

A comparative analysis of fault injection methods via enhanced on-chip debug infrastructures

On-chip debug (OCD) features are frequently available in modern microprocessors. Their contribution to shorten the time-to-market justifies the industry investment in this area, where a number of competing or complementary proposals are available or under development, e.g. NEXUS, CJTAG, IJTAG. The controllability and observability features provided by OCD infrastructures provide a valuable toolbox that can be used well beyond the debugging arena, improving the return on investment rate by diluting its cost across a wider spectrum of application areas. This paper discusses the use of OCD features for validating fault tolerant architectures, and in particular the efficiency of various fault injection methods provided by enhanced OCD infrastructures. The reference data for our comparative study was captured on a workbench comprising the 32-bit Freescale MPC-565 microprocessor, an iSYSTEM IC3000 debugger (iTracePro version) and the Winidea 2005 debugging package. All enhanced OCD infrastructures were implemented in VHDL and the results were obtained by simulation within the same fault injection environment. The focus of this paper is on the comparative analysis of the experimental results obtained for various OCD configurations and debugging scenarios.

Real-time fault injection using enhanced on-chip debug infrastructures

The rapid increase in the use of microprocessor-based systems in critical areas, where failures imply risks to human lives, to the environment or to expensive equipment, significantly increased the need for dependable systems, able to detect, tolerate and eventually correct faults. The verification and validation of such systems is frequently performed via fault injection, using various forms and techniques. However, as electronic devices get smaller and more complex, controllability and observability issues, and sometimes real time constraints, make it harder to apply most conventional fault injection techniques. This paper proposes a fault injection environment and a scalable methodology to assist the execution of real-time fault injection campaigns, providing enhanced performance and capabilities. Our proposed solutions are based on the use of common and customized on-chip debug (OCD) mechanisms, present in many modern electronic devices, with the main objective of enabling the insertion of faults in microprocessor memory elements with minimum delay and intrusiveness. Different configurations were implemented starting from basic Components Off-The-Shelf (COTS) microprocessors, equipped with real-time OCD infrastructures, to improved solutions based on modified interfaces, and dedicated OCD circuitry that enhance fault injection capabilities and performance. All methodologies and configurations were evaluated and compared concerning performance gain and silicon overhead.

FPGA-based weblab infrastructures guidelines and a prototype implementation example

Recent trends show an increasing number of weblabs, implemented at universities and schools, supporting practical training in technical courses and providing the ability to remotely conduct experiments. However, their implementation is typically based on individual architectures, unable of being reconfigured with different instruments/modules usually required by every experiment. In this paper, we discuss practical guidelines for implementing reconfigurable weblabs that support both local and remote control interfaces. The underlying infrastructure is based on reconfigurable, low-cost, FPGA-based boards supporting several peripherals that are used for the local interface. The remote interface is powered by a module capable of communicating with an Ethernet based network and that can either correspond to an internal core of the FPGA or an external device. These two approaches are discussed in the paper, followed by a practical implementation example.

Infrastructures urbaines et participation publique : le cas de la modernisation de la rue Notre-Dame

Ce mémoire de maîtrise s’intéresse aux exercices participatifs liés à la planification et à la gouvernance des infrastructures routières en milieu urbain. Une étude de cas a été effectuée concernant la modernisation de la rue Notre-Dame. Celle-ci alimente des controverses socio-politiques depuis plus de 30 ans et une décision publique est attendue. Pour arriver à un compromis satisfaisant, les élus ont convié les acteurs socio-économiques à participer à un débat public. L’analyse de cas a permis de rendre compte de la variété des acteurs en présence et de la diversité des demandes formulées à l’occasion du débat public. Si les demandes formulées peuvent parfois être compatibles, l’étude de cas montre que ces demandes peuvent aussi s’éloigner les unes des autres, cela s’expliquant avant tout par la spécificité et la position des acteurs en présence. Les élus municipaux et provinciaux sont alors placés dans une position complexe, puisqu’ils doivent rendre une décision publique. L’analyse a permis de rendre compte des bénéfices, mais aussi des limites du débat public organisé par rapport à l’enjeu de la modernisation de la rue Notre-Dame. L’étude de cas révèle finalement que certaines limites ont trait à la participation des acteurs aux processus de consultation publique. En fait, trois discours majeur s’affrontent. Chacun d’eux appréhende à partir de valeurs distinctes la question de la régulation sociale et l’élaboration des politiques publiques.

Le Plan Nord du gouvernement du Québec : analyse du design, du positionnement et de la planification stratégique des projets d'infrastructures de transport

Cette recherche a été financée par le Fonds de recherche sur la société et la culture du Québec et le Conseil de recherches en sciences humaines. L’auteur a de plus reçu le support financier du programme de remboursement des frais de scolarité des forces armées canadiennes. Les cartes ont été produites grâce au logiciel ArcGIS (ESRI).