Characteristic analysis for multisampled digital implementation of fixed-switching-frequency closed-loop modulation of voltage-source inverter

In this paper, a fixed-switching-frequency closed-loop modulation of a voltage-source inverter (VSI), upon the digital implementation of the modulation process, is analyzed and characterized. The sampling frequency of the digital processor is considered as an integer multiple of the modulation switching frequency. An expression for the determination of the modulation design parameter is developed for smooth modulation at a fixed switching frequency. The variation of the sampling frequency, switching frequency, and modulation index has been analyzed for the determination of the switching condition under closed loop. It is shown that the switching condition determined based on the continuous-time analysis of the closed-loop modulation will ensure smooth modulation upon the digital implementation of the modulation process. However, the stability properties need to be tested prior to digital implementation as they get deteriorated at smaller sampling frequencies. The closed-loop modulation index needs to be considered maximum while determining the design parameters for smooth modulation. In particular, a detailed analysis has been carried out by varying the control gain in the sliding-mode control of a two-level VSI. The proposed analysis of the closed-loop modulation of the VSI has been verified for the operation of a distribution static compensator. The theoretical results are validated experimentally on both single- and three-phase systems.

Using a current source to improve efficiency of a plasma system

This paper presents the possibility of utilizing a current source topology instead of a voltage source as an efficient, flexible and reliable power supply for plasma applications. A buck-boost converter with a current controller has been used to transfer energy from an inductor to a plasma system. A control strategy has also been designed to satisfy all the desired purposes. The main concept behind this topology is to provide high dv/dt regardless of the switching speed of a power switch and to control the current level to properly transfer adequate energy to various plasma applications.

A high frequency current source converter with adjustable magnitude to drive high power piezoelectric transducers

A general electrical model of a piezoelectric transducer for ultrasound applications consists of a capacitor in parallel with RLC legs. A high power voltage source converter can however generate significant voltage stress across the transducer that creates high leakage currents. One solution is to reduce the voltage stress across the piezoelectric transducer by using an LC filter, however a main drawback is changing the piezoelectric resonant frequency and its characteristics. Thereby it reduces the efficiency of energy conversion through the transducer. This paper proposes that a high frequency current source converter is a suitable topology to drive high power piezoelectric transducers efficiently.

Z-source-inverter-based flexible distributed generation system solution for grid power quality improvement

Distributed generation (DG) systems are usually connected to the grid using power electronic converters. Power delivered from such DG sources depends on factors like energy availability and load demand. The converters used in power conversion do not operate with their full capacity all the time. The unused or remaining capacity of the converters could be used to provide some ancillary functions like harmonic and unbalance mitigation of the power distribution system. As some of these DG sources have wide operating ranges, they need special power converters for grid interfacing. Being a single-stage buck-boost inverter, recently proposed Z-source inverter (ZSI) is a good candidate for future DG systems. This paper presents a controller design for a ZSI-based DG system to improve power quality of distribution systems. The proposed control method is tested with simulation results obtained using Matlab/Simulink/PLECS and subsequently it is experimentally validated using a laboratory prototype.

Dual Z-source inverter with three-level reduced common mode switching

This paper presents the design of a dual Z-source inverter that can be used with either a single dc source or two isolated dc sources. Unlike traditional inverters, the integration of a properly designed Z-source network and semiconductor switches to the proposed dual inverter allows buck-boost power conversion to be performed over a wide modulation range with three-level output waveforms generated. The connection of an additional transformer to the inverter ac output also allows all generic wye- or delta-connected loads with three-wire or four-wire configuration to be supplied by the inverter. Modulation-wise, the dual inverter can be controlled using a carefully designed carrier-based pulse-width modulation (PWM) scheme that always will ensure balanced voltage boosting of the Z-source network, while simultaneously achieving reduced common-mode switching. Because of the omission of dead-time delays in the dual inverter PWM scheme, its switched common-mode voltage can be completely eliminated, unlike in traditional inverters where narrow common-mode spikes are still generated. Under semiconductor failure conditions, the presented PWM schemes can easily be modified to allow the inverter to operate without interruption and for cases where two isolated sources are used, zero common-mode voltage can still be ensured. These theoretical findings together with the inverter practicality have been confirmed both in simulations using PSIM with Matlab/Simulink coupler and experimentally using a laboratory implemented inverter prototype.

Dual Z-source inverter with three-level reduced common-mode switching

This paper presents the design of a dual Z-source inverter that can be used with either a single dc source or two isolated dc sources. Unlike traditional inverters, the integration of a properly designed Z-source network and semiconductor switches to the proposed dual inverter allows buck-boost power conversion to be performed over a wide modulation range, with three-level output waveforms generated. The connection of an additional transformer to the inverter ac output also allows all generic wye-or delta-connected loads with three-wire or four-wire configuration to be supplied by the inverter. Modulationwise, the dual inverter can be controlled using a carefully designed carrier-based pulsewidth-modulation (PWM) scheme that will always ensure balanced voltage boosting of the Z-source network while simultaneously achieving reduced common-mode switching. Because of the omission of dead-time delays in the dual-inverter PWM scheme, its switched common-mode voltage can be completely eliminated, unlike in traditional inverters, where narrow common-mode spikes are still generated. Under semiconductor failure conditions, the presented PWM schemes can easily be modified to allow the inverter to operate without interruption, and for cases where two isolated sources are used, zero common-mode voltage can still be ensured. These theoretical findings, together with the inverter practicality, have been confirmed in simulations both using PSIM with Matlab/Simulink coupler and experimentally using a laboratory-implemented inverter prototype.

Controller design for variable-speed permanent magnet wind turbine generators interfaced with Z-source inverter

Increased awareness of environmental concerns has caused greater interest in developing power sources based on renewable technologies, such as wind. Due to the intermittent nature of the wind speed, output voltage and frequency of the direct driven permanent magnet synchronous generators (PMSG) are normally unsteady. Recently proposed Z-source inverter has been considered as a potential solution for grid interfacing wind power generators, thanks to buck-boost function that the single stage Z-source inverter can offer. Two control methodologies, namely unified controller for isolated operation and a multi-loop controller for grid interfaced operation are investigated in this paper. Theoretical analysis of these two control schemes is presented and experimental results to verify the effectiveness of the control method are also included.

Mismatch negativity in recent-onset and chronic schizophrenia : a current source density analysis

Mismatch negativity (MMN) is a component of the event-related potential elicited by deviant auditory stimuli. It is presumed to index pre-attentive monitoring of changes in the auditory environment. MMN amplitude is smaller in groups of individuals with schizophrenia compared to healthy controls. We compared duration-deviant MMN in 16 recent-onset and 19 chronic schizophrenia patients versus age- and sex-matched controls. Reduced frontal MMN was found in both patient groups, involved reduced hemispheric asymmetry, and was correlated with Global Assessment of Functioning (GAF) and negative symptom ratings. A cortically-constrained LORETA analysis, incorporating anatomical data from each individual's MRI, was performed to generate a current source density model of the MMN response over time. This model suggested MMN generation within a temporal, parietal and frontal network, which was right hemisphere dominant only in controls. An exploratory analysis revealed reduced CSD in patients in superior and middle temporal cortex, inferior and superior parietal cortex, precuneus, anterior cingulate, and superior and middle frontal cortex. A region of interest (ROI) analysis was performed. For the early phase of the MMN, patients had reduced bilateral temporal and parietal response and no lateralisation in frontal ROIs. For late MMN, patients had reduced bilateral parietal response and no lateralisation in temporal ROIs. In patients, correlations revealed a link between GAF and the MMN response in parietal cortex. In controls, the frontal response onset was 17 ms later than the temporal and parietal response. In patients, onset latency of the MMN response was delayed in secondary, but not primary, auditory cortex. However amplitude reductions were observed in both primary and secondary auditory cortex. These latency delays may indicate relatively intact information processing upstream of the primary auditory cortex, but impaired primary auditory cortex or cortico-cortical or thalamo-cortical communication with higher auditory cortices as a core deficit in schizophrenia.

Principle of a Dual Current Source Converter for AC Motor Drives

The principle of operation of a dual current source converter is briefly explained. The combination of two single current source converters (SCSC) to form a ``dual (duplex) current source converter'' (DCSC) is proposed. The DCSC is shown to have the following merits: 1) it retains all the advantages of the SCSC; 2) it reduces the harmonic content of the current waveform considerably; and 3) since the load current is shared equally between two current source converters, ratings of the individual components employed in the circuit are considerably lowered. A DCSC can be an attractive choice for sophisticated large horsepower drives where a good performance of the drive rather than cost is a prime factor. An open-loop control scheme employing the DCSC for an ac motor drive has been successfully implemented in the laboratory. Oscillograms of the improved load current waveforms are shown.

Average Modelling of a Voltage Source Inverter with Dead-Time in a Synchronous Reference Frame

Voltage source inverters are an integral part of renewable power sources and smart grid systems. Computationally efficient and fairly accurate models for the voltage source inverter are required to carry out extensive simulation studies on complex power networks. Accuracy requires that the effect of dead-time be incorporated in the inverter model. The dead-time is essentially a short delay introduced between the gating pulses to the complementary switches in an inverter leg for the safety of power devices. As the modern voltage source inverters switch at fairly high frequencies, the dead-time significantly influences the output fundamental voltage. Dead-time also causes low-frequency harmonic distortion and is hence important from a power quality perspective. This paper studies the dead-time effect in a synchronous dq reference frame, since dynamic studies and controller design are typically carried out in this frame of reference. For the sake of computational efficiency, average models are derived, incorporating the dead-time effect, in both RYB and dq reference frames. The average models are shown to consume less computation time than their corresponding switching models, the accuracies of the models being comparable. The proposed average synchronous reference frame model, including effect of dead-time, is validated through experimental results.

3-D Space Vector PWM implementation for Four-Leg Voltage Source Inverter

The Space Vector PWM implementation and operation for a Four-leg Voltage Source Inverter (VSI) is detailed and discussed in this paper. Although less common, four-leg VSIs are a viable solution for situations where neutral connection is necessary, including Active Power Filter applications. This topology presents advantages regarding the VSI DC link and capacitance, which make it useful for high power devices. Theory, implementation and simulations are also discussed in this paper. © 2011 IEEE.

Improvement of the Dynamic Performance of a Buck Converter using Controlled Current Source as an Additional Energy Path

This work is related to the improvement of the dynamic performance of the Buck converter by means of introducing an additional power path that virtually increase s the output capacitance during transients, thus improving the output impedance of the converter. It is well known that in VRM applications, with wide load steps, voltage overshoots and undershoots ma y lead to undesired performance of the load. To solve this problem, high-bandwidth high-switching frequency power converter s can be applied to reduce the transient time or a big output capacitor can be applied to reduce the output impedance. The first solution can degrade the efficiency by increasing switching losses of the MOSFETS, and the second solution is penalizing the cost and size of the output filter. The additional energy path, as presented here, is introduced with the Output Impedance Correction Circuit (OICC) based on the Controlled Current Source (CCS). The OICC is using CCS to inject or extract a current n - 1 times larger than the output capacitor current, thus virtually increasing n times the value of the output capacitance during the transients. This feature allows the usage of a low frequency Buck converter with smaller capacitor but satisfying the dynamic requirements.