Laminar to turbulent flow transition measurements using an array of SOI-CMOS MEMS wall shear stress sensors

The successful utilization of an array of silicon on insulator complementary metal oxide semiconductor (SOICMOS) micro thermal shear stress sensors for flow measurements at macro-scale is demonstrated. The sensors use CMOS aluminum metallization as the sensing material and are embedded in low thermal conductivity silicon oxide membranes. They have been fabricated using a commercial 1 μm SOI-CMOS process and a post-CMOS DRIE back etch. The sensors with two different sizes were evaluated. The small sensors (18.5 ×18.5 μm2 sensing area on 266 × 266 μm2 oxide membrane) have an ultra low power (100 °C temperature rise at 6mW) and a small time constant of only 5.46 μs which corresponds to a cut-off frequency of 122 kHz. The large sensors (130 × 130 μm2 sensing area on 500 × 500 μm2 membrane) have a time constant of 9.82 μs (cut-off frequency of 67.9 kHz). The sensors' performance has proven to be robust under transonic and supersonic flow conditions. Also, they have successfully identified laminar, separated, transitional and turbulent boundary layers in a low speed flow. © 2008 IEEE.

Thermal characterization of SOI CMOS micro hot-plate gas sensors

This work reports on thermal characterization of SOI (silicon on insulator) CMOS (complementary metal oxide semiconductor) MEMS (micro electro mechanical system) gas sensors using a thermoreflectance (TR) thermography system. The sensors were fabricated in a CMOS foundry and the micro hot-plate structures were created by back-etching the CMOS processed wafers in a MEMS foundry using DRIE (deep reactive ion etch) process. The calibration and experimental details of the thermoreflectance based thermal imaging setup, used for these micro hot-plate gas sensor structures, are presented. Experimentally determined temperature of a micro hot-plate sensor, using TR thermography and built-in silicon resistive temperature sensor, is compared with that estimated using numerical simulations. The results confirm that TR based thermal imaging technique can be used to determine surface temperature of CMOS MEMS devices with a high accuracy. © 2010 EDA Publishing/THERMINIC.

Design of boundary-scan testing in CMOS image sensors for industrial applications: internship repor

Tests on printed circuit boards and integrated circuits are widely used in industry,resulting in reduced design time and cost of a project. The functional and connectivity tests in this type of circuits soon began to be a concern for the manufacturers, leading to research for solutions that would allow a reliable, quick, cheap and universal solution. Initially, using test schemes were based on a set of needles that was connected to inputs and outputs of the integrated circuit board (bed-of-nails), to which signals were applied, in order to verify whether the circuit was according to the specifications and could be assembled in the production line. With the development of projects, circuit miniaturization, improvement of the production processes, improvement of the materials used, as well as the increase in the number of circuits, it was necessary to search for another solution. Thus Boundary-Scan Testing was developed which operates on the border of integrated circuits and allows testing the connectivity of the input and the output ports of a circuit. The Boundary-Scan Testing method was converted into a standard, in 1990, by the IEEE organization, being known as the IEEE 1149.1 Standard. Since then a large number of manufacturers have adopted this standard in their products. This master thesis has, as main objective: the design of Boundary-Scan Testing in an image sensor in CMOS technology, analyzing the standard requirements, the process used in the prototype production, developing the design and layout of Boundary-Scan and analyzing obtained results after production. Chapter 1 presents briefly the evolution of testing procedures used in industry, developments and applications of image sensors and the motivation for the use of architecture Boundary-Scan Testing. Chapter 2 explores the fundamentals of Boundary-Scan Testing and image sensors, starting with the Boundary-Scan architecture defined in the Standard, where functional blocks are analyzed. This understanding is necessary to implement the design on an image sensor. It also explains the architecture of image sensors currently used, focusing on sensors with a large number of inputs and outputs.Chapter 3 describes the design of the Boundary-Scan implemented and starts to analyse the design and functions of the prototype, the used software, the designs and simulations of the functional blocks of the Boundary-Scan implemented. Chapter 4 presents the layout process used based on the design developed on chapter 3, describing the software used for this purpose, the planning of the layout location (floorplan) and its dimensions, the layout of individual blocks, checks in terms of layout rules, the comparison with the final design and finally the simulation. Chapter 5 describes how the functional tests were performed to verify the design compliancy with the specifications of Standard IEEE 1149.1. These tests were focused on the application of signals to input and output ports of the produced prototype. Chapter 6 presents the conclusions that were taken throughout the execution of the work.

A Mitigation Technique for Harmonic Downconversion in Wideband Spectrum Sensors

The down conversion of radio frequency components around the harmonics of the local oscillator (LO), and its impact on the accuracy of white space detection using integrated spectrum sensors, is studied. We propose an algorithm to mitigate the impact of harmonic downconversion by utilizing multiple parallel downconverters in the system architecture. The proposed algorithm is validated on a test-board using commercially available integrated circuits and a test-chip implemented in a 130-nm CMOS technology. The measured data show that the impact of the harmonic downconversion is closely related to the LO characteristics, and that much of it can be mitigated by the proposed technique.

3D thermo-electro-mechanical simulations of gas sensors based on SOI membranes

3D thermo-electro-mechanical device simulations are presented of a novel fully CMOS-compatible MOSFET gas sensor operating in a SOI membrane. A comprehensive stress analysis of a Si-SiO2-based multilayer membrane has been performed to ensure a high degree of mechanical reliability at a high operating temperature (e.g. up to 400°C). Moreover, optimisation of the layout dimensions of the SOI membrane, in particular the aspect ratio between the membrane length and membrane thickness, has been carried out to find the best trade-off between minimal device power consumption and acceptable mechanical stress.

Post-CMOS wafer level growth of carbon nanotubes for low-cost microsensors--a proof of concept.

Here we demonstrate a novel technique to grow carbon nanotubes (CNTs) on addressable localized areas, at wafer level, on a fully processed CMOS substrate. The CNTs were grown using tungsten micro-heaters (local growth technique) at elevated temperature on wafer scale by connecting adjacent micro-heaters through metal tracks in the scribe lane. The electrical and optical characterization show that the CNTs are identical and reproducible. We believe this wafer level integration of CNTs with CMOS circuitry enables the low-cost mass production of CNT sensors, such as chemical sensors.

A high temperature SOI CMOS NO2 sensor

For more than 20 years researchers have been interested in developing micro-gas sensors based on silicon technology. Most of the reported devices are based on micro-hotplates, however they use materials that are not CMOS compatible, and therefore are not suitable for large volume manufacturing. Furthermore, they do not allow the circuitry to be integrated on to the chip. CMOS compatible devices have been previously reported. However, these use polysilicon as the heater material, which has long term stability problems at high temperatures. Here we present low power, low cost SOI CMOS NO2 sensors, based on high stability single crystal silicon P+ micro-heaters platforms, capable of measuring gas concentrations down to 0.1 ppm. We have integrated a thin tungsten molybdenum oxide layer as a sensing material with a foundry-standard SOI CMOS micro-hotplate and tested this to NO2. We believe these devices have the potential for use as robust, very low power consumption, low cost gas sensors. © 2011 American Institute of Physics.

Zinc oxide nanowire based hydrogen sensor on SOI CMOS platform

Here we report on the successful low-temperature growth of zinc oxide nanowires (ZnONWs) on silicon-on-insulator (SOI) CMOS micro-hotplates and their response, at different operating temperatures, to hydrogen in air. The SOI micro-hotplates were fabricated in a commercial CMOS foundry followed by a deep reactive ion etch (DRIE) in a MEMS foundry to form ultra-low power membranes. The micro-hotplates comprise p+ silicon micro-heaters and interdigitated metal electrodes (measuring the change in resistance of the gas sensitive nanomaterial). The ZnONWs were grown as a post-CMOS process onto the hotplates using a CMOS friendly hydrothermal method. The ZnONWs showed a good response to 500 to 5000 ppm of hydrogen in air. We believe that the integration of ZnONWs with a MEMS platform results in a low power, low cost, hydrogen sensor that would be suitable for handheld battery-operated gas sensors. © 2011 Published by Elsevier Ltd.

Thermo-optical characterization of fluorescent rhodamine B based temperature-sensitive nanosensors using a CMOS MEMS micro-hotplate

A custom designed microelectromechanical systems (MEMS) micro-hotplate, capable of operating at high temperatures (up to 700 C), was used to thermo-optically characterize fluorescent temperature-sensitive nanosensors. The nanosensors, 550 nm in diameter, are composed of temperature-sensitive rhodamine B (RhB) fluorophore which was conjugated to an inert silica sol-gel matrix. Temperature-sensitive nanosensors were dispersed and dried across the surface of the MEMS micro-hotplate, which was mounted in the slide holder of a fluorescence confocal microscope. Through electrical control of the MEMS micro-hotplate, temperature induced changes in fluorescence intensity of the nanosensors was measured over a wide temperature range. The fluorescence response of all nanosensors dispersed across the surface of the MEMS device was found to decrease in an exponential manner by 94%, when the temperature was increased from 25 C to 145 C. The fluorescence response of all dispersed nanosensors across the whole surface of the MEMS device and individual nanosensors, using line profile analysis, were not statistically different (p < 0.05). The MEMS device used for this study could prove to be a reliable, low cost, low power and high temperature micro-hotplate for the thermo-optical characterisation of sub-micron sized particles. The temperature-sensitive nanosensors could find potential application in the measurement of temperature in biological and micro-electrical systems. The Authors. © 2013 Published by Elsevier B.V. All rights reserved.

A thermopile based SOI CMOS MEMS wall shear stress sensor

In this paper we present for the first time, a novel silicon on insulator (SOI) complementary metal oxide semiconductor (CMOS) MEMS thermal wall shear stress sensor based on a tungsten hot-film and three thermopiles. These devices have been fabricated using a commercial 1 μm SOI-CMOS process followed by a deep reactive ion etch (DRIE) back-etch step to create silicon oxide membranes under the hot-film for effective thermal isolation. The sensors show an excellent repeatability of electro-thermal characteristics and can be used to measure wall shear stress in both constant current anemometric as well as calorimetric modes. The sensors have been calibrated for wall shear stress measurement of air in the range of 0-0.48 Pa using a suction type, 2-D flow wind tunnel. The calibration results show that the sensors have a higher sensitivity (up to four times) in calorimetric mode compared to anemometric mode for wall shear stress lower than 0.3 Pa. © 2013 IEEE.

A dual mode SOI CMOS MEMS based thermal conductivity and IR absorption gas sensor

Design, FEM modelling and characterization of a novel dual mode thermal conductivity and infrared absorption sensor using SOI CMOS technology is reported. The dual mode sensing capability is based on the temperature sensitivity and wideband infrared radiation emission of the resistive heating element. The sensor was fabricated at a commercial foundry using a 1 μm process and measures only 1×1 mm2. Infrared detectors usually use thermopiles in addition to a separate IR source. A single highly responsive dual mode source and sensing element targeting not only low molecular mass gases but also greenhouse gases, while consuming 40 mW power at 700°C in synthetic air, thus makes this sensor particularly viable for battery powered handheld devices. © 2013 IEEE.

A low-cost CMOS programmable temperature

A novel uncalibrated CMOS programmable temperature switch with high temperature accuracy is presented. Its threshold temperature T-th can be programmed by adjusting the ratios of width and length of the transistors. The operating principles of the temperature switch circuit is theoretically explained. A floating gate neural MOS circuit is designed to compensate automatically the threshold temperature T-th variation that results form the process tolerance. The switch circuit is implemented in a standard 0.35 mu m CMOS process. The temperature switch can be programmed to perform the switch operation at 16 different threshold temperature T(th)s from 45-120 degrees C with a 5 degrees C increment. The measurement shows a good consistency in the threshold temperatures. The chip core area is 0.04 mm(2) and power consumption is 3.1 mu A at 3.3V power supply. The advantages of the temperature switch are low power consumption, the programmable threshold temperature and the controllable hysteresis.