Prognostic and therapeutic relevance of FLIP and procaspase-8 overexpression in non-small cell lung cancer

Non-small cell lung carcinoma remains by far the leading cause of cancer-related deaths worldwide. Overexpression of FLIP, which blocks the extrinsic apoptotic pathway by inhibiting caspase-8 activation, has been identified in various cancers. We investigated FLIP and procaspase-8 expression in NSCLC and the effect of HDAC inhibitors on FLIP expression, activation of caspase-8 and drug resistance in NSCLC and normal lung cell line models. Immunohistochemical analysis of cytoplasmic and nuclear FLIP and procaspase-8 protein expression was carried out using a novel digital pathology approach. Both FLIP and procaspase-8 were found to be significantly overexpressed in tumours, and importantly, high cytoplasmic expression of FLIP significantly correlated with shorter overall survival. Treatment with HDAC inhibitors targeting HDAC1-3 downregulated FLIP expression predominantly via post-transcriptional mechanisms, and this resulted in death receptor- and caspase-8-dependent apoptosis in NSCLC cells, but not normal lung cells. In addition, HDAC inhibitors synergized with TRAIL and cisplatin in NSCLC cells in a FLIP- and caspase-8-dependent manner. Thus, FLIP and procaspase-8 are overexpressed in NSCLC, and high cytoplasmic FLIP expression is indicative of poor prognosis. Targeting high FLIP expression using HDAC1-3 selective inhibitors such as entinostat to exploit high procaspase-8 expression in NSCLC has promising therapeutic potential, particularly when used in combination with TRAIL receptor-targeted agents.

7Li Spin-flip satellites in the EPR sectra of NH3+ -doped LiKSO4

EPR spectra of lithium potassium sulfate doped with NH3+ have been recorded at 9.05 GHz. A pair of satellites can be seen symmetrically situated on either side of the main lines. The separation of the satellite lines from the main line corresponds to the 7Li NMR frequency. The distance of the interacting 7Li nucleus from the unpaired electron in NH3+ is estimated to be 3.29 Å.

On the importance of backbone loop and peptide flip in the Walker sequence in F-1-ATPase action

The Walker sequence, GXXXXGKT, present in all the six subunits of F-1-ATPase exists in a folded form, known as phosphate-binding loop (P-loop). Analysis of the Ramachandran angles showed only small RMS deviation between the nucleotide-bound and nucleotide-free forms. This indicated a good overlap of the backbone loops. The catalytic beta-subunits (chains D, E and F) showed significant changes in the Ramachandran angles and the side chain torsion angles, but not the structural alpha-subunits (chains A, B and C). Most striking among these are the changes associated with Val160 and Gly161 corresponding to a flip in the peptide unit between them when a nucleotide is bound (chains D or F compared to nucleotide-free chain E). The conformational analysis further revealed a hitherto unnoticed hydrogen bond between amide-N of the flipped Gly161 and terminal phosphate-O of the nucleotide. This assigns a role for this conserved amino acid, otherwise ignored, of making an unusual direct interaction between the peptide backbone of the enzyme protein and the incoming nucleotide substrate. Significance of this interaction is enhanced, as it is limited only to the catalytic subunits, and also likely to involve a mechanical rotation of bonds of the peptide unit. Hopefully this is part of the overall events that link the chemical hydrolysis of ATP with the mechanical rotation of this molecule, now famous as tiny molecular motor.

Experimental measurement of microwave-induced electron spin-flip time

The electron spin resonance (ESR) is optically detected by monitoring the microwave-induced changes in the circular polarization of the neutral exciton (X) and the negatively charged exciton (X-) emission in CdTe quantum wells with low density of excess electrons. We find that the circular polarization of the X and X- emission is a mapping of the spin polarization of excess electrons. By analyzing the ESR-induced decrease in the circular polarization degree of the X emission, we deduce the microwave-induced electron spin-flip time >0.1 mus, which is much longer than the recombination time of X and X-. This demonstrates that the optically detected ESR in type I quantum wells with low density of excess electrons does not obey the prerequisite for the conventional optically detected magnetic resonance. (C) 2001 American Institute of Physics.

A simulation-based design method to transfer surface mount RF system to flip-chip die implementation

The flip-chip technology is a high chip density solution to meet the demand for very large scale integration design. For wireless sensor node or some similar RF applications, due to the growing requirements for the wearable and implantable implementations, flip-chip appears to be a leading technology to realize the integration and miniaturization. In this paper, flip-chip is considered as part of the whole system to affect the RF performance. A simulation based design is presented to transfer the surface mount PCB board to the flip-chip die package for the RF applications. Models are built by Q3D Extractor to extract the equivalent circuit based on the parasitic parameters of the interconnections, for both bare die and wire-bonding technologies. All the parameters and the PCB layout and stack-up are then modeled in the essential parts' design of the flip-chip RF circuit. By implementing simulation and optimization, a flip-chip package is re-designed by the parameters given by simulation sweep. Experimental results fit the simulation well for the comparison between pre-optimization and post-optimization of the bare die package's return loss performance. This design method could generally be used to transfer any surface mount PCB to flip-chip package for the RF systems or to predict the RF specifications of a RF system using the flip-chip technology.

Material properties, geometry and their effect on the fatigue life of two flip-chip models

This paper describes how modeling technology has been used in providing fatigue life time data of two flip-chip models. Full-scale three-dimensional modeling of flip-chips under cyclic thermal loading has been combined with solder joint stand-off height prediction to analyze the stress and strain conditions in the two models. The Coffin-Manson empirical relationship is employed to predict the fatigue life times of the solder interconnects. In order to help designers in selecting the underfill material and the printed circuit board, the Young's modulus and the coefficient of thermal expansion of the underfill, as well as the thickness of the printed circuit boards are treated as variable parameters. Fatigue life times are therefore calculated over a range of these material and geometry parameters. In this paper we will also describe how the use of micro-via technology may affect fatigue life

Reliability analysis of flip chip designs via computer simulation

A flip chip component is a silicon chip mounted to a substrate with the active area facing the substrate. This paper presents the results of an investigation into the relationship between a number of important material properties and geometric parameters on the thermal-mechanical fatigue reliability of a standard flip chip design and a flip chip design with the use of microvias. Computer modeling has been used to analyze the mechanical conditions of flip chips under cyclic thermal loading where the Coffin-Manson empirical relationship has been used to predict the life time of the solder interconnects. The material properties and geometry parameters that have been investigated are the Young's modulus, the coefficient of thermal expansion (CTE) of the underfill, the out-of-plane CTE (CTEz) of the substrate, the thickness of the substrate, and the standoff height. When these parameters vary, the predicted life-times are calculated and some of the features of the results are explained. By comparing the predicted lifetimes of the two designs and the strain conditions under thermal loading, the local CTE mismatch has been found to be one of most important factors in defining the reliability of flip chips with microvias.

Modelling technology to predict flip-chip assembly

This paper describes modelling technology and its use in providing data governing the assembly of flip-chip components. Details are given on the reflow and curing stages as well as the prediction of solder joint shapes. The reflow process involves the attachment of a die to a board via solder joints. After a reflow process, underfill material is placed between the die and the substrate where it is heated and cured. Upon cooling the thermal mismatch between the die, underfill, solder bumps, and substrate will result in a nonuniform deformation profile across the assembly and hence stress. Shape predictions then thermal solidification and stress prediction are undertaken on solder joints during the reflow process. Both thermal and stress calculations are undertaken to predict phenomena occurring during the curing of the underfill material. These stresses may result in delamination between the underfill and its surrounding materials leading to a subsequent reduction in component performance and lifetime. Comparisons between simulations and experiments for die curvature will be given for the reflow and curing process

The effect of reflow process on the contact resistance and reliability of anisotropic conductive film interconnection for flip chip on flex applications

The work presented in this paper focuses on the effect of reflow process on the contact resistance and reliability of anisotropic conductive film (ACF) interconnection. The contact resistance of ACF interconnection increases after reflow process due to the decrease in contact area of the conducting particles between the mating I/O pads. However, the relationship between the contact resistance and bonding parameters of the ACF interconnection with reflow treatment follows the similar trend to that of the as-bonded (i.e. without reflow) ACF interconnection. The contact resistance increases as the peak temperature of reflow profile increases. Nearly 40% of the joints were found to be open after reflow with 260 °C peak temperature. During the reflow process, the entrapped (between the chip and substrate) adhesive matrix tries to expand much more than the tiny conductive particles because of the higher coefficient of thermal expansion, the induced thermal stress will try to lift the bump from the pad and decrease the contact area of the conductive path and eventually, leading to a complete loss of electrical contact. In addition, the environmental effect on contact resistance such as high temperature/humidity aging test was also investigated. Compared with the ACF interconnections with Ni/Au bump, higher thermal stress in the Z-direction is accumulated in the ACF interconnections with Au bump during the reflow process owing to the higher bump height, thus greater loss of contact area between the particles and I/O pads leads to an increase of contact resistance and poorer reliability after reflow.

Optimisation modelling for flip-chip solder joint reliability

This paper details and demonstrates integrated optimisation-reliability modelling for predicting the performance of solder joints in electronic packaging. This integrated modelling approach is used to identify efficiently and quickly the most suitable design parameters for solder joint performance during thermal cycling and is demonstrated on flip-chip components using “no-flow” underfills. To implement “optimisation in reliability” approach, the finite element simulation tool – PHYSICA, is coupled with optimisation and statistical tools. This resulting framework is capable of performing design optimisation procedures in an entirely automated and systematic manner.

No-flow underfill flip chip assembly–an experimental and modeling analysis

In the flip-chip assembly process, no-flow underfill materials have a particular advantage over traditional underfill: the application and curing of the former can be undertaken before and during the reflow process. This advantage can be exploited to increase the flip-chip manufacturing throughput. However, adopting a no-flow underfill process may introduce reliability issues such as underfill entrapment, delamination at interfaces between underfill and other materials, and lower solder joint fatigue life. This paper presents an analysis on the assembly and the reliability of flip-chips with no-flow underfill. The methodology adopted in the work is a combination of experimental and computer-modeling methods. Two types of no-flow underfill materials have been used for the flip chips. The samples have been inspected with X-ray and scanning acoustic microscope inspection systems to find voids and other defects. Eleven samples for each type of underfill material have been subjected to thermal shock test and the number of cycles to failure for these flip chips have been found. In the computer modeling part of the work, a comprehensive parametric study has provided details on the relationship between the material properties and reliability, and on how underfill entrapment may affect the thermal–mechanical fatigue life of flip chips with no-flow underfill.

Effects of reflow process on the reliability of flip chip on flex interconnections using anisotropic conductive adhesives

In this paper, the effects of the solder reflow process on the reliability of anisotropic conductive film (ACF) interconnections for flip chip on flex (FCOF) applications are investigated. Experiments as well as computer modeling methods have been used. In the experiments, it was found that the contact resistance of ACF joints increased after the subsequent reflow process, and the magnitude of this increase was strongly correlated to the peak temperature of the reflow profile. Nearly 40% of the joints were opened (i.e. lifted away from the pad) after the reflow process with 260 °C peak temperature while no opening was observed when the peak temperature was 210 °C. It is believed that the CTE mismatch between the polymer particle and the adhesive matrix is the main cause of this contact degradation. It was also found that the ACF joints after the reflow process with 210 °C peak temperature showed a high ability to resist water absorption under steady state 85 °C/85%RH conditions, probably because the curing degree of the ACF was improved during the reflow process. To give a good understanding, a 3D model of an ACF joint structure was built and finite element analysis was used to predict the stress distribution in the conductive particles, adhesive matrix and metal pads during the reflow process.

Ultra-fine pitch flip-chip assembly using isotropic conductive adhesives

This paper discusses results from a highly interdisciplinary research project which investigated different packaging options for ultra-fine pitch, low temperature and low cost flip-chip assembly. Isotropic Conductive Adhesives (ICAs) are stencil printed to form the interconnects for the package. ICAs are utilized to ensure a low temperature assembly process of flip-chip copper column bumped packages. Results are presented on the structural integrity of novel electroformed stencils. ICA deposits at sub-100 micron pitch and the subsequent thermo-mechanical behaviour of the flip-chip ICA joints are analysed using numerical modelling techniques. Optimal design rules for enhanced performance and thermomechanical reliability of ICA assembled flip-chip packages are formulated.

Predicting optimal process conditions for flip-chip aassembly using copper column bumped dies

Recently, research has been carried out to test a novel bumping method which omits the under bump metallurgy (UBM) forming process by bonding copper columns directly onto the Al pads of the silicon dies. This bumping method could be adopted to simplify the flip chip assembly process, increase the productivity and achieve a higher I/O count. Computer modelling methods are used to predict the shape of solder joints and response of the flip chip to thermal cyclic loading. The accumulated plastic strain energy at the comer solder joints is used as the damage indicator. Models with a range of design parameters have been compared for their reliability. The ranking of the relative importance of these parameters is given. Results from these analyses are being used by our industrial and academic partners to identify optimal design conditions.