Five-level Z-source diode-clamped inverter

This study proposes a five-level Z-source diode-clamped inverter designed with two intermediate Z-source networks connected between the dc input sources and rear-end inverter circuitry. By partially shorting the Z-source networks, new operating states not previously reported for two-level Z-source inverter are introduced here for operating the proposed inverter with voltage buck-boost energy conversion ability and five-level phase voltage switching. These characteristic features are in fact always ensured at the inverter terminal output by simply adopting a properly designed carrier modulation scheme, which always inserts two partial shoot-through states per half carrier cycle for smooth balanced operation. Theoretical findings and practical issues identified are eventually verified by constructing a scaled down laboratory prototype for testing.

Z-source-inverter-based flexible distributed generation system solution for grid power quality improvement

Distributed generation (DG) systems are usually connected to the grid using power electronic converters. Power delivered from such DG sources depends on factors like energy availability and load demand. The converters used in power conversion do not operate with their full capacity all the time. The unused or remaining capacity of the converters could be used to provide some ancillary functions like harmonic and unbalance mitigation of the power distribution system. As some of these DG sources have wide operating ranges, they need special power converters for grid interfacing. Being a single-stage buck-boost inverter, recently proposed Z-source inverter (ZSI) is a good candidate for future DG systems. This paper presents a controller design for a ZSI-based DG system to improve power quality of distribution systems. The proposed control method is tested with simulation results obtained using Matlab/Simulink/PLECS and subsequently it is experimentally validated using a laboratory prototype.

Evaluation of resonant damping techniques for Z-source current-type inverter

For the renewable energy sources whose outputs vary continuously, a Z-source current-type inverter has been proposed as a possible buck-boost alternative for grid-interfacing. With a unique X-shaped LC network connected between its dc power source and inverter topology, Z-source current-type inverter is however expected to suffer from compounded resonant complications in addition to those associated with its second-order output filter. To improve its damping performance, this paper proposes the careful integration of Posicast or three-step compensators before the inverter pulse-width modulator for damping triggered resonant oscillations. In total, two compensators are needed for wave-shaping the inverter boost factor and modulation ratio, and they can conveniently be implemented using first-in first-out stacks and embedded timers of modern digital signal processors widely used in motion control applications. Both techniques are found to damp resonance of ac filter well, but for cases of transiting from current-buck to boost state, three-step technique is less effective due to the sudden intermediate discharging interval introduced by its non-monotonic stepping (unlike the monotonic stepping of Posicast damping). These findings have been confirmed both in simulations and experiments using an implemented laboratory prototype.

Dual Z-source inverter with three-level reduced common mode switching

This paper presents the design of a dual Z-source inverter that can be used with either a single dc source or two isolated dc sources. Unlike traditional inverters, the integration of a properly designed Z-source network and semiconductor switches to the proposed dual inverter allows buck-boost power conversion to be performed over a wide modulation range with three-level output waveforms generated. The connection of an additional transformer to the inverter ac output also allows all generic wye- or delta-connected loads with three-wire or four-wire configuration to be supplied by the inverter. Modulation-wise, the dual inverter can be controlled using a carefully designed carrier-based pulse-width modulation (PWM) scheme that always will ensure balanced voltage boosting of the Z-source network, while simultaneously achieving reduced common-mode switching. Because of the omission of dead-time delays in the dual inverter PWM scheme, its switched common-mode voltage can be completely eliminated, unlike in traditional inverters where narrow common-mode spikes are still generated. Under semiconductor failure conditions, the presented PWM schemes can easily be modified to allow the inverter to operate without interruption and for cases where two isolated sources are used, zero common-mode voltage can still be ensured. These theoretical findings together with the inverter practicality have been confirmed both in simulations using PSIM with Matlab/Simulink coupler and experimentally using a laboratory implemented inverter prototype.

Dual Z-source inverter with three-level reduced common-mode switching

This paper presents the design of a dual Z-source inverter that can be used with either a single dc source or two isolated dc sources. Unlike traditional inverters, the integration of a properly designed Z-source network and semiconductor switches to the proposed dual inverter allows buck-boost power conversion to be performed over a wide modulation range, with three-level output waveforms generated. The connection of an additional transformer to the inverter ac output also allows all generic wye-or delta-connected loads with three-wire or four-wire configuration to be supplied by the inverter. Modulationwise, the dual inverter can be controlled using a carefully designed carrier-based pulsewidth-modulation (PWM) scheme that will always ensure balanced voltage boosting of the Z-source network while simultaneously achieving reduced common-mode switching. Because of the omission of dead-time delays in the dual-inverter PWM scheme, its switched common-mode voltage can be completely eliminated, unlike in traditional inverters, where narrow common-mode spikes are still generated. Under semiconductor failure conditions, the presented PWM schemes can easily be modified to allow the inverter to operate without interruption, and for cases where two isolated sources are used, zero common-mode voltage can still be ensured. These theoretical findings, together with the inverter practicality, have been confirmed in simulations both using PSIM with Matlab/Simulink coupler and experimentally using a laboratory-implemented inverter prototype.

Controller design for variable-speed permanent magnet wind turbine generators interfaced with Z-source inverter

Increased awareness of environmental concerns has caused greater interest in developing power sources based on renewable technologies, such as wind. Due to the intermittent nature of the wind speed, output voltage and frequency of the direct driven permanent magnet synchronous generators (PMSG) are normally unsteady. Recently proposed Z-source inverter has been considered as a potential solution for grid interfacing wind power generators, thanks to buck-boost function that the single stage Z-source inverter can offer. Two control methodologies, namely unified controller for isolated operation and a multi-loop controller for grid interfaced operation are investigated in this paper. Theoretical analysis of these two control schemes is presented and experimental results to verify the effectiveness of the control method are also included.

Ultracapacitor Based Ride Through System for Control Power Supplies in High Power Converters

High power converters are used in variable speed induction motor drive applications. Riding through a short term power supply glitch is becoming an important requirement in these power converters. The power converter uses a large number of control circuit boards for its operation. The control power supply need to ensure that any glitch in the grid side does not affect any of these control circuit boards. A power supply failure of these control cards results in shut down of the entire system. The paper discusses the ride through system developed to overcome voltage sags and short duration outages at the power supply terminals of the control cards in these converters. A 240VA non-isolated, bi-directional buck-boost converter has been designed to be used along with a stack of ultracapacitors to achieve the same. A micro-controller based digital control platform made use of to achieve the control objective. The design of the ultracapacitor stack and the bidirectional converter is described the performance of the experimental set-up is evaluated.

Computationally efficient models for simulation of non-ideal DC-DC converters operating in continuous and discontinuous conduction modes

This paper discusses dynamic modeling of non-isolated DC-DC converters (buck, boost and buck-boost) under continuous and discontinuous modes of operation. Three types of models are presented for each converter, namely, switching model, average model and harmonic model. These models include significant non-idealities of the converters. The switching model gives the instantaneous currents and voltages of the converter. The average model provides the ripple-free currents and voltages, averaged over a switching cycle. The harmonic model gives the peak to peak values of ripple in currents and voltages. The validity of all these models is established by comparing the simulation results with the experimental results from laboratory prototypes, at different steady state and transient conditions. Simulation based on a combination of average and harmonic models is shown to provide all relevant information as obtained from the switching model, while consuming less computation time than the latter.

Energy recovery from high-frequency clocks using DC-DC converters

Large digital chips use a significant amount of energy to distribute a multi-GHz clock. By discharging the clock network to ground every cycle, the energy stored in this large capacitor is wasted. Instead, the energy can be recovered using an on-chip DC-DC converter. This paper investigates the integration of two DC-DC converter topologies, boost and buck-boost, with a high-speed clock driver. The high operating frequency significantly shrinks the required size of the L and C components so they can be placed on-chip; typical converters place them off-chip. The clock driver and DC-DC converter are able to share the entire tapered buffer chain, including the widest drive transistors in the final stage. To achieve voltage regulation, the clock duty cycle must be modulated; implying only single-edge-triggered flops should be used. However, this minor drawback is eclipsed by the benefits: by recovering energy from the clock, the output power can actually exceed the additional power needed to operate the converter circuitry, resulting in an effective efficiency greater than 100%. Furthermore, the converter output can be used to operate additional power-saving features like low-voltage islands or body bias voltages. ©2008 IEEE.

Electronic load interface for improving PV dual-converter system operational margin

An electronic load interface (ELI) for improving the operational margin of a photovoltaic (PV) dual-converter system under dynamic conditions is presented. The ELI - based on a modified buck-boost converter - interfaces the output of the converters and the load system. It improves the operational margin of the PV dual-converter system by extending the conditions under which the dual-converter system operates at the maximum power point. The ELI is activated as and when needed, so as minimise system losses. By employing the ELI, utilisation and efficiency of a PV dual-converter system increases. In general, the concept of the ELI can be applied to multi-converter PV systems - such as multi-converter inverters, and multi-converter DC-DC converter systems - for performance and efficiency improvement. © 2013 The Institution of Engineering and Technology.

New SR drive with integrated charging capacity for plug-in hybrid electric vehicles (PHEVs)

Plug-in hybrid electric vehicles (PHEVs) provide much promise in reducing greenhouse gas emissions and, thus, are a focal point of research and development. Existing on-board charging capacity is effective but requires the use of several power conversion devices and power converters, which reduce reliability and cost efficiency. This paper presents a novel three-phase switched reluctance (SR) motor drive with integrated charging functions (including internal combustion engine and grid charging). The electrical energy flow within the drivetrain is controlled by a power electronic converter with less power switching devices and magnetic devices. It allows the desired energy conversion between the engine generator, the battery, and the SR motor under different operation modes. Battery-charging techniques are developed to operate under both motor-driving mode and standstill-charging mode. During the magnetization mode, the machine's phase windings are energized by the dc-link voltage. The power converter and the machine phase windings are controlled with a three-phase relay to enable the use of the ac-dc rectifier. The power converter can work as a buck-boost-type or a buck-type dc-dc converter for charging the battery. Simulation results in MATLAB/Simulink and experiments on a 3-kW SR motor validate the effectiveness of the proposed technologies, which may have significant economic implications and improve the PHEVs' market acceptance

Novel high-power-factor ZCS-PWM preregulators

This paper introduces novel zero-current-switching (ZCS) pulsewidth-modulated (PWM) preregulators based on a new soft-commutation cell, suitable for insulated gate bipolar transistor applications. The active switches in these proposed rectifiers turn on in zero current and turn off in zero current-zero voltage. In addition, the diodes turn on in zero voltage and their reverse-recovery effects over the active switches are negligible. Moreover, based on the proposed cell, an entire family of de-to-de ZCS-PWM converters can be generated, providing conditions to obtain naturally isolated converters, for example, derived buck-boost, Sepic. and Zeta converters. The novel ac-to-dc ZCS-PWM boost and Zeta preregulators are presented in order to verify the operation of this soft-commutation cell, In order to minimize the harmonic contents of the input current, increasing the ac power factor, the average-current-mode control is used, obtaining preregulators with ac power factor near unity and high efficiency at wide load range. The principle of operation, theoretical analysis, design example, and experimental results from test units for the novel preregulators are presented. The new boost preregulator was designed to nominal values of 1.6 kW output power, 220 V(rms) input voltage, 400 V(dc) output voltage, and operating at 20 kHz. The measured efficiency and power factor of the new ZCS-PWM boost preregulator were 96.7% and 0,99, respectively, with an input current total harmonic distortion (THD) equal to 3.42% for an input voltage with THD equal to 1.61%, at rated load, the new ZCS-PWM Zeta preregulator was designed to voltage step-down operation, and the experimental results were obtained from a laboratory prototype rated at 500 W, 220 V(rm), input voltage, 110 V(dc) output voltage, and operating at 50 kHz. The measured efficiency of the new ZCS-PWM Zeta preregulator is approximately 96.9% and the input power factor is 0.98, with an input current THD equal to 19.07% while the input voltage THD is equal to 1.96%, at rated load.

Development of a DC-DC converter for DC bus voltage control of series connected device

The purpose of this work is to study voltage control and energy balance of a split DC bus topology within a power electronics equipment connected to the AC mains, such as UPS systems, wind power generators, active filters and FACTS devices. A typical configuration in such equipment has two mains connected converters sharing a common DC bus, one series connected and the other parallel connected. The DC bus is usually composed by a battery or a capacitor bank. In the proposed topology, the DC bus is divided in two sides, interconnected with a buck-boost converter, which controls power flow and DC voltage on both sides. © 2009 IEEE.

Interactive DC-DC converters tools for instant design and education

This paper deals with the usage of interactive simulations tools to serve as an oriented design tool for the lectures and laboratory experiments in the power electronics courses. A dynamic and interactive visualization of simulations for idealized converters in steady state are provided by the proposed educational tools, allowing students to acquire qualification in non-isolated DC-DC converters, without previous circuitry knowledge, either without the usage of sophisticated simulation packages. The interaction with proposed simulation tools can be accomplished by student using direct or graphic mode. In direct mode the parameters related with the design of converter can be inserted simply editing default values presented in textboxes, while in the graphic mode students interact indirectly with design information by manipulating visual widgets. In order to corroborate the proposed interactive simulation tools, comparisons of results from buck-boost and boost converters on proposed tools and a well-known simulator package with those on experimental evaluation from laboratory classes were presented. © 2009 IEEE.

Integrated single-stage converters with Tri-state modulation suitable for photovoltaic systems

The aim of this work is to present two topological simplified converters named Tri-state Boost and Tri-state Buck-Boost integrated single-phase inverters. An important operation capability can be achieved for these converters using a Tri-state Modulation control scheme. This is the inductive power decoupling and the independent input output control. These features are directly related with the photovoltaic micro-converter needs, improving efficiency, cost and mainly lifetime. These features for the proposed modulation are confirmed through experimental results. © 2011 IEEE.