Conversor buck utilizando célula de comutação de três estados

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Sensorless explicit model predictive control for multi-phase buck converters with variable output voltage

The purpose of this paper is to use the predictive control to take advantage of the future information in order to improve the reference tracking. The control attempts to increase the bandwidth of the conventional regulators by using the future information of the reference, which is supposed to be known in advance. A method for designing a controller is also proposed. A comparison in simulation with a conventional regulator is made controlling a four-phase Buck converter. Advantages and disadvantages are analyzed based on simulation results.

A methodology to analyze, design and implement very fast and robust controls of Buck-type converters

La electrónica digital moderna presenta un desafío a los diseñadores de sistemas de potencia. El creciente alto rendimiento de microprocesadores, FPGAs y ASICs necesitan sistemas de alimentación que cumplan con requirimientos dinámicos y estáticos muy estrictos. Específicamente, estas alimentaciones son convertidores DC-DC de baja tensión y alta corriente que necesitan ser diseñados para tener un pequeño rizado de tensión y una pequeña desviación de tensión de salida bajo transitorios de carga de una alta pendiente. Además, dependiendo de la aplicación, se necesita cumplir con otros requerimientos tal y como proveer a la carga con ”Escalado dinámico de tensión”, donde el convertidor necesitar cambiar su tensión de salida tan rápidamente posible sin sobreoscilaciones, o ”Posicionado Adaptativo de la Tensión” donde la tensión de salida se reduce ligeramente cuanto más grande sea la potencia de salida. Por supuesto, desde el punto de vista de la industria, las figuras de mérito de estos convertidores son el coste, la eficiencia y el tamaño/peso. Idealmente, la industria necesita un convertidor que es más barato, más eficiente, más pequeño y que aún así cumpla con los requerimienos dinámicos de la aplicación. En este contexto, varios enfoques para mejorar la figuras de mérito de estos convertidores se han seguido por la industria y la academia tales como mejorar la topología del convertidor, mejorar la tecnología de semiconducores y mejorar el control. En efecto, el control es una parte fundamental en estas aplicaciones ya que un control muy rápido hace que sea más fácil que una determinada topología cumpla con los estrictos requerimientos dinámicos y, consecuentemente, le da al diseñador un margen de libertar más amplio para mejorar el coste, la eficiencia y/o el tamaño del sistema de potencia. En esta tesis, se investiga cómo diseñar e implementar controles muy rápidos para el convertidor tipo Buck. En esta tesis se demuestra que medir la tensión de salida es todo lo que se necesita para lograr una respuesta casi óptima y se propone una guía de diseño unificada para controles que sólo miden la tensión de salida Luego, para asegurar robustez en controles muy rápidos, se proponen un modelado y un análisis de estabilidad muy precisos de convertidores DC-DC que tienen en cuenta circuitería para sensado y elementos parásitos críticos. También, usando este modelado, se propone una algoritmo de optimización que tiene en cuenta las tolerancias de los componentes y sensados distorsionados. Us ando este algoritmo, se comparan controles muy rápidos del estado del arte y su capacidad para lograr una rápida respuesta dinámica se posiciona según el condensador de salida utilizado. Además, se propone una técnica para mejorar la respuesta dinámica de los controladores. Todas las propuestas se han corroborado por extensas simulaciones y prototipos experimentales. Con todo, esta tesis sirve como una metodología para ingenieros para diseñar e implementar controles rápidos y robustos de convertidores tipo Buck. ABSTRACT Modern digital electronics present a challenge to designers of power systems. The increasingly high-performance of microprocessors, FPGAs (Field Programmable Gate Array) and ASICs (Application-Specific Integrated Circuit) require power supplies to comply with very demanding static and dynamic requirements. Specifically, these power supplies are low-voltage/high-current DC-DC converters that need to be designed to exhibit low voltage ripple and low voltage deviation under high slew-rate load transients. Additionally, depending on the application, other requirements need to be met such as to provide to the load ”Dynamic Voltage Scaling” (DVS), where the converter needs to change the output voltage as fast as possible without underdamping, or ”Adaptive Voltage Positioning” (AVP) where the output voltage is slightly reduced the greater the output power. Of course, from the point of view of the industry, the figures of merit of these converters are the cost, efficiency and size/weight. Ideally, the industry needs a converter that is cheaper, more efficient, smaller and that can still meet the dynamic requirements of the application. In this context, several approaches to improve the figures of merit of these power supplies are followed in the industry and academia such as improving the topology of the converter, improving the semiconductor technology and improving the control. Indeed, the control is a fundamental part in these applications as a very fast control makes it easier for the topology to comply with the strict dynamic requirements and, consequently, gives the designer a larger margin of freedom to improve the cost, efficiency and/or size of the power supply. In this thesis, how to design and implement very fast controls for the Buck converter is investigated. This thesis proves that sensing the output voltage is all that is needed to achieve an almost time-optimal response and a unified design guideline for controls that only sense the output voltage is proposed. Then, in order to assure robustness in very fast controls, a very accurate modeling and stability analysis of DC-DC converters is proposed that takes into account sensing networks and critical parasitic elements. Also, using this modeling approach, an optimization algorithm that takes into account tolerances of components and distorted measurements is proposed. With the use of the algorithm, very fast analog controls of the state-of-the-art are compared and their capabilities to achieve a fast dynamic response are positioned de pending on the output capacitor. Additionally, a technique to improve the dynamic response of controllers is also proposed. All the proposals are corroborated by extensive simulations and experimental prototypes. Overall, this thesis serves as a methodology for engineers to design and implement fast and robust controls for Buck-type converters.

Cascaded DC-DC converter connection of photovoltaic modules

New residential scale photovoltaic (PV) arrays are commonly connected to the grid by a single DC-AC inverter connected to a series string of PV modules, or many small DC-AC inverters which connect one or two modules directly to the AC grid. This paper shows that a "converter-per-module" approach offers many advantages including individual module maximum power point tracking, which gives great flexibility in module layout, replacement, and insensitivity to shading; better protection of PV sources, and redundancy in the case of source or converter failure; easier and safer installation and maintenance; and better data gathering. Simple nonisolated per-module DC-DC converters can be series connected to create a high voltage string connected to a simplified DC-AC inverter. These advantages are available without the cost or efficiency penalties of individual DC-AC grid connected inverters. Buck, boost, buck-boost and Cuk converters are possible cascadable converters. The boost converter is best if a significant step up is required, such as with a short string of 12 PV modules. A string of buck converters requires many more modules, but can always deliver any combination of module power. The buck converter is the most efficient topology for a given cost. While flexible in voltage ranges, buck-boost and Cuk converters are always at an efficiency or alternatively cost disadvantage.

Robust adaptive backstepping controller design for DC-DC buck converters with external disturbances

In modern power electronic systems, DC-DC converter is one of the main controlled power sources for driving DC systems. But the inherent nonlinear and time-varying characteristics often result in some difficulties mostly related to the control issue. This paper presents a robust nonlinear adaptive controller design with a recursive methodology based on the pulse width modulation (PWM) to drive a DC-DC buck converter. The proposed controller is designed based on the dynamical model of the buck converter where all parameters within the model are assumed as unknown. These unknown parameters are estimated through the adaptation laws and the stability of these laws are ensured by formulating suitable control Lyapunov functions (CLFs) at different stages. The proposed control scheme also provides robustness against external disturbances as these disturbances are considered within the model. One of the main features of the proposed scheme is that it overcomes the over-parameterization problems of unknown parameters which usually appear in some conventional adaptive methods. Finally, the effectiveness of the proposed control scheme is verified through the simulation results and compared to that of an existing adaptive backstepping controller. Simulation results clearly indicate the performance improvement in terms of a faster output voltage tracking response.

Investigation of shaft voltage in wind turbine systems with induction generators

This paper presents the analysis of shaft voltage in different configurations of a doubly fed induction generator (DFIG) and an induction generator (IG) with a back-to-back inverter in wind turbine applications. Detailed high frequency model of the proposed systems have been developed based on existing capacitive couplings in IG & DFIG structures and common mode voltage sources. In this research work, several arrangements of DFIG based wind energy conversion systems (WES) are investigated in case of shaft voltage calculation and its mitigation techniques. Placements of an LC line filter in different locations and its effects on shaft voltage elimination are studied via Mathematical analysis and simulations. A pulse width modulation (PWM) technique and a back-to-back inverter with a bidirectional buck converter have been presented to eliminate the shaft voltage in a DFIG wind turbine.

A class B switch-mode assisted linear amplifier

A switch-mode assisted linear amplifier (SMALA) combining a linear (Class B) and a switch-mode (Class D) amplifier is presented. The usual single hysteretic controlled half-bridge current dumping stage is replaced by two parallel buck converter stages, in a parallel voltage controlled topology. These operate independently: one buck converter sources current to assist the upper Class B output device, and a complementary converter sinks current to assist the lower device. This topology lends itself to a novel control approach of a dead-band at low power levels where neither class D amplifier assists, allowing the class B amplifier to supply the load without interference, ensuring high fidelity. A 20 W implementation demonstrates 85% efficiency, with distortion below 0.08% measured across the full audio bandwidth at 15 W. The class D amplifier begins assisting at 2 W, and below this value, the distortion was below 0.03%. Complete circuitry is given, showing the simplicity of the additional class D amplifier and its corresponding control circuitry.

Energy recycling from multigigahertz clocks using fully integrated switching converters

Large digital chips use a significant amount of energy to broadcast a low-skew, multigigahertz clock to millions of latches located throughout the chip. Every clock cycle, the large aggregate capacitance of the clock network is charged from the supply and then discharged to ground. Instead of wasting this stored energy, it is possible to recycle the energy by controlling its delivery to another part of the chip using an on-chip dc-dc converter. The clock driver and switching converter circuits share many compatible characteristics that allow them to be merged into a single design and fully integrated on-chip. Our buck converter prototype, manufactured in 90-nm CMOS, provides a proof-of-concept that clock network energy can be recycled to other parts of the chip, thus lowering overall energy consumption. It also confirms that monolithic multigigahertz switching converters utilizing zero-voltage switching can be implemented in deep-submicrometer CMOS. With multigigahertz operation, fully integrated inductors and capacitors use a small amount of chip area with low losses. Combining the clock driver with the power converter can share the large MOSFET drivers necessary as well as being energy and space efficient. We present an analysis of the losses which we confirm by experimentally comparing the merged circuit with a conventional clock driver. © 2012 IEEE.

Projecto e implementação de uma fonte de alta tensão para produção de descargas eléctricas

O objetivo deste trabalho consistiu em projetar, construir e testar um protótipo em laboratório de uma fonte de alimentação de alta tensão que permita descargas elétricas {estáveis e de dimensões reduzidas}, de modo a que possa ser utilizada, dada a sua essencialidade, na fabricação de redes de período longo (LPG) em fibra ótica nos chamados turning points. Estes são pontos de elevada sensibilidade, fundamentais no desenvolvimento tecnológico de sensores em fibra ótica, em particular, de sensores refractométricos. O protótipo da fonte de alimentação é composto por um regulador do tipo BUCK, um inversor para alimentação do transformador de alta tensão, o circuito de realimentação e controlo PWM e um microcontrolador para o comando da fonte. Posteriormente procedeu-se à otimização dos parâmetros de descarga, o que conduziu a fabricação de redes de período longo com períodos inferiores a 150 micrómetros. Este é um resultado sem paralelo a nível internacional no que concerne ao uso da técnica do arco elétrico.

Microcontroller-based peak current mode control using digital slope compensation

Microcontroller-based peak current mode control of a buck converter is investigated. The new solution uses a discrete time controller with digital slope compensation. This is implemented using only a single-chip microcontroller to achieve desirable cycle-by-cycle peak current limiting. The digital controller is implemented as a two-pole, two-zero linear difference equation designed using a continuous time model of the buck converter and a discrete time transform. Subharmonic oscillations are removed with digital slope compensation using a discrete staircase ramp. A 16 W hardware implementation directly compares analog and digital control. Frequency response measurements are taken and it is shown that the crossover frequency and expected phase margin of the digital control system match that of its analog counterpart.

Choosing the most suitable analogue redesign method for forward-type digital power converters

This work proposes a method to objectively determine the most suitable analogue redesign method for forward type converters under digital voltage mode control. Particular emphasis is placed on determining the method which allows the highest phase margin at the particular switching and crossover frequencies chosen by the designer. It is shown that at high crossover frequencies with respect to switching frequency, controllers designed using backward integration have the largest phase margin; whereas at low crossover frequencies with respect to switching frequency, controllers designed using bilinear integration have the largest phase margins. An accurate model of the power stage is used for simulation, and experimental results from a Buck converter are collected. The performance of the digital controllers is compared to that of the equivalent analogue controller both in simulation and experiment. Excellent correlation between the simulation and experimental results is presented. This work will allow designers to confidently choose the analogue redesign method which yields the greater phase margin for their application.

Systematic selection of analogue redesign method for forward-type digital power converters

This article proposes a systematic approach to determine the most suitable analogue redesign method to be used for forward-type converters under digital voltage mode control. The focus of the method is to achieve the highest phase margin at the particular switching and crossover frequencies chosen by the designer. It is shown that at high crossover frequencies with respect to switching frequency, controllers designed using backward integration have the largest phase margin; whereas at low crossover frequencies with respect to switching frequency, controllers designed using bilinear integration with pre-warping have the largest phase margins. An algorithm has been developed to determine the frequency of the crossing point where the recommended discretisation method changes. An accurate model of the power stage is used for simulation and experimental results from a Buck converter are collected. The performance of the digital controllers is compared to that of the equivalent analogue controller both in simulation and experiment. Excellent closeness between the simulation and experimental results is presented. This work provides a concrete example to allow academics and engineers to systematically choose a discretisation method.

Bond graph models of DC-DC converters operating in both CCM and DCM

In this paper, Bond Graphs are employed to develop a novel mathematical model of conventional switched-mode DC-DC converters valid for both continuous and discontinuous conduction modes. A unique causality bond graph model of hybrid models is suggested with the operation of the switch and the diode to be represented by a Modulated Transformer with a binary input and a resistor with fixed conductance causality. The operation of the diode is controlled using an if-then function within the model. The extracted hybrid model is implemented on a Boost and Buck converter with their operations to change from CCM to DCM and to return to CCM. The vector fields of the models show validity in a wide operation area and comparison with the simulation of the converters using PSPICE reveals high accuracy of the proposed model, with the Normalised Root Means Square Error and the Maximum Absolute Error remaining adequately low. The model is also experimentally tested on a Buck topology.

Ensino e orientação para projeto de conversores CC-CC através de aplicativos em java

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Uma aplicacao da celula de comutacao ZVS-PWM-GEPAE ao conversor DC-AC

This work presents the design and procedure of a DC-to-AC converter using a ZVS Commutation Cell developed by Barbi and Martins (1991) and applied to the family of DC-to-DC PWM converters. Firstly, we show the cell applied to buck converter. The stages of operation and the main current and voltage equations of the resonant devices are presented. Next, we adapt the converter to the regenerative operation mode. Hence, the full bridge converter at low frequency operation is conected on the DC-to-DC stage (at high frequency) output ends (Seixas, 1993). Commutation of zero voltage for all switches, PWM at constant frequency and neither overvoltage nor additional current stress are observed by digital simulation. The design example and experimental results obtained by prototype rated at 275 V, 1 kW and 40 kHz are also presented.