953 resultados para 64-474_Site


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We measured fragmentation cross sections produced using the primary beam of Kr-86 at 64 MeV/nucleon on Be-9 and Ta-181 targets. The cross sections were obtained by integrating the momentum distributions of isotopes with 25 <= Z <= 36 measured using the RIPS fragment separator at RIKEN. The cross-section ratios obtained with the Ta-181 and Be-9 targets depend on the fragment masses, contrary to the simple geometrical models. We compared the extracted cross sections to EPAX; an empirical parametrization of fragmentation cross sections. Predictions from current EPAX parametrization severely overestimate the production cross sections of very neutron-rich isotopes. Attempts to obtain another set of EPAX parameters specific to the reaction studied here to extrapolate the neutron-rich nuclei more accurately have not been very successful, suggesting that accurate predictions of production cross sections of nuclei far from the valley of stability require information of nuclear properties that are not present in EPAX.

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针对高流强粒子束与绝缘毛细管相互作用的特点,设计制作了一套64通道一维位置灵敏电流分布探测器及其配套的数据获取系统,该探测器可分辨最小直径为1mm的束斑,通过数据获取系统可实现可视化自动数据采集。用2nA和200—2000eV电子对探测器进行了定标,并用10μA和2000eV的电子束穿越锥形毛细管后的出射电子,对探测器及数据获取系统进行测试,获得了出射粒子的位置分布谱及能量信息。

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本论文通过讨论选择了简单易行的弹性散射法来测量兰州重离子加速器流能量、能散,描述了整个实验的准备、进行及数据处理,并讨论、修正了所得的实验结果,得到了~(12)C束流能散为(2.74 ± 0.14) * 10~(-2),能量经刻度为每核子46.4MeV/u。本工作还拟采用飞行时间法来测量束流能量的绝对值,以检验弹性散射法测得的能量值,而且已设计制作了用作起始探测器的微道板(MCP)零时探测器,上器进行了必要的高调试,用MCP零时探测器作为起始探测器,Si半导体探测器作为终止探测器,对于10MeV/uα粒子,得到了好于560ps的总时间分辩,完全可用于中能重离子实验探测

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The compound K-1.64[Pt(C2O4)(2)] was electrochemically synthesized on a glassy carbon electrode using both single-potential step and cyclic voltammetry techniques; voltammetric behaviour of the working electrode was changed dramatically with deposition of

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Hughes, R. (2002). 'We are not Seeking Strength for its Own Sake': The British Labour Party, West Germany and the Cold War, 1951-64. Cold War History. 3(1) pp.67-94 RAE2008

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A 64-point Fourier transform chip is described that performs a forward or inverse, 64-point Fourier transform on complex two's complement data supplied at a rate of 13.5MHz and can operate at clock rates of up to 40MHz, under worst-case conditions. It uses a 0.6µm double-level metal CMOS technology, contains 535k transistors and uses an internal 3.3V power supply. It has an area of 7.8×8mm, dissipates 0.9W, has 48 pins and is housed in a 84 pin PLCC plastic package. The chip is based on a FFT architecture developed from first principles through a detailed investigation of the structure of the relevant DFT matrix and through mapping repetitive blocks within this matrix onto a regular silicon structure.

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Details of a new low power fast Fourier transform (FFT) processor for use in digital television applications are presented. This has been fabricated using a 0.6-µm CMOS technology and can perform a 64 point complex forward or inverse FFT on real-time video at up to 18 Megasamples per second. It comprises 0.5 million transistors in a die area of 7.8 × 8 mm and dissipates 1 W. The chip design is based on a novel VLSI architecture which has been derived from a first principles factorization of the discrete Fourier transform (DFT) matrix and tailored to a direct silicon implementation.

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Although it is always weak between RFID Tag and Terminal in focus of the security, there are no security skills in RFID Tag. Recently there are a lot of studying in order to protect it, but because it has some physical limitation of RFID, that is it should be low electric power and high speed, it is impossible to protect with the skills. At present, the methods of RFID security are using a security server, a security policy and security. One of them the most famous skill is the security module, then they has an authentication skill and an encryption skill. In this paper, we designed and implemented after modification original SEED into 8 Round and 64 bits for Tag.