965 resultados para spotsize converter


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This work investigates the feasibly in using a low noise “C” Band block down-converter as a Ultra High Frequency window coupler for the detection of partial discharge activity from free conducting practices and a protrusion on the high voltage conductor in Gas Insulated Switchgear. The investigated window coupler has a better sensitivity than the internal Ultra High Frequency couplers fitted to the system. The investigated window couplers however are sensitive to changes in the frequency content of the discharge signals and appear to be less sensitive to negative discharges signals produced by a protrusion than the positive discharge signals.

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Major advances in power electronics during recent years have prompted considerable interest within the traction community. The capability of new technologies to reduce the AC railway networks' effect on power quality and improve their supply efficiency is expected to significantly decrease the cost of electric rail supply systems. Of particular interest are Static Frequency Converter (SFC), Rail Power Conditioner (RPC), High Voltage Direct Current (HVDC) and Energy Storage Systems (ESS) solutions. Substantial impacts on future feasibility of railway electrification are anticipated. Aurizon, Australia's largest heavy haul railway operator, has recently commissioned the world's first 50Hz/50Hz SFC installation and is currently investigating SFC, RPC, HVDC and ESS solutions. This paper presents a summary of current and emerging technologies with a particular focus on the potential techno-economic benefits.

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This paper presents the programming an FPGA (Field Programmable Gate Array) to emulate the dynamics of DC machines. FPGA allows high speed real time simulation with high precision. The described design includes block diagram representation of DC machine, which contain all arithmetic and logical operations. The real time simulation of the machine in FPGA is controlled by user interfaces they are Keypad interface, LCD display on-line and digital to analog converter. This approach provides emulation of electrical machine by changing the parameters. Separately Exited DC machine implemented and experimental results are presented.

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This paper presents the modeling and analysis of a voltage source converter (VSC) based back-to-back (BTB) HVDC link. The case study considers the response to changes in the active and reactive power and disturbance caused by single line to ground (SLG) fault. The controllers at each terminal are designed to inject a variable (magnitude and phase angle) sinusoidal, balanced set of voltages to regulate/control the active and reactive power. It is also possible to regulate the converter bus (AC) voltage by controlling the injected reactive power. The analysis is carried out using both d-q model (neglecting the harmonics in the output voltages of VSC) and three phase detailed model of VSC. While the eigenvalue analysis and controller design is based on the d-q model, the transient simulation considers both models.

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In the education of physical sciences, the role of the laboratory cannot be overemphasised. It is the laboratory exercises which enable the student to assimilate the theoretical basis, verify the same through bench-top experiments, and internalize the subject discipline to acquire mastery of the same. However the resources essential to put together such an environment is substantial. As a result, the students go through a curriculum which is wanting in this respect. This paper presents a low cost alternative to impart such an experience to the student aimed at the subject of switched mode power conversion. The resources are based on an open source circuit simulator (Sequel) developed at IIT Mumbai, and inexpensive construction kits developed at IISc Bangalore. The Sequel programme developed by IIT Mumbai, is a circuit simulation program under linux operating system distributed free of charge. The construction kits developed at IISc Bangalore, is fully documented for anyone to assemble these circuit which minimal equipment such as soldering iron, multimeter, power supply etc. This paper puts together a simple forward dc to dc converter as a vehicle to introduce the programming under sequel to evaluate the transient performance and small signal dynamic model of the same. Bench tests on the assembled construction kit may be done by the student for study of operation, transient performance and closed loop stability margins etc.

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Despite great advances in very large scale integrated-circuit design and manufacturing, performance of even the best available high-speed, high-resolution analog-to-digital converter (ADC) is known to deteriorate while acquiring fast-rising, high-frequency, and nonrepetitive waveforms. Waveform digitizers (ADCs) used in high-voltage impulse recordings and measurements are invariably subjected to such waveforms. Errors resulting from a lowered ADC performance can be unacceptably high, especially when higher accuracies have to be achieved (e.g., when part of a reference measuring system). Static and dynamic nonlinearities (estimated independently) are vital indices for evaluating performance and suitability of ADCs to be used in such environments. Typically, the estimation of static nonlinearity involves 10-12 h of time or more (for a 12-b ADC) and the acquisition of millions of samples at high input frequencies for dynamic characterization. ADCs with even higher resolution and faster sampling speeds will soon become available. So, there is a need to reduce testing time for evaluating these parameters. This paper proposes a novel and time-efficient method for the simultaneous estimation of static and dynamic nonlinearity from a single test. This is achieved by conceiving a test signal, comprised of a high-frequency sinusoid (which addresses dynamic assessment) modulated by a low-frequency ramp (relevant to the static part). Details of implementation and results on two digitizers are presented and compared with nonlinearities determined by the existing standardized approaches. Good agreement in results and time savings achievable indicates its suitability.

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Despite great advances in very large scale integrated-circuit design and manufacturing, performance of even the best available high-speed, high-resolution analog-to-digital converter (ADC) is known to deteriorate while acquiring fast-rising, high-frequency, and nonrepetitive waveforms. Waveform digitizers (ADCs) used in high-voltage impulse recordings and measurements are invariably subjected to such waveforms. Errors resulting from a lowered ADC performance can be unacceptably high, especially when higher accuracies have to be achieved (e.g., when part of a reference measuring system). Static and dynamic nonlinearities (estimated independently) are vital indices for evaluating performance and suitability of ADCs to be used in such environments. Typically, the estimation of static nonlinearity involves 10-12 h of time or more (for a 12-b ADC) and the acquisition of millions of samples at high input frequencies for dynamic characterization. ADCs with even higher resolution and faster sampling speeds will soon become available. So, there is a need to reduce testing time for evaluating these parameters. This paper proposes a novel and time-efficient method for the simultaneous estimation of static and dynamic nonlinearity from a single test. This is achieved by conceiving a test signal, comprised of a high-frequency sinusoid (which addresses dynamic assessment) modulated by a low-frequency ramp (relevant to the static part). Details of implementation and results on two digitizers are presented and compared with nonlinearities determined by the existing standardized approaches. Good agreement in results and time savings achievable indicates its suitability.

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The literature on the subject of the present investigation is somewhat meagre. A rotary converter or synchronous motor no! provided with any special starting devices forms, when started from the alternating current side, a type of induction motor whoso Htator is provided with a polyphase winding, and whoso rotor has a single-phase (or single magnetic axis) winding.

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This paper proposes a multilevel inverter configuration which produces a hexagonal voltage space vector structure in the lower modulation region and a 12-sided polygonal space vector structure in the overmodulation region. A conventional multilevel inverter produces 6n plusmn 1 (n = odd) harmonics in the phase voltage during overmodulation and in the extreme square-wave mode of operation. However, this inverter produces a 12-sided polygonal space vector location, leading to the elimination of 6n plusmn 1 (n = odd) harmonics in the overmodulation region extending to a final 12-step mode of operation with a smooth transition. The benefits of this arrangement are lower losses and reduced torque pulsation in an induction motor drive fed from this converter at higher modulation indexes. The inverter is fabricated by using three conventional cascaded two-level inverters with asymmetric dc-bus voltages. A comparative simulation study of the harmonic distortion in the phase voltage and associated losses in conventional multilevel inverters and that of the proposed inverter is presented in this paper. Experimental validation on a prototype shows that the proposed converter is suitable for high-power applications because of low harmonic distortion and low losses.

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The work is a report of research on using multiple inverters of Battery Energy Storage Systems with angle droop controllers to share real power in an isolated micro grid system consisting of inertia based Distributed Generation units and variable load. The proposed angle droop control method helps to balance the supply and demand in the micro grid autonomous mode through charging and discharging of the Battery Energy Storage Systems while ensuring that the state of charge of the storage devices is within safe operating conditions. The proposed method is also studied for its effectiveness for frequency control. The proposed control system is verified and its performance validated with simulation software MATLAB/SIMULINK.

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Color displays used in image processing systems consist of a refresh memory buffer storing digital image data which are converted into analog signals to display an image by driving the primary color channels (red, green, and blue) of a color television monitor. The color cathode ray tube (CRT) of the monitor is unable to reproduce colors exactly due to phosphor limitations, exponential luminance response of the tube to the applied signal, and limitations imposed by the digital-to-analog conversion. In this paper we describe some computer simulation studies (using the U*V*W* color space) carried out to measure these reproduction errors. Further, a procedure to correct for color reproduction error due to the exponential luminance response (gamma) of the picture tube is proposed, using a video-lookup-table and a higher resolution digital-to-analog converter. It is found, on the basis of computer simulation studies, that the proposed gamma correction scheme is effective and robust with respect to variations in the assumed value of the gamma.

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This paper proposes a multilevel inverter which produces hexagonal voltage space vector structure in lower modulation region and a 12-sided polygonal space vector structure in the over-modulation region. Normal conventional multilevel inverter produces 6n +/- 1 (n=odd) harmonics in the phase voltage during over-modulation and in the extreme square wave mode operation. However, this inverter produces a 12-sided polygonal space vector location leading to the elimination of 6n 1 (n=odd) harmonics in over-modulation region extending to a final 12-step mode operation. The inverter consists of three conventional cascaded two level inverters with asymmetric dc bus voltages. The switching frequency of individual inverters is kept low throughout the modulation index. In the low speed region, hexagonal space phasor based PWM scheme and in the higher modulation region, 12-sided polygonal voltage space vector structure is used. Experimental results presented in this paper shows that the proposed converter is suitable for high power applications because of low harmonic distortion and low switching losses.

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Circuits for realizing serial quaternary-to-analogue converters (QACs) are proposed in this paper. Three techniques are presented based on Shannon-Rack decoder, sample/hold serial digital-to-analogue converter and cyclic digital-to-analogue converter. Circuits for the generation of control signals and the multiplexer required in the realization of the QACs are also described. A comparison of the three methods is made.

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Because of growing environmental concerns and increasingly stringent regulations governing auto emissions, new more efficient exhaust catalysts are needed to reduce the amount of pollutants released from internal combustion engines. To accomplish this goal, the major pollutants in exhaust-CO, NOx, and unburned hydrocarbons-need to be fully converted to CO2, N-2, and H2O. Most exhaust catalysts contain nanocrystalline noble metals (Pt, Pd, Rh) dispersed on oxide supports such as Al2O3 or SiO2 promoted by CeO2. However, in conventional catalysts, only the surface atoms of the noble metal particles serve as adsorption sites, and even in 4-6 nm metal particles, only 1/4 to 1/5 of the total noble metal atoms are utilized for catalytic conversion. The complete dispersion of noble metals can be achieved only as ions within an oxide support. In this Account, we describe a novel solution to this dispersion problem: a new solution combustion method for synthesizing dispersed noble metal ionic catalysts. We have synthesized nanocrystalline, single-phase Ce1-xMxO2-delta and Ce1-x-yTiyMxO2-delta (M = Pt, Pd, Rh; x = 0,01-0.02, delta approximate to x, y = 0.15-0.25) oxides in fluorite structure, In these oxide catalysts, pt(2+), Pd2+, or Rh3+ ions are substituted only to the extent of 1-2% of Ce4+ ion. Lower-valent noble metal ion substitution in CeO2 creates oxygen vacancies. Reducing molecules (CO, H-2, NH3) are adsorbed onto electron-deficient noble metal ions, while oxidizing (02, NO) molecules are absorbed onto electron-rich oxide ion vacancy sites. The rates of CO and hydrocarbon oxidation and NOx reduction (with >80% N-2 selectivity) are 15-30 times higher in the presence of these ionic catalysts than when the same amount of noble metal loaded on an oxide support is used. Catalysts with palladium ion dispersed in CeO2 or Ce1-xTixO2 were far superior to Pt or Rh ionic catalysts. Therefore, we have demonstrated that the more expensive Pt and Rh metals are not necessary in exhaust catalysts. We have also grown these nanocrystalline ionic catalysts on ceramic cordierite and have reproduced the results we observed in powder material on the honeycomb catalytic converter. Oxygen in a CeO2 lattice is activated by the substitution of Ti ion, as well as noble metal ions. Because this substitution creates longer Ti-O and M-O bonds relative to the average Ce-O bond within the lattice, the materials facilitate high oxygen storage and release. The interaction among M-0/Mn+, Ce4+/Ce3+, and Ti4+/Ti3+ redox couples leads to the promoting action of CeO2, activation of lattice oxygen and high oxygen storage capacity, metal support interaction, and high rates of catalytic activity in exhaust catalysis.

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An 8085-based microprocessor system readily available in the laboratory has been developed in conjunction with a slow A/D converter to digitize repetitive transient signals arising in a solid-state physics experiment. The unit has been successfully used to measure the domain switching time in ferroelectric crystals, the duration of which is of the order of milliseconds-seconds.