Method to Improve the Linearity of Active Commutating Mixers Using Dynamic Current Injection

A double balanced (DBM) CMOS mixer providing high linearity is presented in this paper. A cross-coupled pair used in the IF stage of the mixer to dynamically inject current into the to mixer provide a high linearity. The proposed DBM was fabricated using a standard 130-nm CMOS process and was tested on-wafer. The double balanced mixer delivers 10 dB conversion gain, 9.5 dBm IIP3, and input P1dB of -2.4 dBm. RF bandwidth of the proposed mixer is 6 GHz, covering 0.5 GHz to 6.5 GHz with IF bandwidth of 300 MHz. RF to IF and LO to IF isolation are also better than 59 dB in the whole frequency band. The circuit uses an area of 0.015 mm2 excluding bonding pads and draw 4.5mW from a 1.2V supply.

Variable 360° Vector-Sum Phase Shifter With Coarse and Fine Vector Scaling

A CMOS vector-sum phase shifter covering the full 360° range is presented in this paper. Broadband operational transconductance amplifiers with variable transconductance provide coarse scaling of the quadrature vector amplitudes. Fine scaling of the amplitudes is accomplished using a passive resistive network. Expressions are derived to predict the maximum bit resolution of the phase shifter from the scaling factor of the coarse and fine vector-scaling stages. The phase shifter was designed and fabricated using the standard 130-nm CMOS process and was tested on-wafer over the frequency range of 4.9–5.9 GHz. The phase shifter delivers root mean square (rms) phase and amplitude errors of 1.25° and 0.7 dB, respectively, at the midband frequency of 5.4 GHz. The input and output return losses are both below 17 dB over the band, and the insertion loss is better than 4 dB over the band. The circuit uses an area of 0.303 mm2 excluding bonding pads and draws 28 mW from a 1.2 V supply.

Characterisation of Large Disturbance Rotor Angle and Voltage Stability in Interconnected Power Networks with Distributed Wind Generation

Wind generation in highly interconnected power networks creates local and centralised stability issues based on their proximity to conventional synchronous generators and load centres. This paper examines the large disturbance stability issues (i.e. rotor angle and voltage stability) in power networks with geographically distributed wind resources in the context of a number of dispatch scenarios based on profiles of historical wind generation for a real power network. Stability issues have been analysed using novel stability indices developed from dynamic characteristics of wind generation. The results of this study show that localised stability issues worsen when significant penetration of both conventional and wind generation is present due to their non-complementary characteristics. In contrast, network stability improves when either high penetration of wind and synchronous generation is present in the network. Therefore, network regions can be clustered into two distinct stability groups (i.e. superior stability and inferior stability regions). Network stability improves when a voltage control strategy is implemented at wind farms, however both stability clusters remain unchanged irrespective of change in the control strategy. Moreover, this study has shown that the enhanced fault ride-through (FRT) strategy for wind farms can improve both voltage and rotor angle stability locally, but only a marginal improvement is evident in neighbouring regions.

The development of dynamic CFD model of the magnetic semi-levitation of liquid metals

In the casting of reactive metals, such as titanium alloys, contamination can be prevented if there is no contact between the hot liquid metal and solid crucible. This can be achieved by containing the liquid metal by means of high frequency AC magnetic field. A water cooled current-carrying coil, surrounding the metal can then provide the required Lorentz forces, and at the same time the current induced in the metal can provide the heating required to melt it. This ‘attractive’ processing solution has however many problems, the most serious being that of the control and containment of the liquid metal envelope, which requires a balance of the gravity and induced inertia forces on the one side, and the containing Lorentz and surface tension forces on the other. To model this process requires a fully coupled dyna ic solution of the flow fields, magnetic field and heat transfer/melding process to account for. A simplified solution has been published previously providing quasi-static solutions only, by taking the irrotational ‘magnetic pressure’ term of the Lorentz force into account. The authors remedy this deficiency by modelling the full problem using CFD techniques. The salient features of these techniques are included in this paper, as space allows.

Shipping noise in a dynamic sea: a case study of grey seals in the Celtic Sea

Shipping noise is a threat to marine wildlife. Grey seals are benthic foragers, and thus experience acoustic noise throughout the water column, which makes them a good model species for a case study of the potential impacts of shipping noise. We used ship track data from the Celtic Sea, seal track data and a coupled ocean-acoustic modelling system to assess the noise exposure of grey seals along their tracks. It was found that the animals experience step changes in sound levels up to ~20dB at a frequency of 125Hz, and ~10dB on average over 10-1000Hz when they dive through the thermocline, particularly during summer. Our results showed large seasonal differences in the noise level experienced by the seals. These results reveal the actual noise exposure by the animals and could help in marine spatial planning.

Dynamic Resource Allocation in Wireless Heterogeneous Networks

Deployment of low power basestations within cellular networks can potentially increase both capacity and coverage. However, such deployments require efficient resource allocation schemes for managing interference from the low power and macro basestations that are located within each other’s transmission range. In this dissertation, we propose novel and efficient dynamic resource allocation algorithms in the frequency, time and space domains. We show that the proposed algorithms perform better than the current state-of-art resource management algorithms. In the first part of the dissertation, we propose an interference management solution in the frequency domain. We introduce a distributed frequency allocation scheme that shares frequencies between macro and low power pico basestations, and guarantees a minimum average throughput to users. The scheme seeks to minimize the total number of frequencies needed to honor the minimum throughput requirements. We evaluate our scheme using detailed simulations and show that it performs on par with the centralized optimum allocation. Moreover, our proposed scheme outperforms a static frequency reuse scheme and the centralized optimal partitioning between the macro and picos. In the second part of the dissertation, we propose a time domain solution to the interference problem. We consider the problem of maximizing the alpha-fairness utility over heterogeneous wireless networks (HetNets) by jointly optimizing user association, wherein each user is associated to any one transmission point (TP) in the network, and activation fractions of all TPs. Activation fraction of a TP is the fraction of the frame duration for which it is active, and together these fractions influence the interference seen in the network. To address this joint optimization problem which we show is NP-hard, we propose an alternating optimization based approach wherein the activation fractions and the user association are optimized in an alternating manner. The subproblem of determining the optimal activation fractions is solved using a provably convergent auxiliary function method. On the other hand, the subproblem of determining the user association is solved via a simple combinatorial algorithm. Meaningful performance guarantees are derived in either case. Simulation results over a practical HetNet topology reveal the superior performance of the proposed algorithms and underscore the significant benefits of the joint optimization. In the final part of the dissertation, we propose a space domain solution to the interference problem. We consider the problem of maximizing system utility by optimizing over the set of user and TP pairs in each subframe, where each user can be served by multiple TPs. To address this optimization problem which is NP-hard, we propose a solution scheme based on difference of submodular function optimization approach. We evaluate our scheme using detailed simulations and show that it performs on par with a much more computationally demanding difference of convex function optimization scheme. Moreover, the proposed scheme performs within a reasonable percentage of the optimal solution. We further demonstrate the advantage of the proposed scheme by studying its performance with variation in different network topology parameters.

Bumps, breathers, and waves in a neural network with spike frequency adaptation

In this Letter we introduce a continuum model of neural tissue that include the effects of so-called spike frequency adaptation (SFA). The basic model is an integral equation for synaptic activity that depends upon the non-local network connectivity, synaptic response, and firing rate of a single neuron. A phenomenological model of SFA is examined whereby the firing rate is taken to be a simple state-dependent threshold function. As in the case without SFA classical Mexican-Hat connectivity is shown to allow for the existence of spatially localized states (bumps). Importantly an analysis of bump stability using recent Evans function techniques shows that bumps may undergo instabilities leading to the emergence of both breathers and traveling waves. Moreover, a similar analysis for traveling pulses leads to the conditions necessary to observe a stable traveling breather. Direct numerical simulations both confirm our theoretical predictions and illustrate the rich dynamic behavior of this model, including the appearance of self-replicating bumps.

Low-power high-performance SAR ADC design with digital calibration techniques

This dissertation presents the design of three high-performance successive-approximation-register (SAR) analog-to-digital converters (ADCs) using distinct digital background calibration techniques under the framework of a generalized code-domain linear equalizer. These digital calibration techniques effectively and efficiently remove the static mismatch errors in the analog-to-digital (A/D) conversion. They enable aggressive scaling of the capacitive digital-to-analog converter (DAC), which also serves as sampling capacitor, to the kT/C limit. As a result, outstanding conversion linearity, high signal-to-noise ratio (SNR), high conversion speed, robustness, superb energy efficiency, and minimal chip-area are accomplished simultaneously. The first design is a 12-bit 22.5/45-MS/s SAR ADC in 0.13-μm CMOS process. It employs a perturbation-based calibration based on the superposition property of linear systems to digitally correct the capacitor mismatch error in the weighted DAC. With 3.0-mW power dissipation at a 1.2-V power supply and a 22.5-MS/s sample rate, it achieves a 71.1-dB signal-to-noise-plus-distortion ratio (SNDR), and a 94.6-dB spurious free dynamic range (SFDR). At Nyquist frequency, the conversion figure of merit (FoM) is 50.8 fJ/conversion step, the best FoM up to date (2010) for 12-bit ADCs. The SAR ADC core occupies 0.06 mm2, while the estimated area the calibration circuits is 0.03 mm2. The second proposed digital calibration technique is a bit-wise-correlation-based digital calibration. It utilizes the statistical independence of an injected pseudo-random signal and the input signal to correct the DAC mismatch in SAR ADCs. This idea is experimentally verified in a 12-bit 37-MS/s SAR ADC fabricated in 65-nm CMOS implemented by Pingli Huang. This prototype chip achieves a 70.23-dB peak SNDR and an 81.02-dB peak SFDR, while occupying 0.12-mm2 silicon area and dissipating 9.14 mW from a 1.2-V supply with the synthesized digital calibration circuits included. The third work is an 8-bit, 600-MS/s, 10-way time-interleaved SAR ADC array fabricated in 0.13-μm CMOS process. This work employs an adaptive digital equalization approach to calibrate both intra-channel nonlinearities and inter-channel mismatch errors. The prototype chip achieves 47.4-dB SNDR, 63.6-dB SFDR, less than 0.30-LSB differential nonlinearity (DNL), and less than 0.23-LSB integral nonlinearity (INL). The ADC array occupies an active area of 1.35 mm2 and dissipates 30.3 mW, including synthesized digital calibration circuits and an on-chip dual-loop delay-locked loop (DLL) for clock generation and synchronization.

Components and circuits for tunneling diode based high frequency sources

Terahertz (THz) technology has been generating a lot of interest because of the potential applications for systems working in this frequency range. However, to fully achieve this potential, effective and efficient ways of generating controlled signals in the terahertz range are required. Devices that exhibit negative differential resistance (NDR) in a region of their current-voltage (I-V ) characteristics have been used in circuits for the generation of radio frequency signals. Of all of these NDR devices, resonant tunneling diode (RTD) oscillators, with their ability to oscillate in the THz range are considered as one of the most promising solid-state sources for terahertz signal generation at room temperature. There are however limitations and challenges with these devices, from inherent low output power usually in the range of micro-watts (uW) for RTD oscillators when milli-watts (mW) are desired. At device level, parasitic oscillations caused by the biasing line inductance when the device is biased in the NDR region prevent accurate device characterisation, which in turn prevents device modelling for computer simulations. This thesis describes work on I-V characterisation of tunnel diode (TD) and RTD (fabricated by Dr. Jue Wang) devices, and the radio frequency (RF) characterisation and small signal modelling of RTDs. The thesis also describes the design and measurement of hybrid TD oscillators for higher output power and the design and measurement of a planar Yagi antenna (fabricated by Khalid Alharbi) for THz applications. To enable oscillation free current-voltage characterisation of tunnel diodes, a commonly employed method is the use of a suitable resistor connected across the device to make the total differential resistance in the NDR region positive. However, this approach is not without problems as the value of the resistor has to satisfy certain conditions or else bias oscillations would still be present in the NDR region of the measured I-V characteristics. This method is difficult to use for RTDs which are fabricated on wafer due to the discrepancies in designed and actual resistance values of fabricated resistors using thin film technology. In this work, using pulsed DC rather than static DC measurements during device characterisation were shown to give accurate characteristics in the NDR region without the need for a stabilisation resistor. This approach allows for direct oscillation free characterisation for devices. Experimental results show that the I-V characterisation of tunnel diodes and RTD devices free of bias oscillations in the NDR region can be made. In this work, a new power-combining topology to address the limitations of low output power of TD and RTD oscillators is presented. The design employs the use of two oscillators biased separately, but with the combined output power from both collected at a single load. Compared to previous approaches, this method keeps the frequency of oscillation of the combined oscillators the same as for one of the oscillators. Experimental results with a hybrid circuit using two tunnel diode oscillators compared with a single oscillator design with similar values shows that the coupled oscillators produce double the output RF power of the single oscillator. This topology can be scaled for higher (up to terahertz) frequencies in the future by using RTD oscillators. Finally, a broadband Yagi antenna suitable for wireless communication at terahertz frequencies is presented in this thesis. The return loss of the antenna showed that the bandwidth is larger than the measured range (140-220 GHz). A new method was used to characterise the radiation pattern of the antenna in the E-plane. This was carried out on-wafer and the measured radiation pattern showed good agreement with the simulated pattern. In summary, this work makes important contributions to the accurate characterisation and modelling of TDs and RTDs, circuit-based techniques for power combining of high frequency TD or RTD oscillators, and to antennas suitable for on chip integration with high frequency oscillators.

Voltage and current spectra for matrix power converters

Matrix power converters are used for transforming one alternating-current power supply to another, with different peak voltage and frequency. There are three input lines, with sinusoidally varying voltages which are 120◦ out of phase one from another, and the output is to be delivered as a similar three-phase supply. The matrix converter switches rapidly, to connect each output line in sequence to each of the input lines in an attempt to synthesize the prescribed output voltages. The switching is carried out at high frequency and it is of practical importance to know the frequency spectra of the output voltages and of the input and output currents. We determine in this paper these spectra using a new method, which has significant advantages over the prior default method (a multiple Fourier series technique), leading to a considerably more direct calculation. In particular, the determination of the input current spectrum is feasible here, whereas it would be a significantly more daunting procedure using the prior method instead.

Interface properties and capacitance-voltage behaviour of diamond devices prepared by microwave-assisted CVD

Free standing diamond films were used to study the effect of diamond surface morphology and microstructure on the electrical properties of Schottky barrier diodes. By using free standing films both the rough top diamond surface and the very smooth bottom surface are available for post-metal deposition. Rectifying electrical contacts were then established either with the smooth or the rough surface. The estimate of doping density from the capacitance-voltage plots shows that the smooth surface has a lower doping density when compared with the top layers of the same film. The results also show that surface roughness does not contribute significantly to the frequency dispersion of the small signal capacitance. The electrical properties of an abrupt asymmetric n(+)(silicon)-p(diamond) junction have also been measured. The I-V curves exhibit at low temperatures a plateau near zero bias, and show inversion of rectification. Capacitance-voltage characteristics show a capacitance minimum with forward bias, which is dependent on the environment conditions. It is proposed that this anomalous effect arises from high level injection of minority carriers into the bulk.

Holistic Design In High-Speed Optical Interconnects

Integrated circuit scaling has enabled a huge growth in processing capability, which necessitates a corresponding increase in inter-chip communication bandwidth. As bandwidth requirements for chip-to-chip interconnection scale, deficiencies of electrical channels become more apparent. Optical links present a viable alternative due to their low frequency-dependent loss and higher bandwidth density in the form of wavelength division multiplexing. As integrated photonics and bonding technologies are maturing, commercialization of hybrid-integrated optical links are becoming a reality. Increasing silicon integration leads to better performance in optical links but necessitates a corresponding co-design strategy in both electronics and photonics. In this light, holistic design of high-speed optical links with an in-depth understanding of photonics and state-of-the-art electronics brings their performance to unprecedented levels. This thesis presents developments in high-speed optical links by co-designing and co-integrating the primary elements of an optical link: receiver, transmitter, and clocking.

In the first part of this thesis a 3D-integrated CMOS/Silicon-photonic receiver will be presented. The electronic chip features a novel design that employs a low-bandwidth TIA front-end, double-sampling and equalization through dynamic offset modulation. Measured results show -14.9dBm of sensitivity and energy efficiency of 170fJ/b at 25Gb/s. The same receiver front-end is also used to implement source-synchronous 4-channel WDM-based parallel optical receiver. Quadrature ILO-based clocking is employed for synchronization and a novel frequency-tracking method that exploits the dynamics of IL in a quadrature ring oscillator to increase the effective locking range. An adaptive body-biasing circuit is designed to maintain the per-bit-energy consumption constant across wide data-rates. The prototype measurements indicate a record-low power consumption of 153fJ/b at 32Gb/s. The receiver sensitivity is measured to be -8.8dBm at 32Gb/s.

Next, on the optical transmitter side, three new techniques will be presented. First one is a differential ring modulator that breaks the optical bandwidth/quality factor trade-off known to limit the speed of high-Q ring modulators. This structure maintains a constant energy in the ring to avoid pattern-dependent power droop. As a first proof of concept, a prototype has been fabricated and measured up to 10Gb/s. The second technique is thermal stabilization of micro-ring resonator modulators through direct measurement of temperature using a monolithic PTAT temperature sensor. The measured temperature is used in a feedback loop to adjust the thermal tuner of the ring. A prototype is fabricated and a closed-loop feedback system is demonstrated to operate at 20Gb/s in the presence of temperature fluctuations. The third technique is a switched-capacitor based pre-emphasis technique designed to extend the inherently low bandwidth of carrier injection micro-ring modulators. A measured prototype of the optical transmitter achieves energy efficiency of 342fJ/bit at 10Gb/s and the wavelength stabilization circuit based on the monolithic PTAT sensor consumes 0.29mW.

Lastly, a first-order frequency synthesizer that is suitable for high-speed on-chip clock generation will be discussed. The proposed design features an architecture combining an LC quadrature VCO, two sample-and-holds, a PI, digital coarse-tuning, and rotational frequency detection for fine-tuning. In addition to an electrical reference clock, as an extra feature, the prototype chip is capable of receiving a low jitter optical reference clock generated by a high-repetition-rate mode-locked laser. The output clock at 8GHz has an integrated RMS jitter of 490fs, peak-to-peak periodic jitter of 2.06ps, and total RMS jitter of 680fs. The reference spurs are measured to be –64.3dB below the carrier frequency. At 8GHz the system consumes 2.49mW from a 1V supply.

Phases Dynamic Balancer

Most of the current domestic installations are single phase, with contracted power equal to or less than 15 kW and with a potential difference of 230 V. When consumption is expected to be higher you choose to use three different alternating currents with a difference voltage of 400 V between them, which are called phases. This enables the subdivision of the installation in different single-phase circuits, fed independently with the neutral installation. These couples have, in turn, a difference in voltage of 230 V. The neutral is common for all three phases so that, if the system is balanced, no current flows through it. The problem with these installations is that they are designed to work in an offset manner, using phase loads, and simultaneously an equal amount of energy consumed by the three phases of the network. Connection to each of the phases makes independent single-phase loads or disturbance of the operation of the original phase circuit and, consequently, the corresponding increases in consumption, heating of engines, etc.

Interface properties and capacitance-voltage behaviour of diamond devices prepared by microwave-assisted CVD

Free standing diamond films were used to study the effect of diamond surface morphology and microstructure on the electrical properties of Schottky barrier diodes. By using free standing films both the rough top diamond surface and the very smooth bottom surface are available for post-metal deposition. Rectifying electrical contacts were then established either with the smooth or the rough surface. The estimate of doping density from the capacitance-voltage plots shows that the smooth surface has a lower doping density when compared with the top layers of the same film. The results also show that surface roughness does not contribute significantly to the frequency dispersion of the small signal capacitance. The electrical properties of an abrupt asymmetric n(+)(silicon)-p(diamond) junction have also been measured. The I-V curves exhibit at low temperatures a plateau near zero bias, and show inversion of rectification. Capacitance-voltage characteristics show a capacitance minimum with forward bias, which is dependent on the environment conditions. It is proposed that this anomalous effect arises from high level injection of minority carriers into the bulk.

Development and testing of a Fourier trasform based experimental system for Dynamic Mechanical Thermal Analysis tests

Altough nowadays DMTA is one of the most used techniques to characterize polymers thermo-mechanical behaviour, it is only effective for small amplitude oscillatory tests and limited to a single frequency analysis (linear regime). In this thesis work a Fourier transform based experimental system has proven to give hint on structural and chemical changes in specimens during large amplitude oscillatory tests exploiting multi frequency spectral analysis turning out in a more sensitive tool than classical linear approach. The test campaign has been focused on three test typologies: Strain sweep tests, Damage investigation and temperature sweep tests.