950 resultados para Voltage clamp
Resumo:
This paper proposes a new 3 level common mode voltage eliminated inverter using an inverter structure formed by cascading a H-Bridge with a three-level flying capacitor inverter. The three phase space vector polygon formed by this configuration and the polygon formed by the common-mode eliminated states have been discussed. The entire system is simulated in Simulink and the results are experimentally verified. This system has an advantage that if one of devices in the H-Bridge fails, the system can still be operated as a normal 3 level inverter mode at full power. This inverter has many advantages like use of single DC-supply, making it possible for a back to back grid-tied converter application, improved reliability etc.
Resumo:
This paper presents the modelling and analysis of voltage stability at AC commutation bus in LCC (Line commutated converters) based multi-infeed HVDC system. The paper also presents the analysis of effects of various operating control modes in HVDC as well as location of disturbance on the voltage stability of the system under study. A new method of modelling the LCC converters as time varying admittance at the AC commutation bus is also presented in this paper. In this paper, the modelling of STATCOM for provision of dynamic voltage support at one of the AC buses of the HVDC system is presented. The reactive power injected by STATCOM is controlled by regulating the voltage of the AC bus to which STATCOM is connected. The case study also discusses the effects of various possible combinations of location of STATCOM and disturbance considered, on the voltage stability of the multi-infeed HVDC system.
Resumo:
In this paper, we analyze the combined effects of size quantization and device temperature variations (T = 50K to 400 K) on the intrinsic carrier concentration (n(i)), electron concentration (n) and thereby on the threshold voltage (V-th) for thin silicon film (t(si) = 1 nm to 10 nm) based fully-depleted Double-Gate Silicon-on-Insulator MOSFETs. The threshold voltage (V-th) is defined as the gate voltage (V-g) at which the potential at the center of the channel (Phi(c)) begins to saturate (Phi(c) = Phi(c(sat))). It is shown that in the strong quantum confinement regime (t(si) <= 3nm), the effects of size quantization far over-ride the effects of temperature variations on the total change in band-gap (Delta E-g(eff)), intrinsic carrier concentration (n(i)), electron concentration (n), Phi(c(sat)) and the threshold voltage (V-th). On the other hand, for t(si) >= 4 nm, it is shown that size quantization effects recede with increasing t(si), while the effects of temperature variations become increasingly significant. Through detailed analysis, a physical model for the threshold voltage is presented both for the undoped and doped cases valid over a wide-range of device temperatures, silicon film thicknesses and substrate doping densities. Both in the undoped and doped cases, it is shown that the threshold voltage strongly depends on the channel charge density and that it is independent of incomplete ionization effects, at lower device temperatures. The results are compared with the published work available in literature, and it is shown that the present approach incorporates quantization and temperature effects over the entire temperature range. We also present an analytical model for V-th as a function of device temperature (T). (C) 2013 AIP Publishing LLC.
Resumo:
The equivalence of triangle-comparison-based pulse width modulation (TCPWM) and space vector based PWM (SVPWM) during linear modulation is well-known. This paper analyses triangle-comparison based PWM techniques (TCPWM) such as sine-triangle PWM (SPWM) and common-mode voltage injection PWM during overmodulation from a space vector point of view. The average voltage vector produced by TCPWM during overmodulation is studied in the stationary (a-b) reference frame. This is compared and contrasted with the average voltage vector corresponding to the well-known standard two-zone algorithm for space vector modulated inverters. It is shown that the two-zone overmodulation algorithm itself can be derived from the variation of average voltage vector with TCPWM. The average voltage vector is further studied in a synchronously revolving (d-q) reference frame. The RMS value of low-order voltage ripple can be estimated, and can be used to compare harmonic distortion due to different PWM methods during overmodulation. The measured values of the total harmonic distortion (THD) in the line currents are presented at various fundamental frequencies. The relative values of measured current THD pertaining to different PWM methods tally with those of analytically evaluated RMS voltage ripple.
Resumo:
The pore of sodium channels contains a selectivity filter made of 4 amino acids, D/E/K/A. In voltage sensitive sodium channel (Nav) channels from jellyfish to human the fourth amino acid is Ala. This Ala, when mutated to Asp, promotes slow inactivation. In some Nav channels of pufferfishes, the Ala is replaced with Gly. We studied the biophysical properties of an Ala-to-Gly substitution (A1529G) in rat Nav1.4 channel expressed in Xenopus oocytes alone or with a beta 1 subunit. The Ala-to-Gly substitution does not affect monovalent cation selectivity and positively shifts the voltage-dependent inactivation curve, although co-expression with a beta 1 subunit eliminates the difference between A1529G and WT. There is almost no difference in channel fast inactivation, but the beta 1 subunit accelerates WT current inactivation significantly more than it does the A1529G channels. The Ala-to-Gly substitution mainly influences the rate of recovery from slow inactivation. Again, the beta 1 subunit is less effective on speeding recovery of A1529G than the WT. We searched Nav channels in numerous databases and noted at least four other independent Ala-to-Gly substitutions in Nav channels in teleost fishes. Thus, the Ala-to-Gly substitution occurs more frequently than previously realized, possibly under selection for alterations of channel gating.
Resumo:
In this paper, an input receiver with a hysteresis characteristic that can work at voltage levels between 0.9 V and 5 V is proposed. The input receiver can be used as a wide voltage range Schmitt trigger also. At the same time, reliable circuit operation is ensured. According to the research findings, this is the first time a wide voltage range Schmitt trigger is being reported. The proposed circuit is compared with previously reported input receivers, and it is shown that the circuit has better noise immunity. The proposed input receiver ends the need for a separate Schmitt trigger and input buffer. The frequency of operation is also higher than that of the previously reported receiver. The circuit is simulated using HSPICE at 035-mu m standard thin oxide technology. Monte Carlo analysis is conducted at different process conditions, showing that the proposed circuit works well for different process conditions at different voltage levels of operation. A noise impulse of (V-CC/2) magnitude is added to the input voltage to show that the receiver receives the correct logic level even in the presence of noise. Here, V-CC is the fixed voltage supply of 3.3 V.
Resumo:
In this paper, a current hysteresis controller with parabolic boundaries for a 12-sided polygonal voltage space vector inverter fed induction motor (IM) drive is proposed. Parabolic boundaries with generalized vector selection logic, valid for all sectors and rotational direction, is used in the proposed controller. The current error space phasor boundary is obtained by first studying the drive scheme with space vector based PWM (SVPWM) controller. Four parabolas are used to approximate this current error space phasor boundary. The system is then run with space phasor based hysteresis PWM controller by limiting the current error space vector (CESV) within the parabolic boundary. The proposed controller has simple controller implementation, nearly constant switching frequency, extended modulation range and fast dynamic response with smooth transition to the over modulation region.
Resumo:
In this paper, a current error space vector (CESV)-based hysteresis current controller for a multilevel 12-sided voltage space vector-based inverter-fed induction motor (IM) drive is proposed. The proposed controller gives a nearly constant switching frequency operation throughout different speeds in the linear modulation region. It achieves the elimination of 6n +/- 1, n = odd harmonics from the phase voltages and currents in the entire modulation range, with an increase in the linear modulation range. It also exhibits fast dynamic behavior under different transient conditions and has a simple controller implementation. Nearly constant switching frequency is obtained by matching the steady-state CESV boundaries of the proposed controller with that of a constant switching frequency SVPWM-based drive. In the proposed controller, the CESV reference boundaries are computed online, using the switching dwell time and voltage error vector of each applied vector. These quantities are calculated from estimated sampled reference phase voltages. Vector change is decided by projecting the actual current error along the computed hysteresis space vector boundary of the presently applied vector. The estimated reference phase voltages are found from the stator current error ripple and the parameters of the IM.
Resumo:
This paper presents the design of a start up power circuit for a control power supply (CPS) which feeds power to the sub-systems of High Power Converters (HPC). The sub-systems such as gate drive card, annunciation card, protection and delay card etc; needs to be provided power for the operation of a HPC. The control power supply (CPS) is designed to operate over a wide range of input voltage from 90Vac to 270Vac. The CPS output supplies power at a desired voltage of Vout =24V to the auxiliary sub-systems of the HPC. During the starting, the power supply to the control circuitry of CPS in turn, is obtained using a separate start-up power supply. This paper discusses the various design issues of the start-up power circuit to ensure that start-up and shut down of the CPS occurs reliably. The CPS also maintains the power factor close to unity and low total harmonic distortion in input current. The paper also provides design details of gate drive circuits employed for the CPS as well as the design of on-board power supply for the CPS. Index terms: control power supply, start-up power supply, DSFC, pre-regulator
Resumo:
A three-level common-mode voltage eliminated inverter with single dc supply using flying capacitor inverter and cascaded H-bridge has been proposed in this paper. The three phase space vector polygon formed by this configuration and the polygon formed by the common-mode eliminated states have been discussed. The entire system is simulated in Simulink and the results are experimentally verified. This system has an advantage that if one of devices in the H-bridge fails, the system can still be operated as a normal three-level inverter at full power. This inverter has many other advantages like use of single dc supply, making it possible for a back-to-back grid-tied converter application, improved reliability, etc.
Resumo:
Bacterial DNA topoisomerase I (topoI) catalyzes relaxation of negatively supercoiled DNA. The enzyme alters DNA topology through protein-operated DNA gate, switching between open and closed conformations during its reaction. We describe the mechanism of inhibition of Mycobacterium smegmatis and Mycobacterium tuberculosis topoI by monoclonal antibodies (mAbs) that bind with high affinity and inhibit at 10-50 nM concentration. Unlike other inhibitors of topoisomerases, the mAbs inhibited several steps of relaxation reaction, namely DNA binding, cleavage, strand passage, and enzyme-DNA dissociation. The enhanced religation of the cleaved DNA in presence of the mAb indicated closing of the enzyme DNA gate. The formation of enzyme-DNA heterocatenane in the presence of the mAbs as a result of closing the gate could be inferred by the salt resistance of the complex, visualized by atomic force microscopy and confirmed by fluorescence measurements. Locking the enzyme-DNA complex as a closed clamp restricted the movements of the DNA gate, affecting all of the major steps of the relaxation reaction. Enzyme trapped on DNA in closed clamp conformation formed roadblock for the elongating DNA polymerase. The unusual multistep inhibition of mycobacterial topoisomerases may facilitate lead molecule development, and the mAbs would also serve as valuable tools to probe the enzyme mechanism.
Resumo:
This paper presents a new voltage stability index based on the tangent vector of the power flow jacobian. This index is capable of providing the relative vulnerability information of the system buses from the point of view of voltage collapse. In an effort to compare this index with a similar index, the popular voltage stability index L is studied and it is shown through system studies that the L index is not a very consistent indicator of the voltage collapse point of the system but is only a reasonable indicator of the vulnerability of the system buses to voltage collapse. We also show that the new index can be used in the voltage stability analysis of radial systems which is not possible with the L index. This is a significant result of this investigation since there is a lot of contemporary interest in distributed generation and microgrids which are by and large radial in nature. Simulation results considering several test systems are provided to validate the results and the computational needs of the proposed scheme is assessed in comparison with other schemes
Resumo:
Voltage source inverters are an integral part of renewable power sources and smart grid systems. Computationally efficient and fairly accurate models for the voltage source inverter are required to carry out extensive simulation studies on complex power networks. Accuracy requires that the effect of dead-time be incorporated in the inverter model. The dead-time is essentially a short delay introduced between the gating pulses to the complementary switches in an inverter leg for the safety of power devices. As the modern voltage source inverters switch at fairly high frequencies, the dead-time significantly influences the output fundamental voltage. Dead-time also causes low-frequency harmonic distortion and is hence important from a power quality perspective. This paper studies the dead-time effect in a synchronous dq reference frame, since dynamic studies and controller design are typically carried out in this frame of reference. For the sake of computational efficiency, average models are derived, incorporating the dead-time effect, in both RYB and dq reference frames. The average models are shown to consume less computation time than their corresponding switching models, the accuracies of the models being comparable. The proposed average synchronous reference frame model, including effect of dead-time, is validated through experimental results.
Resumo:
In this paper, a current error space vector (CESV) based hysteresis controller for a 12-sided polygonal voltage space vector inverter fed induction motor (IM) drive is proposed, for the first time. An open-end winding configuration is used for the induction motor. The proposed controller uses parabolic boundary with generalized vector selection logic for all sectors. The drive scheme is first studied with a space vector based PWM (SVPWM) control and from this the current error space phasor boundary is obtained. This current error space phasor boundary is approximated with four parabolas and then the system is run with space phasor based hysteresis PWM controller by limiting the CESV within the parabolic boundary. The proposed controller has increased modulation range, absence of 5th and 7th order harmonics for the entire modulation range, nearly constant switching frequency, fast dynamic response with smooth transition to the over modulation region and a simple controller implementation.