Three-phase machines and drives - equipment for a laboratory-based course

The hazards associated with high-voltage three-phase inverters and high-powered large electrical machines have resulted in most of the engineering courses covering three-phase machines and drives theoretically. This paper describes a set of purpose-built, low-voltage, and low-cost teaching equipment that allows the hands-on instruction of three-phase inverters and rotating machines. The motivation for moving towards a system running at low voltages is that the students can safely experiment freely with the motors and inverter. The students can also access all of the current and voltage waveforms, which until now could only be studied in textbooks or observed as part of laboratory demonstrations. Both the motor and the inverter designs are for teaching purposes and require minimal effort and cost

Investigation into low power of a 2D Inverse Discrete CosineTransform (IDCT) in FPGAs

Design for low power in FPGA is rather limited since technology factors affecting power are either fixed or limited for FPGA families. This paper investigates opportunities for power savings of a pipelined 2D IDCT design at the architecture and logic level. We report power consumption savings of over 25% achieved in FPGA circuits obtained from clock gating implementation of optimizations made at the algorithmic level(1).

An efficient low power FFT implementation for multiband full-rate ultra-wideband (UWB) receivers

This paper discusses the design, implementation and synthesis of an FFT module that has been specifically optimized for use in the OFDM based Multiband UWB system, although the work is generally applicable to many other OFDM based receiver systems. Previous work has detailed the requirements for the receiver FFT module within the Multiband UWB ODFM based system and this paper draws on those requirements coupled with modern digital architecture principles and low power design criteria to converge on our optimized solution. The FFT design obtained in this paper is also applicable for implementation of the transmitter IFFT module therefore only needing one FFT module for half-duplex operation. The results from this paper enable the baseband designers of the 200Mbit/sec variant of Multiband UWB systems (and indeed other OFDM based receivers) using System-on-Chip (SoC), FPGA and ASIC technology to create cost effective and low power solutions biased toward the competitive consumer electronics market.

Integrating control and electronics

Previously the author described how control engineering can be introduced using little mathematics in a first year course, the aim being to make the subject accessible across different degrees. One reaction to this was that it was a good idea, but there was not space to include it in the curriculum where, typically control engineering is not introduced until the second year. This paper describes how the author has used a review of the first year teaching to develop a module in which feedback, control and electronics are integrated coherently. This is beneficial as concepts in control and electronics mutually reinforce each other. This has been achieved during a reduction in the available time for teaching the material. This paper describes the strategy used to successfully develop the module, the integrated module and positive student reaction.

Facts, scope, style: a guide to writing papers for IEEE transactions on consumer electronics

In a previous article, I wrote a brief piece on how to enhance papers that have been published at one of the IEEE Consumer Electronics (CE) Society conferences to create papers that can be considered for publishing in IEEE Transactions on Consumer Electronics (T-CE) [1]. Basically, it included some hints and tips to enhance a conference paper into what is required for a full archival journal paper and not fall foul of self-plagiarism. This article focuses on writing original papers specifically for T-CE. After three years as the journal’s editor-in-chief (EiC), a previous eight years on the editorial board, and having reviewed some 4,000 T-CE papers, I decided to write this article to archive and detail for prospective authors what I have learned over this time. Of course, there are numerous articles on writing good papers—some are really useful [2], but they do not address the specific issues of writing for a journal whose topic (scope) is not widely understood or, indeed, is often misunderstood.

Systematic selection of analogue redesign method for forward-type digital power converters

This article proposes a systematic approach to determine the most suitable analogue redesign method to be used for forward-type converters under digital voltage mode control. The focus of the method is to achieve the highest phase margin at the particular switching and crossover frequencies chosen by the designer. It is shown that at high crossover frequencies with respect to switching frequency, controllers designed using backward integration have the largest phase margin; whereas at low crossover frequencies with respect to switching frequency, controllers designed using bilinear integration with pre-warping have the largest phase margins. An algorithm has been developed to determine the frequency of the crossing point where the recommended discretisation method changes. An accurate model of the power stage is used for simulation and experimental results from a Buck converter are collected. The performance of the digital controllers is compared to that of the equivalent analogue controller both in simulation and experiment. Excellent closeness between the simulation and experimental results is presented. This work provides a concrete example to allow academics and engineers to systematically choose a discretisation method.

Detection and Identification of Abnormalities in Customer Consumptions in Power Distribution Systems

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Single-phase high power-factor boost ZCS pre-regulator operating in critical conduction mode

This paper presents a new single-phase interleaved high power factor boost pre-regulator operating in critical conduction mode, where the switches and boost diode performing zero-current commutations during its turn-off, eliminating the disadvantages related to the reverse recovery losses and electromagnetic interference problems of the boost diode, when operating in the continuous conduction mode. The interleaving technique is applied in the power cell, providing a significant input current ripple reduction in comparison to discontinuous mode of operation, due to its input current continuous conduction operation. This paper presents a complete modeling for the converter operating in critical conduction mode, resulting in an improved design procedure for interleaved techniques with high input power factor, a complete design procedure, and main simulation results from a design example with two interleaved cells rated at 1kW, 400V output voltage and 220V rms input voltage.

Novel high-power-factor ZCS-PWM preregulators

This paper introduces novel zero-current-switching (ZCS) pulsewidth-modulated (PWM) preregulators based on a new soft-commutation cell, suitable for insulated gate bipolar transistor applications. The active switches in these proposed rectifiers turn on in zero current and turn off in zero current-zero voltage. In addition, the diodes turn on in zero voltage and their reverse-recovery effects over the active switches are negligible. Moreover, based on the proposed cell, an entire family of de-to-de ZCS-PWM converters can be generated, providing conditions to obtain naturally isolated converters, for example, derived buck-boost, Sepic. and Zeta converters. The novel ac-to-dc ZCS-PWM boost and Zeta preregulators are presented in order to verify the operation of this soft-commutation cell, In order to minimize the harmonic contents of the input current, increasing the ac power factor, the average-current-mode control is used, obtaining preregulators with ac power factor near unity and high efficiency at wide load range. The principle of operation, theoretical analysis, design example, and experimental results from test units for the novel preregulators are presented. The new boost preregulator was designed to nominal values of 1.6 kW output power, 220 V(rms) input voltage, 400 V(dc) output voltage, and operating at 20 kHz. The measured efficiency and power factor of the new ZCS-PWM boost preregulator were 96.7% and 0,99, respectively, with an input current total harmonic distortion (THD) equal to 3.42% for an input voltage with THD equal to 1.61%, at rated load, the new ZCS-PWM Zeta preregulator was designed to voltage step-down operation, and the experimental results were obtained from a laboratory prototype rated at 500 W, 220 V(rm), input voltage, 110 V(dc) output voltage, and operating at 50 kHz. The measured efficiency of the new ZCS-PWM Zeta preregulator is approximately 96.9% and the input power factor is 0.98, with an input current THD equal to 19.07% while the input voltage THD is equal to 1.96%, at rated load.

Continuation fast decoupled power flow with secant predictor

The conventional Newton and fast decoupled power flow methods are considered inadequate for obtaining the maximum loading point of power systems due to ill-conditioning problems at and near this critical point. At this point, the Jacobian matrix of the Newton method becomes singular. In addition, it is widely accepted that the P-V and Q-theta decoupling assumptions made for the fast decoupled power flow formulation no longer hold. However, in this paper, it is presented a new fast decoupled power flow that becomes adequate for the computation of the maximum loading point by simply using the reactive power injection of a selected PV bus as a continuation parameter. Besides, fast decoupled methods using V and 0 as parameters and a secant predictor are also presented. These new versions are compared to each other with the purpose of pointing out their features, as well as the influence of reactive power and transformer tap limits. The results obtained for the IEEE systems (14 and 118 buses) show that the characteristics of the conventional method are enhanced and the region of convergence around the singular solution is enlarged.

High power factor dimmable electronic ballast for multiple tubular fluorescent lamps

This paper presents a dimmable electronic ballast designed for multiple fluorescent lamps applications. A ZCS-PWM Boost rectifier and a classical resonant Full-Bridge inverter compose this new electronic ballast, providing conditions for the obtaining of high input power-factor, and soft-switching processes for all semiconductor devices employed in the structure. The instantaneous average input current control technique is employed in the Boost rectifier. Concerning the Full-Bridge inverter, it is controlled by the imposition of phase-shift in the current processed through the sets of resonant filters + lamps, according to an adaptation in a specially designed control IC, called IR2159. Experimental results are presented in order to validate the analyses developed in this paper.

Real power losses reduction and loading margin improvement via continuation method

This letter presents an alternative approach for reducing the total real power losses by using a continuation method. Results for two simple test systems and for the IEEE 57-bus system show that this procedure results in larger voltage stability margin. Besides, the reduction of real power losses obtained with this procedure leads to significant money savings and, simultaneously, to voltage profile improvement. Comparison between the solution of an optimal power flow and the proposed method shows that the latter can provide near optimal results and so, it can be a reasonable alternative to power system voltage stability enhancement.

Variable-Structure Control Design of Switched Systems With an Application to a DC-DC Power Converter

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Power Factor Correction Boost Converter Based on the Three-State Switching Cell

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Time-series-based maximization of distributed wind power generation integration

Energy policies and technological progress in the development of wind turbines have made wind power the fastest growing renewable power source worldwide. The inherent variability of this resource requires special attention when analyzing the impacts of high penetration on the distribution network. A time-series steady-state analysis is proposed that assesses technical issues such as energy export, losses, and short-circuit levels. A multiobjective programming approach based on the nondominated sorting genetic algorithm (NSGA) is applied in order to find configurations that maximize the integration of distributed wind power generation (DWPG) while satisfying voltage and thermal limits. The approach has been applied to a medium voltage distribution network considering hourly demand and wind profiles for part of the U.K. The Pareto optimal solutions obtained highlight the drawbacks of using a single demand and generation scenario, and indicate the importance of appropriate substation voltage settings for maximizing the connection of MPG.