Microwave cure of conductive adhesives for flip-chip & microsystems applications

The curing of conductive adhesives and underfills can save considerable time and offer cost benefits for the microsystems and electronics packaging industry. In contrast to conventional ovens, curing by microwave energy generates heat internally within each individual component of an assembly. The rate at which heat is generated is different for each of the components and depends on the material properties as well as the oven power and frequency. This leads to a very complex and transient thermal state, which is extremely difficult to measure experimentally. Conductive adhesives need to be raised to a minimum temperature to initiate the cross-linking of the resin polymers, whilst some advanced packaging materials currently under investigation impose a maximum temperature constraint to avoid damage. Thermal imagery equipment integrated with the microwave oven can offer some information on the thermal state but such data is based on the surface temperatures. This paper describes computational models that can simulate the internal temperatures within each component of an assembly including the critical region between the chip and substrate. The results obtained demonstrate that due to the small mass of adhesive used in the joints, the temperatures reached are highly dependent on the material properties of the adjacent chip and substrate.

Computer modelling of the reliability of flip chips with metal column bumping

Recently, research has been carried out to test a novel bumping method which omits the under bump metallurgy forming process by bonding copper columns directly onto the Al pads of the silicon dies. This bumping method could be adopted to simplify the flip chip manufacturing process, increase the productivity and achieve a higher I/O count. This paper describes an investigation of the solder joint reliability of flip-chips based on this new bumping process. Computer modelling methods are used to predict the shape of solder joints and response of flip chips to thermal cyclic loading. The accumulated plastic strain energy at the comer solder joints is used as the damage indicator. Models with a range of design parameters have been compared for their reliability. The parameters that have been investigated are the copper column height, radius and solder volume. The ranking of the relative importance of these parameters is given. For most of the results presented in the paper, the solder material has been assumed to be the lead-free 96.5Sn3.5Ag alloy but some results for 60Sn40Pb solder joints have also been presented.

Predicting the relationship between reliability and geometric parameters of cu column bumped flip-chips

Cu column bumping is a novel flip chip packaging technique that allows Cu columns to be bonded directly with the dies. It has eliminated the under-bump-metallurgy (UBM) fonnation step of the traditional flip chip manufacturing process. This bumping technique has the potential benefits of simplifying the flip chip manufacturing process, increasing productivity and the UO counts. In this paper, a study of reliability of Cu column bumped flip chips will be presented. Computer modelling methods have been used to predict the shape of solder joints and the response of flip chips to cyclic thermal-mechanical loading. The accumulated plastic strain energy at the corner solder joints has been used as an indicator of the solder joint reliability. Models with a wide range of design parameters have been compared for their reliability. The design parameters that have been investigated are the copper column height and radius, PCB pad radius, solder volume and Cu column wetting height. The relative importance ranking of these parameters has been obtained. The Lead-free solder material 96.5Sn3.5Ag has been used in this modelling work.

A modelling and experimental analysis of the no-flow underfill process for flip-chip assembly

In the flip-chip assembly process, no-flow underfill materials have a particular advantage over traditional underfills as the application and curing of this type of underfill can be undertaken before and during the reflow process - adding high volume throughput. Adopting a no-flow underfill process may result in underfill entrapment between solder and fluid, voiding in the underfill, a possible delamination between underfill and surrounding surfaces. The magnitude of these phenomena may adversely affect the reliability of the assembly in terms of solder joint thermal fatigue. This paper presents both an experimental and mdeling analysis investigating the reliabity of a flip-chip component and how the magnitude of underfill entrapment may affect thermal-mechanical fatigue life.

Dynamic analysis of Flip-Chip Self-Alignment

Self-alignment of soldered electronic components such as flip-chips (FC), ball grid arrays (BGA) and optoelectronic devices during solder reflow is important as it ensures good alignment between components and substrates. Two uncoupled analytical models are presented which provide estimates of the dynamic time scales of both the chip and the solder in the self-alignment process. These predicted time scales can be used to decide whether a coupled dynamic analysis is required for the analysis of the chip motion. In this paper, we will show that for flip-chips, the alignment dynamics can be described accurately only when the chip motion is coupled with the solder motion because the two have similar time-scale values. To study this coupled phenomenon, a dynamic modeling method has been developed. The modeling results show that the uncoupled and coupled calculations result in significantly different predictions. The calculations based on the coupled model predict much faster rates of alignment than those predicted using the uncoupled approach.

Moisture Effects on the Reliability of Anisotropic Conductive Film Interconnection for Flip Chip on Flex Applications

Anisotropic conductive film (ACF) which consists of an adhesive epoxy matrix and randomly distributed conductive particles are widely used as the connection material for electronic devices with high I/O counts. However, for the semiconductor industry the reliability of the ACF is still a major concern due to a lack of experimental reliability data. This paper reports the investigations into the moisture-induced failures in Flip-Chip-on-Flex interconnections with Anisotropic Conductive Films (ACFs). Both experimental and modeling methods were applied. In the experiments, the contact resistance was used as a quality indicator and was measured continuously during the accelerated tests (autoclave tests). The temperature, relative humidity and the pressure were set at 121°C, 100%RH, and 2atm respectively. The contact resistance of the ACF joints increased during the tests and nearly 25% of the joints were found to be open after 168 hours’ testing time. Visible conduction gaps between the adhesive and substrate pads were observed. Cracks at the adhesive/flex interface were also found. For a better understanding of the experimental results, 3-D Finite Element (FE) models were built and a macro-micro modeling method was used to determine the moisture diffusion and moisture-induced stresses inside the ACF joints. Modeling results are consistent with the findings in the experimental work.

Macro-Micro Modelling Analysis for High Density Packaged Flip Chips

A wide range of flip chip technologies with solder or adhesives have become dominant solutions for high density packaging applications due to the excellent electrical performance, high I/O density and good thermal performance. This paper discusses the use of modeling technique to predict the reliability of high density packaged flip chips in the humid environment. Reliability assessment is discussed for flip chip package at ultra-fine pitch with anisotropic conductive film (ACF). The purpose of this modeling work is to understand the role that moisture plays in the failure of ACF flip chips. A macro-micro 3D finite element modeling technique was used in order to make the multi-length-scale modeling of the ACF flip chip possible. Modeling results are consistent with the findings in the experimental work

Experimental and Modelling Analysis on the Moisture Induced Failures in Flip Chip on Flex Interconnections with Anisotropic Conductive Film

This paper reports the investigations into the moisture induced failures in flip-chip-on-flex interconnections with anisotropic conductive films (ACF). Both experimental and modeling methods were applied. In the experiments, the contact resistance was used as a quality indicator and was measured continuously during the accelerated tests (autoclave tests). The temperature, relative humidity and the pressure were set at 121°C, 100%RH, 1atm respectively. The contact resistance of the ACF joints increased during the tests and nearly 25% of the joints were found to be open after 168 hours' testing time. Visible conduction gaps between the adhesive and substrate pads were observed. Cracks at the adhesive/flex interface were also found. It is believed that the swelling effect of the adhesive and the water penetration along the adhesive/flex interface are the main causes of this contact degradation. Another finding from the experimental work was that the ACF interconnections that had undergone the reflow treatment were more sensitive to the moisture and showed worse reliability during the tests. For a better understanding of the experimental results, 3D finite element (FE) models were built and a macro-micro modeling method was used to determine the moisture diffusion and moisture-induced stresses inside the ACF joints. Modeling results are consistent with the findings in the experimental work.

Effects of solder reflow on the reliability of flip-chip on flex interconnections using anisotropic conductive adhesives

This work describes the work of an investigation of the effects of solder reflow process on the reliability of anisotropic conductive film (ACF) interconnection for flip-chip on flex (FCOF) applications. Experiments as well as computer modeling methods have been used. The results show that the contact resistance of ACF interconnections increases after the reflow and the magnitude of the increase is strongly correlated to the peak reflow temperature. In fact, nearly 40 percent of the joints are open when the peak reflow temperature is 260°C, while there is no opening when the peak temperature is 210°C. It is believed that the coefficient of thermal expansion (CTE) mismatch between the polymer particle and the adhesive matrix is the main cause of this contact degradation. To understand this phenomenon better, a three-dimensional (3-D) finite element (FE) model of an ACF joint has been analyzed in order to predict the stress distribution in the conductive particles, adhesive matrix and metal pads during the reflow process. The stress level at the interface between the particle and its surrounding materials is significant and it is the highest at the interface between the particle and the adhesive matrix.

Computational modelling for reliable flip-chip packaging at sub-100 micron pitch using isotropic conductive adhesives

This paper presents the assembly process using next generation electroformed stencils and Isotropic Conductive Adhesives (ICAs) as interconnection material. The utilisation of ICAs in flip-chip assembly process is investigated as an alternative to the lead and lead-free solder alloys and aims to ensure a low temperature (T < 100 °C) assembly process. The paper emphasizes and discusses in details the assembly of a flip-chip package based on copper columns bumped die and substrate with stencil printed ICA deposits at sub-100 μm pitch. A computational modelling approach is undertaken to provide comprehensive results on reliability trends of ICA joints subject to thermal cycling of the flip-chip assembly based on easy to use damage criteria and damage evaluation. Important design parameters in the package are selected and investigated using numerical modelling techniques to provide knowledge and understanding of their impact on the thermo-mechanical behaviour of the flip-chip ICA joints. Sensitivity analysis of the damage in the adhesive material is also carried out. Optimal design rules for enhanced performance and improved thermo-mechanical reliability of ICA assembled flip-chip packages are finally formulated.

Macro-micro modelling of moisture induced stresses in an ACF flip chip assembly

Purpose – This paper discusses the use of modelling techniques to predict the reliability of an anisotropic conductive film (ACF) flip chip in a humid environment. The purpose of this modelling work is to understand the role that moisture plays in the failure of ACF flip chips. Design/methodology/approach – A 3D macro-micro finite element modelling technique was used to determine the moisture diffusion and moisture-induced stresses inside the ACF flip chip. Findings – The results show that the ACF layer in the flip chip can be expected to be fully saturated with moisture after 3?h at 121°C, 100%RH, 2?atm test conditions. The swelling effect of the adhesive due to this moisture absorption causes predominately tensile stress at the interface between the adhesive and the metallization, which could cause a decrease in the contact area, and therefore an increase in the contact resistance. Originality/value – This paper introduces a macro-micro modelling technique which enables more detailed 3D modelling analysis of an ACF flip chip than previously.

Ultra-fine pitch stencil printing for a low cost and low temperature flip-chip assembly process

This paper presents the results of a packaging process based on the stencil printing of isotropic conductive adhesives (ICAs) that form the interconnections of flip-chip bonded electronic packages. Ultra-fine pitch (sub-100-mum), low temperature (100degC), and low cost flip-chip assembly is demonstrated. The article details recent advances in electroformed stencil manufacturing that use microengineering techniques to enable stencil fabrication at apertures sizes down to 20mum and pitches as small as 30mum. The current state of the art for stencil printing of ICAs and solder paste is limited between 150-mum and 200-mum pitch. The ICAs-based interconnects considered in this article have been stencil printed successfully down to 50-mum pitch with consistent printing demonstrated at 90-mum pitch size. The structural integrity or the stencil after framing and printing is also investigated through experimentation and computational modeling. The assembly of a flip-chip package based on copper column bumped die and ICA deposits stencil printed at sub-100-mum pitch is described. Computational fluid dynamics modeling of the print performance provides an indicator on the optimum print parameters. Finally, an organic light emitting diode display chip is packaged using this assembly process

Open ended microwave oven for flip-chip assembly

A novel open-ended waveguide cavity resonator for the microwave curing of bumps, underfills and encapsulants is described. The open oven has the potential to provide fast alignment of devices during flip-chip assembly, direct chip attach, surface mount assembly or wafer-scale level packaging. The prototype microwave oven was designed to operate at X-band for ease of testing, although a higher frequency version is planned. The device described in the paper takes the form of a waveguide cavity resonator. It is approximately square in cross-section and is filled with a low-loss dielectric with a relative permittivity of 6. It is excited by end-fed probes in order to couple power preferentially into the TM3,3,k mode with the object of forming nine 'hot-spots' in the open end. Low power tests using heat sensitive film demonstrate clearly that selective heating in multiple locations in the open end of the oven is achievable

Role of bonding time and temperature on the physical properties of coupled anisotropic conductive–nonconductive adhesive film for flip chip on glass technology

Using thermosetting epoxy based conductive adhesive films for the flip chip interconnect possess a great deal of attractions to the electronics manufacturing industries due to the ever increasing demands for miniaturized electronic products. Adhesive manufacturers have taken many attempts over the last decade to produce a number of types of adhesives and the coupled anisotropic conductive-nonconductive adhesive film is one of them. The successful formation of the flip chip interconnection using this particular type of adhesive depends on, among factors, how the physical properties of the adhesive changes during the bonding process. Experimental measurements of the temperature in the adhesive have revealed that the temperature becomes very close to the required maximum bonding temperature within the first 1s of the bonding time. The higher the bonding temperature the faster the ramp up of temperature is. A dynamic mechanical analysis (DMA) has been carried out to investigate the nature of the changes of the physical properties of the coupled anisotropic conductive-nonconductive adhesive film for a range of bonding parameters. Adhesive samples that are pre-cured at 170, 190 and 210°C for 3, 5 and 10s have been analyzed using a DMA instrument. The results have revealed that the glass transition temperature of this type of adhesive increases with the increase in the bonding time for the bonding temperatures that have been used in this work. For the curing time of 3 and 5s, the maximum glass transition temperature increases with the increase in the bonding temperature, but for the curing time of 10s the maximum glass transition temperature has been observed in the sample which is cured at 190°C. Based on these results it has been concluded that the optimal bonding temperature and time for this kind of adhesive are 190°C and 10s, respectively.

Low temperature crystal structures of two rhodanine derivatives, 3-amino rhodanine and 3-methyl rhodanine: geometry of the rhodanine ring

Rhodanines (2-thio-4-oxothiazolidines) are synthetic small molecular weight organic molecules with diverse applications in biochemistry, medicinal chemistry, photochemistry, coordination chemistry and industry. The X-ray crystal structure determination of two rhodanine derivatives, namely (I), 3-aminorhodanine [3-amino-2-thio-4-oxothiazolidine], C3H4N2OS2, and (II) 3-methylrhodanine [3-methyl-2-thio-4-oxothiazolidine], C4H5NOS2, have been conducted at 100 K. I crystallizes in the monoclinic space group P2(1)/n with unit cell parameters a = 9.662(2), b = 9.234(2), c = 13.384(2) angstrom, beta = 105.425(3)degrees, V = 1151.1(3) angstrom(3), Z = 8 (2 independent molecules per asymmetric unit), density (calculated) = 1.710 mg/m(3), absorption coefficient = 0.815 mm(-1). II crystallizes in the orthorhombic space group Iba2 with unit cell a = 20.117(4), b = 23.449(5), c = 7.852(2) angstrom, V = 3703.9(12) angstrom(3), Z = 24 (three independent molecules per asymmetric unit), density (calculated) = 1.584 mg/m(3), absorption coefficient 0.755 mm(-1). For I in the final refinement cycle the data/restraints/parameter ratios were 2639/0/161, goodness-of-fit on F-2 = 0.934, final R indices [I > 2sigma(I)] were R1 = 0.0299, wR2 = 0.0545 and R indices (all data) R1 = 0.0399, wR2 = 0.0568. The largest difference peak and hole were 0.402 and -0.259 e angstrom(-3). For II in the final refinement cycle the data/restraints/parameter ratios were 3372/1/221, goodness-of-fit on F(2) = 0.950, final R indices [I > 2sigma(I)] were R1 = 0.0407, wR2 = 0.1048 and R indices (all data) R1 = 0.0450, wR2 = 0.1088. The absolute structure parameter = 0.19(9) and largest difference peak and hole 0.934 and -0.301 e angstrom(-3). Details of the geometry of the five molecules (two for I and three for II) and the crystal structures are fully discussed. Corresponding features of the molecular geometry are highly consistent and firmly establish the geometry of the rhodanine